diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2012-04-14 13:54:10 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2012-04-14 13:54:10 +0000 |
| commit | 63faed5b8e4f2755f127fcb8aa440480c0649327 (patch) | |
| tree | 19c69a04768629f2d440944b71cbe90adae0b615 /include/llvm/CodeGen/Analysis.h | |
| parent | d4c8b5d2e851b0e8a063c6bf8543a4823a26c15a (diff) | |
Diffstat (limited to 'include/llvm/CodeGen/Analysis.h')
| -rw-r--r-- | include/llvm/CodeGen/Analysis.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/Analysis.h b/include/llvm/CodeGen/Analysis.h index d8e64071a1d9..0b609ed6586e 100644 --- a/include/llvm/CodeGen/Analysis.h +++ b/include/llvm/CodeGen/Analysis.h @@ -27,6 +27,7 @@ namespace llvm { class GlobalVariable; class TargetLowering; class SDNode; +class SDValue; class SelectionDAG; /// ComputeLinearIndex - Given an LLVM IR aggregate type and a sequence @@ -70,6 +71,10 @@ bool hasInlineAsmMemConstraint(InlineAsm::ConstraintInfoVector &CInfos, /// ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred); +/// getFCmpCodeWithoutNaN - Given an ISD condition code comparing floats, +/// return the equivalent code if we're allowed to assume that NaNs won't occur. +ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC); + /// getICmpCondCode - Return the ISD condition code corresponding to /// the given LLVM IR integer condition code. /// @@ -85,7 +90,7 @@ bool isInTailCallPosition(ImmutableCallSite CS, Attributes CalleeRetAttr, const TargetLowering &TLI); bool isInTailCallPosition(SelectionDAG &DAG, SDNode *Node, - const TargetLowering &TLI); + SDValue &Chain, const TargetLowering &TLI); } // End llvm namespace |