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authorDimitry Andric <dim@FreeBSD.org>2011-07-17 15:36:56 +0000
committerDimitry Andric <dim@FreeBSD.org>2011-07-17 15:36:56 +0000
commit411bd29eea3c360d5b48a18a17b5e87f5671af0e (patch)
treec8086addb211fa670a9d2b1038d8c2e453229755 /lib/CodeGen/AllocationOrder.cpp
parent56fe8f14099930935e3870e3e823c322a85c1c89 (diff)
Diffstat (limited to 'lib/CodeGen/AllocationOrder.cpp')
-rw-r--r--lib/CodeGen/AllocationOrder.cpp18
1 files changed, 8 insertions, 10 deletions
diff --git a/lib/CodeGen/AllocationOrder.cpp b/lib/CodeGen/AllocationOrder.cpp
index a8ee2b6357c3..1005f102bea6 100644
--- a/lib/CodeGen/AllocationOrder.cpp
+++ b/lib/CodeGen/AllocationOrder.cpp
@@ -41,21 +41,19 @@ AllocationOrder::AllocationOrder(unsigned VirtReg,
if (HintPair.first) {
const TargetRegisterInfo &TRI = VRM.getTargetRegInfo();
// The remaining allocation order may depend on the hint.
- const unsigned *B, *E;
- tie(B, E) = TRI.getAllocationOrder(RC, HintPair.first, Hint,
- VRM.getMachineFunction());
-
- // Empty allocation order?
- if (B == E)
+ ArrayRef<unsigned> Order =
+ TRI.getRawAllocationOrder(RC, HintPair.first, Hint,
+ VRM.getMachineFunction());
+ if (Order.empty())
return;
// Copy the allocation order with reserved registers removed.
OwnedBegin = true;
- unsigned *P = new unsigned[E - B];
+ unsigned *P = new unsigned[Order.size()];
Begin = P;
- for (; B != E; ++B)
- if (!RCI.isReserved(*B))
- *P++ = *B;
+ for (unsigned i = 0; i != Order.size(); ++i)
+ if (!RCI.isReserved(Order[i]))
+ *P++ = Order[i];
End = P;
// Target-dependent hints require resolution.