diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2011-07-17 15:36:56 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2011-07-17 15:36:56 +0000 |
commit | 411bd29eea3c360d5b48a18a17b5e87f5671af0e (patch) | |
tree | c8086addb211fa670a9d2b1038d8c2e453229755 /lib/CodeGen/CalcSpillWeights.cpp | |
parent | 56fe8f14099930935e3870e3e823c322a85c1c89 (diff) |
Diffstat (limited to 'lib/CodeGen/CalcSpillWeights.cpp')
-rw-r--r-- | lib/CodeGen/CalcSpillWeights.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/lib/CodeGen/CalcSpillWeights.cpp b/lib/CodeGen/CalcSpillWeights.cpp index 5d722ee34f7e..e6b3bbca2068 100644 --- a/lib/CodeGen/CalcSpillWeights.cpp +++ b/lib/CodeGen/CalcSpillWeights.cpp @@ -188,6 +188,7 @@ void VirtRegAuxInfo::CalculateWeightAndHint(LiveInterval &li) { void VirtRegAuxInfo::CalculateRegClass(unsigned reg) { MachineRegisterInfo &MRI = MF.getRegInfo(); + const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); const TargetRegisterClass *OldRC = MRI.getRegClass(reg); const TargetRegisterClass *NewRC = TRI->getLargestLegalSuperClass(OldRC); @@ -202,8 +203,11 @@ void VirtRegAuxInfo::CalculateRegClass(unsigned reg) { // TRI doesn't have accurate enough information to model this yet. if (I.getOperand().getSubReg()) return; + // Inline asm instuctions don't remember their constraints. + if (I->isInlineAsm()) + return; const TargetRegisterClass *OpRC = - I->getDesc().getRegClass(I.getOperandNo(), TRI); + TII->getRegClass(I->getDesc(), I.getOperandNo(), TRI); if (OpRC) NewRC = getCommonSubClass(NewRC, OpRC); if (!NewRC || NewRC == OldRC) |