diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2019-08-20 20:50:12 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2019-08-20 20:50:12 +0000 |
commit | e6d1592492a3a379186bfb02bd0f4eda0669c0d5 (patch) | |
tree | 599ab169a01f1c86eda9adc774edaedde2f2db5b /lib/MCA/InstrBuilder.cpp | |
parent | 1a56a5ead7a2e84bee8240f5f6b033b5f1707154 (diff) |
Diffstat (limited to 'lib/MCA/InstrBuilder.cpp')
-rw-r--r-- | lib/MCA/InstrBuilder.cpp | 37 |
1 files changed, 28 insertions, 9 deletions
diff --git a/lib/MCA/InstrBuilder.cpp b/lib/MCA/InstrBuilder.cpp index d2d65e55537c..829920366c90 100644 --- a/lib/MCA/InstrBuilder.cpp +++ b/lib/MCA/InstrBuilder.cpp @@ -1,9 +1,8 @@ //===--------------------- InstrBuilder.cpp ---------------------*- C++ -*-===// // -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// /// \file @@ -66,6 +65,17 @@ static void initializeUsedResources(InstrDesc &ID, for (unsigned I = 0, E = SCDesc.NumWriteProcResEntries; I < E; ++I) { const MCWriteProcResEntry *PRE = STI.getWriteProcResBegin(&SCDesc) + I; const MCProcResourceDesc &PR = *SM.getProcResource(PRE->ProcResourceIdx); + if (!PRE->Cycles) { +#ifndef NDEBUG + WithColor::warning() + << "Ignoring invalid write of zero cycles on processor resource " + << PR.Name << "\n"; + WithColor::note() << "found in scheduling class " << SCDesc.Name + << " (write index #" << I << ")\n"; +#endif + continue; + } + uint64_t Mask = ProcResourceMasks[PRE->ProcResourceIdx]; if (PR.BufferSize < 0) { AllInOrderResources = false; @@ -98,14 +108,14 @@ static void initializeUsedResources(InstrDesc &ID, }); uint64_t UsedResourceUnits = 0; + uint64_t UsedResourceGroups = 0; // Remove cycles contributed by smaller resources. for (unsigned I = 0, E = Worklist.size(); I < E; ++I) { ResourcePlusCycles &A = Worklist[I]; if (!A.second.size()) { - A.second.NumUnits = 0; - A.second.setReserved(); - ID.Resources.emplace_back(A); + assert(countPopulation(A.first) > 1 && "Expected a group!"); + UsedResourceGroups |= PowerOf2Floor(A.first); continue; } @@ -116,6 +126,7 @@ static void initializeUsedResources(InstrDesc &ID, } else { // Remove the leading 1 from the resource group mask. NormalizedMask ^= PowerOf2Floor(NormalizedMask); + UsedResourceGroups |= (A.first ^ NormalizedMask); } for (unsigned J = I + 1; J < E; ++J) { @@ -128,6 +139,9 @@ static void initializeUsedResources(InstrDesc &ID, } } + ID.UsedProcResUnits = UsedResourceUnits; + ID.UsedProcResGroups = UsedResourceGroups; + // A SchedWrite may specify a number of cycles in which a resource group // is reserved. For example (on target x86; cpu Haswell): // @@ -180,10 +194,15 @@ static void initializeUsedResources(InstrDesc &ID, LLVM_DEBUG({ for (const std::pair<uint64_t, ResourceUsage> &R : ID.Resources) - dbgs() << "\t\tMask=" << format_hex(R.first, 16) << ", " + dbgs() << "\t\tResource Mask=" << format_hex(R.first, 16) << ", " + << "Reserved=" << R.second.isReserved() << ", " + << "#Units=" << R.second.NumUnits << ", " << "cy=" << R.second.size() << '\n'; for (const uint64_t R : ID.Buffers) dbgs() << "\t\tBuffer Mask=" << format_hex(R, 16) << '\n'; + dbgs() << "\t\t Used Units=" << format_hex(ID.UsedProcResUnits, 16) << '\n'; + dbgs() << "\t\tUsed Groups=" << format_hex(ID.UsedProcResGroups, 16) + << '\n'; }); } @@ -533,6 +552,7 @@ InstrBuilder::createInstrDescImpl(const MCInst &MCI) { // Create a new empty descriptor. std::unique_ptr<InstrDesc> ID = llvm::make_unique<InstrDesc>(); ID->NumMicroOps = SCDesc.NumMicroOps; + ID->SchedClassID = SchedClassID; if (MCDesc.isCall() && FirstCallInst) { // We don't correctly model calls. @@ -572,7 +592,6 @@ InstrBuilder::createInstrDescImpl(const MCInst &MCI) { return std::move(Err); // Now add the new descriptor. - SchedClassID = MCDesc.getSchedClass(); bool IsVariadic = MCDesc.isVariadic(); if (!IsVariadic && !IsVariant) { Descriptors[MCI.getOpcode()] = std::move(ID); |