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authorDimitry Andric <dim@FreeBSD.org>2019-08-20 20:50:12 +0000
committerDimitry Andric <dim@FreeBSD.org>2019-08-20 20:50:12 +0000
commite6d1592492a3a379186bfb02bd0f4eda0669c0d5 (patch)
tree599ab169a01f1c86eda9adc774edaedde2f2db5b /lib/Support/ARMAttributeParser.cpp
parent1a56a5ead7a2e84bee8240f5f6b033b5f1707154 (diff)
Notes
Diffstat (limited to 'lib/Support/ARMAttributeParser.cpp')
-rw-r--r--lib/Support/ARMAttributeParser.cpp32
1 files changed, 26 insertions, 6 deletions
diff --git a/lib/Support/ARMAttributeParser.cpp b/lib/Support/ARMAttributeParser.cpp
index 1f98ac2f40ba..df50fff720cd 100644
--- a/lib/Support/ARMAttributeParser.cpp
+++ b/lib/Support/ARMAttributeParser.cpp
@@ -1,9 +1,8 @@
//===--- ARMAttributeParser.cpp - ARM Attribute Information Printer -------===//
//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
@@ -38,6 +37,7 @@ ARMAttributeParser::DisplayRoutines[] = {
ATTRIBUTE_HANDLER(FP_arch),
ATTRIBUTE_HANDLER(WMMX_arch),
ATTRIBUTE_HANDLER(Advanced_SIMD_arch),
+ ATTRIBUTE_HANDLER(MVE_arch),
ATTRIBUTE_HANDLER(PCS_config),
ATTRIBUTE_HANDLER(ABI_PCS_R9_use),
ATTRIBUTE_HANDLER(ABI_PCS_RW_data),
@@ -133,7 +133,9 @@ void ARMAttributeParser::CPU_arch(AttrType Tag, const uint8_t *Data,
static const char *const Strings[] = {
"Pre-v4", "ARM v4", "ARM v4T", "ARM v5T", "ARM v5TE", "ARM v5TEJ", "ARM v6",
"ARM v6KZ", "ARM v6T2", "ARM v6K", "ARM v7", "ARM v6-M", "ARM v6S-M",
- "ARM v7E-M", "ARM v8"
+ "ARM v7E-M", "ARM v8", nullptr,
+ "ARM v8-M Baseline", "ARM v8-M Mainline", nullptr, nullptr, nullptr,
+ "ARM v8.1-M Mainline"
};
uint64_t Value = ParseInteger(Data, Offset);
@@ -214,6 +216,18 @@ void ARMAttributeParser::Advanced_SIMD_arch(AttrType Tag, const uint8_t *Data,
PrintAttribute(Tag, Value, ValueDesc);
}
+void ARMAttributeParser::MVE_arch(AttrType Tag, const uint8_t *Data,
+ uint32_t &Offset) {
+ static const char *const Strings[] = {
+ "Not Permitted", "MVE integer", "MVE integer and float"
+ };
+
+ uint64_t Value = ParseInteger(Data, Offset);
+ StringRef ValueDesc =
+ (Value < array_lengthof(Strings)) ? Strings[Value] : nullptr;
+ PrintAttribute(Tag, Value, ValueDesc);
+}
+
void ARMAttributeParser::PCS_config(AttrType Tag, const uint8_t *Data,
uint32_t &Offset) {
static const char *const Strings[] = {
@@ -682,7 +696,7 @@ void ARMAttributeParser::ParseSubsection(const uint8_t *Data, uint32_t Length) {
}
void ARMAttributeParser::Parse(ArrayRef<uint8_t> Section, bool isLittle) {
- size_t Offset = 1;
+ uint64_t Offset = 1;
unsigned SectionNumber = 0;
while (Offset < Section.size()) {
@@ -695,6 +709,12 @@ void ARMAttributeParser::Parse(ArrayRef<uint8_t> Section, bool isLittle) {
SW->indent();
}
+ if (SectionLength == 0 || (SectionLength + Offset) > Section.size()) {
+ errs() << "invalid subsection length " << SectionLength << " at offset "
+ << Offset << "\n";
+ return;
+ }
+
ParseSubsection(Section.data() + Offset, SectionLength);
Offset = Offset + SectionLength;