diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2017-04-16 16:01:22 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2017-04-16 16:01:22 +0000 |
commit | 71d5a2540a98c81f5bcaeb48805e0e2881f530ef (patch) | |
tree | 5343938942df402b49ec7300a1c25a2d4ccd5821 /lib/Target/AMDGPU/GCNHazardRecognizer.h | |
parent | 31bbf64f3a4974a2d6c8b3b27ad2f519caf74057 (diff) |
Diffstat (limited to 'lib/Target/AMDGPU/GCNHazardRecognizer.h')
-rw-r--r-- | lib/Target/AMDGPU/GCNHazardRecognizer.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/AMDGPU/GCNHazardRecognizer.h b/lib/Target/AMDGPU/GCNHazardRecognizer.h index 0ab82ff4635b..5680c3de6a1a 100644 --- a/lib/Target/AMDGPU/GCNHazardRecognizer.h +++ b/lib/Target/AMDGPU/GCNHazardRecognizer.h @@ -34,6 +34,7 @@ class GCNHazardRecognizer final : public ScheduleHazardRecognizer { std::list<MachineInstr*> EmittedInstrs; const MachineFunction &MF; const SISubtarget &ST; + const SIInstrInfo &TII; int getWaitStatesSince(function_ref<bool(MachineInstr *)> IsHazard); int getWaitStatesSinceDef(unsigned Reg, @@ -52,6 +53,8 @@ class GCNHazardRecognizer final : public ScheduleHazardRecognizer { int checkVALUHazards(MachineInstr *VALU); int checkRWLaneHazards(MachineInstr *RWLane); int checkRFEHazards(MachineInstr *RFE); + int checkAnyInstHazards(MachineInstr *MI); + int checkReadM0Hazards(MachineInstr *SMovRel); public: GCNHazardRecognizer(const MachineFunction &MF); // We can only issue one instruction per cycle. |