diff options
| author | Roman Divacky <rdivacky@FreeBSD.org> | 2009-11-18 14:58:34 +0000 |
|---|---|---|
| committer | Roman Divacky <rdivacky@FreeBSD.org> | 2009-11-18 14:58:34 +0000 |
| commit | 907da171cc911d701da02a5cab898a9c49dd7724 (patch) | |
| tree | 6a111e552c75afc66228e3d8f19b6731e4013f10 /lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp | |
| parent | 72cc50852bec44580ee7efe1aa2076273008a6ae (diff) | |
Notes
Diffstat (limited to 'lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp')
| -rw-r--r-- | lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp b/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp index 8686961db45e..c49fee3a5505 100644 --- a/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMMCInstLower.cpp @@ -137,6 +137,7 @@ void ARMMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { case MachineOperand::MO_Register: // Ignore all implicit register operands. if (MO.isImplicit()) continue; + assert(!MO.getSubReg() && "Subregs should be eliminated!"); MCOp = MCOperand::CreateReg(MO.getReg()); break; case MachineOperand::MO_Immediate: |