diff options
| author | Roman Divacky <rdivacky@FreeBSD.org> | 2010-01-23 11:09:33 +0000 |
|---|---|---|
| committer | Roman Divacky <rdivacky@FreeBSD.org> | 2010-01-23 11:09:33 +0000 |
| commit | 989df958a10f0beb90b89ccadd8351cbe51d90b1 (patch) | |
| tree | 74eecbae571601ec6a626a53374b1eddc7b164a5 /lib/Target/ARM/Thumb2InstrInfo.cpp | |
| parent | 829000e035f46f2a227a5466e4e427a2f3cc00a9 (diff) | |
Notes
Diffstat (limited to 'lib/Target/ARM/Thumb2InstrInfo.cpp')
| -rw-r--r-- | lib/Target/ARM/Thumb2InstrInfo.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp index f4a8c275bec0..387edaf05d18 100644 --- a/lib/Target/ARM/Thumb2InstrInfo.cpp +++ b/lib/Target/ARM/Thumb2InstrInfo.cpp @@ -329,12 +329,16 @@ bool llvm::rewriteT2FrameIndex(MachineInstr &MI, unsigned FrameRegIdx, Offset += MI.getOperand(FrameRegIdx+1).getImm(); bool isSP = FrameReg == ARM::SP; - if (Offset == 0) { + unsigned PredReg; + if (Offset == 0 && getInstrPredicate(&MI, PredReg) == ARMCC::AL) { // Turn it into a move. MI.setDesc(TII.get(ARM::tMOVgpr2gpr)); MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false); - MI.RemoveOperand(FrameRegIdx+1); - Offset = 0; + // Remove offset and remaining explicit predicate operands. + do MI.RemoveOperand(FrameRegIdx+1); + while (MI.getNumOperands() > FrameRegIdx+1 && + (!MI.getOperand(FrameRegIdx+1).isReg() || + !MI.getOperand(FrameRegIdx+1).isImm())); return true; } |
