diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2019-10-23 17:51:42 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2019-10-23 17:51:42 +0000 |
| commit | 1d5ae1026e831016fc29fd927877c86af904481f (patch) | |
| tree | 2cdfd12620fcfa5d9e4a0389f85368e8e36f63f9 /lib/Target/Hexagon/HexagonTargetMachine.cpp | |
| parent | e6d1592492a3a379186bfb02bd0f4eda0669c0d5 (diff) | |
Notes
Diffstat (limited to 'lib/Target/Hexagon/HexagonTargetMachine.cpp')
| -rw-r--r-- | lib/Target/Hexagon/HexagonTargetMachine.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/Hexagon/HexagonTargetMachine.cpp b/lib/Target/Hexagon/HexagonTargetMachine.cpp index 80b8480448fe..d709a82be660 100644 --- a/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -111,10 +111,10 @@ int HexagonTargetMachineModule = 0; static ScheduleDAGInstrs *createVLIWMachineSched(MachineSchedContext *C) { ScheduleDAGMILive *DAG = - new VLIWMachineScheduler(C, make_unique<ConvergingVLIWScheduler>()); - DAG->addMutation(make_unique<HexagonSubtarget::UsrOverflowMutation>()); - DAG->addMutation(make_unique<HexagonSubtarget::HVXMemLatencyMutation>()); - DAG->addMutation(make_unique<HexagonSubtarget::CallMutation>()); + new VLIWMachineScheduler(C, std::make_unique<ConvergingVLIWScheduler>()); + DAG->addMutation(std::make_unique<HexagonSubtarget::UsrOverflowMutation>()); + DAG->addMutation(std::make_unique<HexagonSubtarget::HVXMemLatencyMutation>()); + DAG->addMutation(std::make_unique<HexagonSubtarget::CallMutation>()); DAG->addMutation(createCopyConstrainDAGMutation(DAG->TII, DAG->TRI)); return DAG; } @@ -218,7 +218,7 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, const Triple &TT, TT, CPU, FS, Options, getEffectiveRelocModel(RM), getEffectiveCodeModel(CM, CodeModel::Small), (HexagonNoOpt ? CodeGenOpt::None : OL)), - TLOF(make_unique<HexagonTargetObjectFile>()) { + TLOF(std::make_unique<HexagonTargetObjectFile>()) { initializeHexagonExpandCondsetsPass(*PassRegistry::getPassRegistry()); initAsmInfo(); } @@ -244,7 +244,7 @@ HexagonTargetMachine::getSubtargetImpl(const Function &F) const { // creation will depend on the TM and the code generation flags on the // function that reside in TargetOptions. resetTargetOptions(F); - I = llvm::make_unique<HexagonSubtarget>(TargetTriple, CPU, FS, *this); + I = std::make_unique<HexagonSubtarget>(TargetTriple, CPU, FS, *this); } return I.get(); } |