diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2017-04-16 16:01:22 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2017-04-16 16:01:22 +0000 |
commit | 71d5a2540a98c81f5bcaeb48805e0e2881f530ef (patch) | |
tree | 5343938942df402b49ec7300a1c25a2d4ccd5821 /lib/Target/Hexagon/HexagonTargetMachine.cpp | |
parent | 31bbf64f3a4974a2d6c8b3b27ad2f519caf74057 (diff) |
Diffstat (limited to 'lib/Target/Hexagon/HexagonTargetMachine.cpp')
-rw-r--r-- | lib/Target/Hexagon/HexagonTargetMachine.cpp | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/lib/Target/Hexagon/HexagonTargetMachine.cpp b/lib/Target/Hexagon/HexagonTargetMachine.cpp index 132d12a66d46..06fc9195fa67 100644 --- a/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -24,6 +24,7 @@ #include "llvm/Support/CommandLine.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Transforms/Scalar.h" +#include "llvm/Transforms/IPO/PassManagerBuilder.h" using namespace llvm; @@ -98,11 +99,6 @@ static cl::opt<bool> EnableVectorPrint("enable-hexagon-vector-print", extern "C" int HexagonTargetMachineModule; int HexagonTargetMachineModule = 0; -extern "C" void LLVMInitializeHexagonTarget() { - // Register the target. - RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget()); -} - static ScheduleDAGInstrs *createVLIWMachineSched(MachineSchedContext *C) { return new VLIWMachineScheduler(C, make_unique<ConvergingVLIWScheduler>()); } @@ -114,6 +110,8 @@ SchedCustomRegistry("hexagon", "Run Hexagon's custom scheduler", namespace llvm { extern char &HexagonExpandCondsetsID; void initializeHexagonExpandCondsetsPass(PassRegistry&); + void initializeHexagonLoopIdiomRecognizePass(PassRegistry&); + Pass *createHexagonLoopIdiomPass(); FunctionPass *createHexagonBitSimplify(); FunctionPass *createHexagonBranchRelaxation(); @@ -150,6 +148,12 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) { return *RM; } +extern "C" void LLVMInitializeHexagonTarget() { + // Register the target. + RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget()); + initializeHexagonLoopIdiomRecognizePass(*PassRegistry::getPassRegistry()); +} + HexagonTargetMachine::HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -172,11 +176,11 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, const Triple &TT, const HexagonSubtarget * HexagonTargetMachine::getSubtargetImpl(const Function &F) const { - AttributeSet FnAttrs = F.getAttributes(); + AttributeList FnAttrs = F.getAttributes(); Attribute CPUAttr = - FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-cpu"); + FnAttrs.getAttribute(AttributeList::FunctionIndex, "target-cpu"); Attribute FSAttr = - FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-features"); + FnAttrs.getAttribute(AttributeList::FunctionIndex, "target-features"); std::string CPU = !CPUAttr.hasAttribute(Attribute::None) ? CPUAttr.getValueAsString().str() @@ -196,6 +200,14 @@ HexagonTargetMachine::getSubtargetImpl(const Function &F) const { return I.get(); } +void HexagonTargetMachine::adjustPassManager(PassManagerBuilder &PMB) { + PMB.addExtension( + PassManagerBuilder::EP_LateLoopOptimizations, + [&](const PassManagerBuilder &, legacy::PassManagerBase &PM) { + PM.add(createHexagonLoopIdiomPass()); + }); +} + TargetIRAnalysis HexagonTargetMachine::getTargetIRAnalysis() { return TargetIRAnalysis([this](const Function &F) { return TargetTransformInfo(HexagonTTIImpl(this, F)); |