diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2019-01-19 10:01:25 +0000 | 
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2019-01-19 10:01:25 +0000 | 
| commit | d8e91e46262bc44006913e6796843909f1ac7bcd (patch) | |
| tree | 7d0c143d9b38190e0fa0180805389da22cd834c5 /lib/Target/Mips/MipsCallLowering.h | |
| parent | b7eb8e35e481a74962664b63dfb09483b200209a (diff) | |
Notes
Diffstat (limited to 'lib/Target/Mips/MipsCallLowering.h')
| -rw-r--r-- | lib/Target/Mips/MipsCallLowering.h | 44 | 
1 files changed, 25 insertions, 19 deletions
diff --git a/lib/Target/Mips/MipsCallLowering.h b/lib/Target/Mips/MipsCallLowering.h index e23c10cec563..9916b04ef50c 100644 --- a/lib/Target/Mips/MipsCallLowering.h +++ b/lib/Target/Mips/MipsCallLowering.h @@ -31,27 +31,38 @@ public:      virtual ~MipsHandler() = default; +    bool handle(ArrayRef<CCValAssign> ArgLocs, +                ArrayRef<CallLowering::ArgInfo> Args); +    protected: -    bool assign(const CCValAssign &VA, unsigned vreg); +    bool assignVRegs(ArrayRef<unsigned> VRegs, ArrayRef<CCValAssign> ArgLocs, +                     unsigned Index); + +    void setLeastSignificantFirst(SmallVectorImpl<unsigned> &VRegs);      MachineIRBuilder &MIRBuilder;      MachineRegisterInfo &MRI;    private: -    virtual unsigned getStackAddress(uint64_t Size, int64_t Offset, -                                     MachinePointerInfo &MPO) = 0; +    bool assign(unsigned VReg, const CCValAssign &VA); + +    virtual unsigned getStackAddress(const CCValAssign &VA, +                                     MachineMemOperand *&MMO) = 0; -    virtual void assignValueToReg(unsigned ValVReg, unsigned PhysReg) = 0; +    virtual void assignValueToReg(unsigned ValVReg, const CCValAssign &VA) = 0; -    virtual void assignValueToAddress(unsigned ValVReg, unsigned Addr, -                                      uint64_t Size, -                                      MachinePointerInfo &MPO) = 0; +    virtual void assignValueToAddress(unsigned ValVReg, +                                      const CCValAssign &VA) = 0; + +    virtual bool handleSplit(SmallVectorImpl<unsigned> &VRegs, +                             ArrayRef<CCValAssign> ArgLocs, +                             unsigned ArgLocsStartIndex, unsigned ArgsReg) = 0;    };    MipsCallLowering(const MipsTargetLowering &TLI); -  bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val, -                   unsigned VReg) const override; +  bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, +                   ArrayRef<unsigned> VRegs) const override;    bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,                              ArrayRef<unsigned> VRegs) const override; @@ -61,21 +72,16 @@ public:                   ArrayRef<ArgInfo> OrigArgs) const override;  private: -  using FunTy = -      std::function<void(ISD::ArgFlagsTy flags, EVT vt, EVT argvt, bool used, -                         unsigned origIdx, unsigned partOffs)>; -    /// Based on registers available on target machine split or extend    /// type if needed, also change pointer type to appropriate integer -  /// type. Lambda will fill some info so we can tell MipsCCState to -  /// assign physical registers. -  void subTargetRegTypeForCallingConv(MachineIRBuilder &MIRBuilder, -                                      ArrayRef<ArgInfo> Args, +  /// type. +  template <typename T> +  void subTargetRegTypeForCallingConv(const Function &F, ArrayRef<ArgInfo> Args,                                        ArrayRef<unsigned> OrigArgIndices, -                                      const FunTy &PushBack) const; +                                      SmallVectorImpl<T> &ISDArgs) const;    /// Split structures and arrays, save original argument indices since -  /// Mips calling conv needs info about original argument type. +  /// Mips calling convention needs info about original argument type.    void splitToValueTypes(const ArgInfo &OrigArg, unsigned OriginalIndex,                           SmallVectorImpl<ArgInfo> &SplitArgs,                           SmallVectorImpl<unsigned> &SplitArgsOrigIndices) const;  | 
