diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2017-04-26 19:45:00 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-04-26 19:45:00 +0000 |
| commit | 12f3ca4cdb95b193af905a00e722a4dcb40b3de3 (patch) | |
| tree | ae1a7fcfc24a8d4b23206c57121c3f361d4b7f84 /lib/Target/Mips/MipsOptimizePICCall.cpp | |
| parent | d99dafe2e4a385dd2a6c76da6d8258deb100657b (diff) | |
Diffstat (limited to 'lib/Target/Mips/MipsOptimizePICCall.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsOptimizePICCall.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsOptimizePICCall.cpp b/lib/Target/Mips/MipsOptimizePICCall.cpp index f33857fe628f..68dcbdfb4211 100644 --- a/lib/Target/Mips/MipsOptimizePICCall.cpp +++ b/lib/Target/Mips/MipsOptimizePICCall.cpp @@ -116,9 +116,10 @@ static MachineOperand *getCallTargetRegOpnd(MachineInstr &MI) { /// Return type of register Reg. static MVT::SimpleValueType getRegTy(unsigned Reg, MachineFunction &MF) { + const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(Reg); - assert(RC->vt_end() - RC->vt_begin() == 1); - return *RC->vt_begin(); + assert(TRI.legalclasstypes_end(*RC) - TRI.legalclasstypes_begin(*RC) == 1); + return *TRI.legalclasstypes_begin(*RC); } /// Do the following transformation: |