diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2012-08-15 19:34:23 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2012-08-15 19:34:23 +0000 |
| commit | 58b69754af0cbff56b1cfce9be9392e4451f6628 (patch) | |
| tree | eacfc83d988e4b9d11114387ae7dc41243f2a363 /lib/Target/Mips/MipsSubtarget.cpp | |
| parent | 0378662f5bd3dbe8305a485b0282bceb8b52f465 (diff) | |
Diffstat (limited to 'lib/Target/Mips/MipsSubtarget.cpp')
| -rw-r--r-- | lib/Target/Mips/MipsSubtarget.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index 00347df9ac84..11ff8092af2e 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -30,7 +30,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true), HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), - HasMinMax(false), HasSwap(false), HasBitCount(false) + HasMinMax(false), HasSwap(false), HasBitCount(false), InMips16Mode(false) { std::string CPUName = CPU; if (CPUName.empty()) @@ -58,9 +58,9 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, bool MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel, - TargetSubtargetInfo::AntiDepBreakMode& Mode, - RegClassVector& CriticalPathRCs) const { - Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL; + TargetSubtargetInfo::AntiDepBreakMode &Mode, + RegClassVector &CriticalPathRCs) const { + Mode = TargetSubtargetInfo::ANTIDEP_NONE; CriticalPathRCs.clear(); CriticalPathRCs.push_back(hasMips64() ? &Mips::CPU64RegsRegClass : &Mips::CPURegsRegClass); |