diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2014-05-11 18:24:26 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2014-05-11 18:24:26 +0000 |
| commit | 68bcb7db193e4bc81430063148253d30a791023e (patch) | |
| tree | 9f9245264c66971905eab3af40b7fc82e38fc2ad /lib/Target/R600/SIInsertWaits.cpp | |
| parent | 512b84fc6c12bc496cef739e69bfaaf27e7ccc8e (diff) | |
Diffstat (limited to 'lib/Target/R600/SIInsertWaits.cpp')
| -rw-r--r-- | lib/Target/R600/SIInsertWaits.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/R600/SIInsertWaits.cpp b/lib/Target/R600/SIInsertWaits.cpp index 7ef662eb65b1..695ec407fdbe 100644 --- a/lib/Target/R600/SIInsertWaits.cpp +++ b/lib/Target/R600/SIInsertWaits.cpp @@ -314,6 +314,12 @@ Counters SIInsertWaits::handleOperands(MachineInstr &MI) { Counters Result = ZeroCounts; + // S_SENDMSG implicitly waits for all outstanding LGKM transfers to finish, + // but we also want to wait for any other outstanding transfers before + // signalling other hardware blocks + if (MI.getOpcode() == AMDGPU::S_SENDMSG) + return LastIssued; + // For each register affected by this // instruction increase the result sequence for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { |