diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2017-04-16 16:01:22 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2017-04-16 16:01:22 +0000 |
commit | 71d5a2540a98c81f5bcaeb48805e0e2881f530ef (patch) | |
tree | 5343938942df402b49ec7300a1c25a2d4ccd5821 /lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | |
parent | 31bbf64f3a4974a2d6c8b3b27ad2f519caf74057 (diff) |
Diffstat (limited to 'lib/Target/WebAssembly/WebAssemblyISelLowering.cpp')
-rw-r--r-- | lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index 6a7f75a6b3a1..31a5ca1f4cc2 100644 --- a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -95,6 +95,11 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( // Support minnan and maxnan, which otherwise default to expand. setOperationAction(ISD::FMINNAN, T, Legal); setOperationAction(ISD::FMAXNAN, T, Legal); + // WebAssembly currently has no builtin f16 support. + setOperationAction(ISD::FP16_TO_FP, T, Expand); + setOperationAction(ISD::FP_TO_FP16, T, Expand); + setLoadExtAction(ISD::EXTLOAD, T, MVT::f16, Expand); + setTruncStoreAction(T, MVT::f16, Expand); } for (auto T : {MVT::i32, MVT::i64}) { @@ -253,7 +258,8 @@ bool WebAssemblyTargetLowering::allowsMisalignedMemoryAccesses( return true; } -bool WebAssemblyTargetLowering::isIntDivCheap(EVT VT, AttributeSet Attr) const { +bool WebAssemblyTargetLowering::isIntDivCheap(EVT VT, + AttributeList Attr) const { // The current thinking is that wasm engines will perform this optimization, // so we can save on code size. return true; |