diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2023-02-11 12:38:04 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2023-02-11 12:38:11 +0000 |
commit | e3b557809604d036af6e00c60f012c2025b59a5e (patch) | |
tree | 8a11ba2269a3b669601e2fd41145b174008f4da8 /llvm/lib/CodeGen/RDFGraph.cpp | |
parent | 08e8dd7b9db7bb4a9de26d44c1cbfd24e869c014 (diff) | |
download | src-e3b557809604d036af6e00c60f012c2025b59a5e.tar.gz src-e3b557809604d036af6e00c60f012c2025b59a5e.zip |
Diffstat (limited to 'llvm/lib/CodeGen/RDFGraph.cpp')
-rw-r--r-- | llvm/lib/CodeGen/RDFGraph.cpp | 71 |
1 files changed, 37 insertions, 34 deletions
diff --git a/llvm/lib/CodeGen/RDFGraph.cpp b/llvm/lib/CodeGen/RDFGraph.cpp index 51de99b81057..dcb1a44c75e4 100644 --- a/llvm/lib/CodeGen/RDFGraph.cpp +++ b/llvm/lib/CodeGen/RDFGraph.cpp @@ -105,8 +105,8 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeId> &P) { static void printRefHeader(raw_ostream &OS, const NodeAddr<RefNode*> RA, const DataFlowGraph &G) { - OS << Print<NodeId>(RA.Id, G) << '<' - << Print<RegisterRef>(RA.Addr->getRegRef(G), G) << '>'; + OS << Print(RA.Id, G) << '<' + << Print(RA.Addr->getRegRef(G), G) << '>'; if (RA.Addr->getFlags() & NodeAttrs::Fixed) OS << '!'; } @@ -115,16 +115,16 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<DefNode*>> &P) { printRefHeader(OS, P.Obj, P.G); OS << '('; if (NodeId N = P.Obj.Addr->getReachingDef()) - OS << Print<NodeId>(N, P.G); + OS << Print(N, P.G); OS << ','; if (NodeId N = P.Obj.Addr->getReachedDef()) - OS << Print<NodeId>(N, P.G); + OS << Print(N, P.G); OS << ','; if (NodeId N = P.Obj.Addr->getReachedUse()) - OS << Print<NodeId>(N, P.G); + OS << Print(N, P.G); OS << "):"; if (NodeId N = P.Obj.Addr->getSibling()) - OS << Print<NodeId>(N, P.G); + OS << Print(N, P.G); return OS; } @@ -132,10 +132,10 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<UseNode*>> &P) { printRefHeader(OS, P.Obj, P.G); OS << '('; if (NodeId N = P.Obj.Addr->getReachingDef()) - OS << Print<NodeId>(N, P.G); + OS << Print(N, P.G); OS << "):"; if (NodeId N = P.Obj.Addr->getSibling()) - OS << Print<NodeId>(N, P.G); + OS << Print(N, P.G); return OS; } @@ -144,13 +144,13 @@ raw_ostream &operator<< (raw_ostream &OS, printRefHeader(OS, P.Obj, P.G); OS << '('; if (NodeId N = P.Obj.Addr->getReachingDef()) - OS << Print<NodeId>(N, P.G); + OS << Print(N, P.G); OS << ','; if (NodeId N = P.Obj.Addr->getPredecessor()) - OS << Print<NodeId>(N, P.G); + OS << Print(N, P.G); OS << "):"; if (NodeId N = P.Obj.Addr->getSibling()) - OS << Print<NodeId>(N, P.G); + OS << Print(N, P.G); return OS; } @@ -172,7 +172,7 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<RefNode*>> &P) { raw_ostream &operator<< (raw_ostream &OS, const Print<NodeList> &P) { unsigned N = P.Obj.size(); for (auto I : P.Obj) { - OS << Print<NodeId>(I.Id, P.G); + OS << Print(I.Id, P.G); if (--N) OS << ' '; } @@ -182,7 +182,7 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeList> &P) { raw_ostream &operator<< (raw_ostream &OS, const Print<NodeSet> &P) { unsigned N = P.Obj.size(); for (auto I : P.Obj) { - OS << Print<NodeId>(I, P.G); + OS << Print(I, P.G); if (--N) OS << ' '; } @@ -214,7 +214,7 @@ namespace { } // end anonymous namespace raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<PhiNode*>> &P) { - OS << Print<NodeId>(P.Obj.Id, P.G) << ": phi [" + OS << Print(P.Obj.Id, P.G) << ": phi [" << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']'; return OS; } @@ -222,7 +222,7 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<PhiNode*>> &P) { raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<StmtNode *>> &P) { const MachineInstr &MI = *P.Obj.Addr->getCode(); unsigned Opc = MI.getOpcode(); - OS << Print<NodeId>(P.Obj.Id, P.G) << ": " << P.G.getTII().getName(Opc); + OS << Print(P.Obj.Id, P.G) << ": " << P.G.getTII().getName(Opc); // Print the target for calls and branches (for readability). if (MI.isCall() || MI.isBranch()) { MachineInstr::const_mop_iterator T = @@ -254,7 +254,7 @@ raw_ostream &operator<< (raw_ostream &OS, OS << PrintNode<StmtNode*>(P.Obj, P.G); break; default: - OS << "instr? " << Print<NodeId>(P.Obj.Id, P.G); + OS << "instr? " << Print(P.Obj.Id, P.G); break; } return OS; @@ -274,7 +274,7 @@ raw_ostream &operator<< (raw_ostream &OS, } }; - OS << Print<NodeId>(P.Obj.Id, P.G) << ": --- " << printMBBReference(*BB) + OS << Print(P.Obj.Id, P.G) << ": --- " << printMBBReference(*BB) << " --- preds(" << NP << "): "; for (MachineBasicBlock *B : BB->predecessors()) Ns.push_back(B->getNumber()); @@ -294,7 +294,7 @@ raw_ostream &operator<< (raw_ostream &OS, } raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<FuncNode *>> &P) { - OS << "DFG dump:[\n" << Print<NodeId>(P.Obj.Id, P.G) << ": Function: " + OS << "DFG dump:[\n" << Print(P.Obj.Id, P.G) << ": Function: " << P.Obj.Addr->getCode()->getName() << '\n'; for (auto I : P.Obj.Addr->members(P.G)) OS << PrintNode<BlockNode*>(I, P.G) << '\n'; @@ -305,7 +305,7 @@ raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<FuncNode *>> &P) { raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterSet> &P) { OS << '{'; for (auto I : P.Obj) - OS << ' ' << Print<RegisterRef>(I, P.G); + OS << ' ' << Print(I, P.G); OS << " }"; return OS; } @@ -318,8 +318,8 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterAggr> &P) { raw_ostream &operator<< (raw_ostream &OS, const Print<DataFlowGraph::DefStack> &P) { for (auto I = P.Obj.top(), E = P.Obj.bottom(); I != E; ) { - OS << Print<NodeId>(I->Id, P.G) - << '<' << Print<RegisterRef>(I->Addr->getRegRef(P.G), P.G) << '>'; + OS << Print(I->Id, P.G) + << '<' << Print(I->Addr->getRegRef(P.G), P.G) << '>'; I.down(); if (I != E) OS << ' '; @@ -623,7 +623,7 @@ bool TargetOperandInfo::isFixedReg(const MachineInstr &In, unsigned OpNum) return true; const MCInstrDesc &D = In.getDesc(); - if (!D.getImplicitDefs() && !D.getImplicitUses()) + if (D.implicit_defs().empty() && D.implicit_uses().empty()) return false; const MachineOperand &Op = In.getOperand(OpNum); // If there is a sub-register, treat the operand as non-fixed. Currently, @@ -632,14 +632,9 @@ bool TargetOperandInfo::isFixedReg(const MachineInstr &In, unsigned OpNum) if (Op.getSubReg() != 0) return false; Register Reg = Op.getReg(); - const MCPhysReg *ImpR = Op.isDef() ? D.getImplicitDefs() - : D.getImplicitUses(); - if (!ImpR) - return false; - while (*ImpR) - if (*ImpR++ == Reg) - return true; - return false; + ArrayRef<MCPhysReg> ImpOps = + Op.isDef() ? D.implicit_defs() : D.implicit_uses(); + return is_contained(ImpOps, Reg); } // @@ -648,6 +643,14 @@ bool TargetOperandInfo::isFixedReg(const MachineInstr &In, unsigned OpNum) DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii, const TargetRegisterInfo &tri, const MachineDominatorTree &mdt, + const MachineDominanceFrontier &mdf) + : DefaultTOI(std::make_unique<TargetOperandInfo>(tii)), MF(mf), TII(tii), + TRI(tri), PRI(tri, mf), MDT(mdt), MDF(mdf), TOI(*DefaultTOI), + LiveIns(PRI) { +} + +DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii, + const TargetRegisterInfo &tri, const MachineDominatorTree &mdt, const MachineDominanceFrontier &mdf, const TargetOperandInfo &toi) : MF(mf), TII(tii), TRI(tri), PRI(tri, mf), MDT(mdt), MDF(mdf), TOI(toi), LiveIns(PRI) { @@ -1087,7 +1090,7 @@ void DataFlowGraph::pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) { if (!Defined.insert(RR.Reg).second) { MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode(); dbgs() << "Multiple definitions of register: " - << Print<RegisterRef>(RR, *this) << " in\n " << *MI << "in " + << Print(RR, *this) << " in\n " << *MI << "in " << printMBBReference(*MI->getParent()) << '\n'; llvm_unreachable(nullptr); } @@ -1275,7 +1278,7 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) { if (!Op.isReg() || !Op.isDef() || Op.isImplicit()) continue; Register R = Op.getReg(); - if (!R || !Register::isPhysicalRegister(R)) + if (!R || !R.isPhysical()) continue; uint16_t Flags = NodeAttrs::None; if (TOI.isPreserving(In, OpN)) { @@ -1320,7 +1323,7 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) { if (!Op.isReg() || !Op.isDef() || !Op.isImplicit()) continue; Register R = Op.getReg(); - if (!R || !Register::isPhysicalRegister(R) || DoneDefs.test(R)) + if (!R || !R.isPhysical() || DoneDefs.test(R)) continue; RegisterRef RR = makeRegRef(Op); uint16_t Flags = NodeAttrs::None; @@ -1349,7 +1352,7 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) { if (!Op.isReg() || !Op.isUse()) continue; Register R = Op.getReg(); - if (!R || !Register::isPhysicalRegister(R)) + if (!R || !R.isPhysical()) continue; uint16_t Flags = NodeAttrs::None; if (Op.isUndef()) |