diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2025-12-06 19:56:45 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2025-12-06 20:08:43 +0000 |
| commit | 3f709e42e3be0f28a88ca3e77663a02b52c914f4 (patch) | |
| tree | 948796bf3bf7e164373caf6c31f9f128ca85fd8c /llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp | |
| parent | 32a711e1c447004eb1fd015925f305ed1d8426de (diff) | |
Diffstat (limited to 'llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp | 24 |
1 files changed, 14 insertions, 10 deletions
diff --git a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp index 8b1c16d319b2..ae984be670fc 100644 --- a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp +++ b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp @@ -310,7 +310,8 @@ createAArch64ExternalSymbolizer(const Triple &TT, LLVMOpInfoCallback GetOpInfo, SymbolLookUp, DisInfo); } -extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Disassembler() { +extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void +LLVMInitializeAArch64Disassembler() { TargetRegistry::RegisterMCDisassembler(getTheAArch64leTarget(), createAArch64Disassembler); TargetRegistry::RegisterMCDisassembler(getTheAArch64beTarget(), @@ -341,7 +342,7 @@ static DecodeStatus DecodeSimpleRegisterClass(MCInst &Inst, unsigned RegNo, if (RegNo > NumRegsInClass - 1) return Fail; - unsigned Register = + MCRegister Register = AArch64MCRegisterClasses[RegClassID].getRegister(RegNo + FirstReg); Inst.addOperand(MCOperand::createReg(Register)); return Success; @@ -355,7 +356,7 @@ DecodeGPR64x8ClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, if (RegNo & 1) return Fail; - unsigned Register = + MCRegister Register = AArch64MCRegisterClasses[AArch64::GPR64x8ClassRegClassID].getRegister( RegNo >> 1); Inst.addOperand(MCOperand::createReg(Register)); @@ -369,7 +370,7 @@ static DecodeStatus DecodeZPRMul2_MinMax(MCInst &Inst, unsigned RegNo, unsigned Reg = (RegNo * 2) + Min; if (Reg < Min || Reg > Max || (Reg & 1)) return Fail; - unsigned Register = + MCRegister Register = AArch64MCRegisterClasses[AArch64::ZPRRegClassID].getRegister(Reg); Inst.addOperand(MCOperand::createReg(Register)); return Success; @@ -383,7 +384,7 @@ static DecodeStatus DecodeZPR2Mul2RegisterClass(MCInst &Inst, unsigned RegNo, if (Reg < Min || Reg > Max || (Reg & 1)) return Fail; - unsigned Register = + MCRegister Register = AArch64MCRegisterClasses[AArch64::ZPR2RegClassID].getRegister(Reg); Inst.addOperand(MCOperand::createReg(Register)); return Success; @@ -394,7 +395,7 @@ static DecodeStatus DecodeZK(MCInst &Inst, unsigned RegNo, uint64_t Address, if (RegNo > 7) return Fail; - unsigned Register = + MCRegister Register = AArch64MCRegisterClasses[AArch64::ZPR_KRegClassID].getRegister(RegNo); Inst.addOperand(MCOperand::createReg(Register)); return Success; @@ -405,7 +406,7 @@ static DecodeStatus DecodeZPR4Mul4RegisterClass(MCInst &Inst, unsigned RegNo, const void *Decoder) { if (RegNo * 4 > 28) return Fail; - unsigned Register = + MCRegister Register = AArch64MCRegisterClasses[AArch64::ZPR4RegClassID].getRegister(RegNo * 4); Inst.addOperand(MCOperand::createReg(Register)); return Success; @@ -449,7 +450,7 @@ static DecodeStatus DecodePPR2Mul2RegisterClass(MCInst &Inst, unsigned RegNo, const void *Decoder) { if ((RegNo * 2) > 14) return Fail; - unsigned Register = + MCRegister Register = AArch64MCRegisterClasses[AArch64::PPR2RegClassID].getRegister(RegNo * 2); Inst.addOperand(MCOperand::createReg(Register)); return Success; @@ -744,7 +745,10 @@ static DecodeStatus DecodeMoveImmInstruction(MCInst &Inst, uint32_t insn, Inst.getOpcode() == AArch64::MOVKXi) Inst.addOperand(Inst.getOperand(0)); - Inst.addOperand(MCOperand::createImm(imm)); + if (!Decoder->tryAddingSymbolicOperand(Inst, imm, Addr, /*IsBranch*/ false, 0, + 0, 4)) + Inst.addOperand(MCOperand::createImm(imm)); + Inst.addOperand(MCOperand::createImm(shift)); return Success; } @@ -1652,7 +1656,7 @@ DecodeGPRSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegClassID, if (RegNo & 0x1) return Fail; - unsigned Reg = AArch64MCRegisterClasses[RegClassID].getRegister(RegNo / 2); + MCRegister Reg = AArch64MCRegisterClasses[RegClassID].getRegister(RegNo / 2); Inst.addOperand(MCOperand::createReg(Reg)); return Success; } |