diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2025-12-06 19:56:45 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2025-12-06 20:08:43 +0000 |
| commit | 3f709e42e3be0f28a88ca3e77663a02b52c914f4 (patch) | |
| tree | 948796bf3bf7e164373caf6c31f9f128ca85fd8c /llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | |
| parent | 32a711e1c447004eb1fd015925f305ed1d8426de (diff) | |
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb1FrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 104 |
1 files changed, 32 insertions, 72 deletions
diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp index faa0352507fb..3eac2b005bc4 100644 --- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp +++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp @@ -21,6 +21,7 @@ #include "llvm/ADT/BitVector.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" +#include "llvm/CodeGen/CFIInstBuilder.h" #include "llvm/CodeGen/LivePhysRegs.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -31,12 +32,8 @@ #include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/TargetInstrInfo.h" -#include "llvm/CodeGen/TargetOpcodes.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/IR/DebugLoc.h" -#include "llvm/MC/MCContext.h" -#include "llvm/MC/MCDwarf.h" -#include "llvm/MC/MCRegisterInfo.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/ErrorHandling.h" #include <cassert> @@ -150,7 +147,6 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, MachineBasicBlock::iterator MBBI = MBB.begin(); MachineFrameInfo &MFI = MF.getFrameInfo(); ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); - const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo(); const ThumbRegisterInfo *RegInfo = static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo()); const Thumb1InstrInfo &TII = @@ -180,16 +176,13 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, // belongs to which callee-save spill areas. unsigned FRSize = 0, GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0; int FramePtrSpillFI = 0; + CFIInstBuilder CFIBuilder(MBB, MBBI, MachineInstr::FrameSetup); if (ArgRegsSaveSize) { emitPrologueEpilogueSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -ArgRegsSaveSize, ARM::NoRegister, MachineInstr::FrameSetup); CFAOffset += ArgRegsSaveSize; - unsigned CFIIndex = - MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, CFAOffset)); - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex) - .setMIFlags(MachineInstr::FrameSetup); + CFIBuilder.buildDefCFAOffset(CFAOffset); } if (!AFI->hasStackFrame()) { @@ -198,11 +191,7 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, -(NumBytes - ArgRegsSaveSize), ARM::NoRegister, MachineInstr::FrameSetup); CFAOffset += NumBytes - ArgRegsSaveSize; - unsigned CFIIndex = MF.addFrameInst( - MCCFIInstruction::cfiDefCfaOffset(nullptr, CFAOffset)); - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex) - .setMIFlags(MachineInstr::FrameSetup); + CFIBuilder.buildDefCFAOffset(CFAOffset); } return; } @@ -210,9 +199,9 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, bool HasFrameRecordArea = hasFP(MF) && ARM::hGPRRegClass.contains(FramePtr); for (const CalleeSavedInfo &I : CSI) { - Register Reg = I.getReg(); + MCRegister Reg = I.getReg(); int FI = I.getFrameIdx(); - if (Reg == FramePtr) + if (Reg == FramePtr.asMCReg()) FramePtrSpillFI = FI; switch (Reg) { case ARM::R11: @@ -340,20 +329,11 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, .add(predOps(ARMCC::AL)); } - if(FramePtrOffsetInBlock) { - unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfa( - nullptr, MRI->getDwarfRegNum(FramePtr, true), (CFAOffset - FramePtrOffsetInBlock))); - BuildMI(MBB, AfterPush, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex) - .setMIFlags(MachineInstr::FrameSetup); - } else { - unsigned CFIIndex = - MF.addFrameInst(MCCFIInstruction::createDefCfaRegister( - nullptr, MRI->getDwarfRegNum(FramePtr, true))); - BuildMI(MBB, AfterPush, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex) - .setMIFlags(MachineInstr::FrameSetup); - } + CFIBuilder.setInsertPoint(AfterPush); + if (FramePtrOffsetInBlock) + CFIBuilder.buildDefCFA(FramePtr, CFAOffset - FramePtrOffsetInBlock); + else + CFIBuilder.buildDefCFARegister(FramePtr); if (NumBytes > 508) // If offset is > 508 then sp cannot be adjusted in a single instruction, // try restoring from fp instead. @@ -362,18 +342,11 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, // Emit call frame information for the callee-saved low registers. if (GPRCS1Size > 0) { - MachineBasicBlock::iterator Pos = std::next(GPRCS1Push); - if (adjustedGPRCS1Size) { - unsigned CFIIndex = - MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, CFAOffset)); - BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex) - .setMIFlags(MachineInstr::FrameSetup); - } + CFIBuilder.setInsertPoint(std::next(GPRCS1Push)); + if (adjustedGPRCS1Size) + CFIBuilder.buildDefCFAOffset(CFAOffset); for (const CalleeSavedInfo &I : CSI) { - Register Reg = I.getReg(); - int FI = I.getFrameIdx(); - switch (Reg) { + switch (I.getReg()) { case ARM::R8: case ARM::R9: case ARM::R10: @@ -389,11 +362,8 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, case ARM::R6: case ARM::R7: case ARM::LR: - unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset( - nullptr, MRI->getDwarfRegNum(Reg, true), MFI.getObjectOffset(FI))); - BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex) - .setMIFlags(MachineInstr::FrameSetup); + CFIBuilder.buildOffset(I.getReg(), + MFI.getObjectOffset(I.getFrameIdx())); break; } } @@ -401,23 +371,17 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, // Emit call frame information for the callee-saved high registers. if (GPRCS2Size > 0) { - MachineBasicBlock::iterator Pos = std::next(GPRCS2Push); + CFIBuilder.setInsertPoint(std::next(GPRCS2Push)); for (auto &I : CSI) { - Register Reg = I.getReg(); - int FI = I.getFrameIdx(); - switch (Reg) { + switch (I.getReg()) { case ARM::R8: case ARM::R9: case ARM::R10: case ARM::R11: - case ARM::R12: { - unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset( - nullptr, MRI->getDwarfRegNum(Reg, true), MFI.getObjectOffset(FI))); - BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex) - .setMIFlags(MachineInstr::FrameSetup); + case ARM::R12: + CFIBuilder.buildOffset(I.getReg(), + MFI.getObjectOffset(I.getFrameIdx())); break; - } default: break; } @@ -432,8 +396,8 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, // at this point in the prologue, so pick one. unsigned ScratchRegister = ARM::NoRegister; for (auto &I : CSI) { - Register Reg = I.getReg(); - if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr)) { + MCRegister Reg = I.getReg(); + if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr.asMCReg())) { ScratchRegister = Reg; break; } @@ -442,11 +406,7 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, ScratchRegister, MachineInstr::FrameSetup); if (!HasFP) { CFAOffset += NumBytes; - unsigned CFIIndex = MF.addFrameInst( - MCCFIInstruction::cfiDefCfaOffset(nullptr, CFAOffset)); - BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) - .addCFIIndex(CFIIndex) - .setMIFlags(MachineInstr::FrameSetup); + CFIBuilder.buildDefCFAOffset(CFAOffset); } } @@ -506,7 +466,7 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF, // In some cases, virtual registers have been introduced, e.g. by uses of // emitThumbRegPlusImmInReg. - MF.getProperties().reset(MachineFunctionProperties::Property::NoVRegs); + MF.getProperties().resetNoVRegs(); } void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF, @@ -552,8 +512,8 @@ void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF, unsigned ScratchRegister = ARM::NoRegister; bool HasFP = hasFP(MF); for (auto &I : MFI.getCalleeSavedInfo()) { - Register Reg = I.getReg(); - if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr)) { + MCRegister Reg = I.getReg(); + if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr.asMCReg())) { ScratchRegister = Reg; break; } @@ -1118,8 +1078,8 @@ bool Thumb1FrameLowering::spillCalleeSavedRegisters( std::set<Register> FrameRecord; std::set<Register> SpilledGPRs; for (const CalleeSavedInfo &I : CSI) { - Register Reg = I.getReg(); - if (NeedsFrameRecordPush && (Reg == FPReg || Reg == ARM::LR)) + MCRegister Reg = I.getReg(); + if (NeedsFrameRecordPush && (Reg == FPReg.asMCReg() || Reg == ARM::LR)) FrameRecord.insert(Reg); else SpilledGPRs.insert(Reg); @@ -1206,8 +1166,8 @@ bool Thumb1FrameLowering::restoreCalleeSavedRegisters( std::set<Register> FrameRecord; std::set<Register> SpilledGPRs; for (CalleeSavedInfo &I : CSI) { - Register Reg = I.getReg(); - if (NeedsFrameRecordPop && (Reg == FPReg || Reg == ARM::LR)) + MCRegister Reg = I.getReg(); + if (NeedsFrameRecordPop && (Reg == FPReg.asMCReg() || Reg == ARM::LR)) FrameRecord.insert(Reg); else SpilledGPRs.insert(Reg); |
