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authorDimitry Andric <dim@FreeBSD.org>2021-11-19 20:06:13 +0000
committerDimitry Andric <dim@FreeBSD.org>2021-11-19 20:06:13 +0000
commitc0981da47d5696fe36474fcf86b4ce03ae3ff818 (patch)
treef42add1021b9f2ac6a69ac7cf6c4499962739a45 /llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
parent344a3780b2e33f6ca763666c380202b18aab72a3 (diff)
Diffstat (limited to 'llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp')
-rw-r--r--llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp2
1 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp b/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
index 7dabb9b4abae..abd48dfd5139 100644
--- a/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
@@ -304,13 +304,11 @@ static bool isValidIndexedLoad(const LoadSDNode *LD) {
switch (VT.getSimpleVT().SimpleTy) {
case MVT::i8:
- // Sanity check
if (cast<ConstantSDNode>(LD->getOffset())->getZExtValue() != 1)
return false;
break;
case MVT::i16:
- // Sanity check
if (cast<ConstantSDNode>(LD->getOffset())->getZExtValue() != 2)
return false;