diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2023-12-09 13:28:42 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2023-12-09 13:28:42 +0000 |
| commit | b1c73532ee8997fe5dfbeb7d223027bdf99758a0 (patch) | |
| tree | 7d6e51c294ab6719475d660217aa0c0ad0526292 /llvm/lib/Target/Mips/MipsCallLowering.cpp | |
| parent | 7fa27ce4a07f19b07799a767fc29416f3b625afb (diff) | |
Diffstat (limited to 'llvm/lib/Target/Mips/MipsCallLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsCallLowering.cpp | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp index 4d6ca5ac2bcc..1cd360fe30f8 100644 --- a/llvm/lib/Target/Mips/MipsCallLowering.cpp +++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp @@ -93,13 +93,14 @@ public: private: void assignValueToReg(Register ValVReg, Register PhysReg, - CCValAssign VA) override; + const CCValAssign &VA) override; Register getStackAddress(uint64_t Size, int64_t Offset, MachinePointerInfo &MPO, ISD::ArgFlagsTy Flags) override; void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, - MachinePointerInfo &MPO, CCValAssign &VA) override; + const MachinePointerInfo &MPO, + const CCValAssign &VA) override; unsigned assignCustomValue(CallLowering::ArgInfo &Arg, ArrayRef<CCValAssign> VAs, @@ -129,7 +130,7 @@ private: void MipsIncomingValueHandler::assignValueToReg(Register ValVReg, Register PhysReg, - CCValAssign VA) { + const CCValAssign &VA) { markPhysRegUsed(PhysReg); IncomingValueHandler::assignValueToReg(ValVReg, PhysReg, VA); } @@ -149,10 +150,9 @@ Register MipsIncomingValueHandler::getStackAddress(uint64_t Size, return MIRBuilder.buildFrameIndex(LLT::pointer(0, 32), FI).getReg(0); } -void MipsIncomingValueHandler::assignValueToAddress(Register ValVReg, - Register Addr, LLT MemTy, - MachinePointerInfo &MPO, - CCValAssign &VA) { +void MipsIncomingValueHandler::assignValueToAddress( + Register ValVReg, Register Addr, LLT MemTy, const MachinePointerInfo &MPO, + const CCValAssign &VA) { MachineFunction &MF = MIRBuilder.getMF(); auto MMO = MF.getMachineMemOperand(MPO, MachineMemOperand::MOLoad, MemTy, inferAlignFromPtrInfo(MF, MPO)); @@ -185,7 +185,7 @@ MipsIncomingValueHandler::assignCustomValue(CallLowering::ArgInfo &Arg, markPhysRegUsed(VALo.getLocReg()); markPhysRegUsed(VAHi.getLocReg()); - return 2; + return 1; } namespace { @@ -200,14 +200,15 @@ public: private: void assignValueToReg(Register ValVReg, Register PhysReg, - CCValAssign VA) override; + const CCValAssign &VA) override; Register getStackAddress(uint64_t Size, int64_t Offset, MachinePointerInfo &MPO, ISD::ArgFlagsTy Flags) override; void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, - MachinePointerInfo &MPO, CCValAssign &VA) override; + const MachinePointerInfo &MPO, + const CCValAssign &VA) override; unsigned assignCustomValue(CallLowering::ArgInfo &Arg, ArrayRef<CCValAssign> VAs, std::function<void()> *Thunk) override; @@ -218,7 +219,7 @@ private: void MipsOutgoingValueHandler::assignValueToReg(Register ValVReg, Register PhysReg, - CCValAssign VA) { + const CCValAssign &VA) { Register ExtReg = extendRegister(ValVReg, VA); MIRBuilder.buildCopy(PhysReg, ExtReg); MIB.addUse(PhysReg, RegState::Implicit); @@ -240,10 +241,9 @@ Register MipsOutgoingValueHandler::getStackAddress(uint64_t Size, return AddrReg.getReg(0); } -void MipsOutgoingValueHandler::assignValueToAddress(Register ValVReg, - Register Addr, LLT MemTy, - MachinePointerInfo &MPO, - CCValAssign &VA) { +void MipsOutgoingValueHandler::assignValueToAddress( + Register ValVReg, Register Addr, LLT MemTy, const MachinePointerInfo &MPO, + const CCValAssign &VA) { MachineFunction &MF = MIRBuilder.getMF(); uint64_t LocMemOffset = VA.getLocMemOffset(); |