diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2021-12-02 21:02:54 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2021-12-02 21:02:54 +0000 |
| commit | f65dcba83ce5035ab88a85fe17628b447eb56e1b (patch) | |
| tree | 35f37bb72b3cfc6060193e66c76ee7c9478969b0 /llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp | |
| parent | 846a2208a8ab099f595fe7e8b2e6d54a7b5e67fb (diff) | |
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp')
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp b/llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp index ef39f80a94ef..d2932de5a6ea 100644 --- a/llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp +++ b/llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp @@ -93,10 +93,8 @@ MCOperand SystemZMCInstLower::lowerOperand(const MachineOperand &MO) const { void SystemZMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { OutMI.setOpcode(MI->getOpcode()); - for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) { - const MachineOperand &MO = MI->getOperand(I); + for (const MachineOperand &MO : MI->operands()) // Ignore all implicit register operands. if (!MO.isReg() || !MO.isImplicit()) OutMI.addOperand(lowerOperand(MO)); - } } |