diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2021-11-19 20:06:13 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2021-11-19 20:06:13 +0000 |
| commit | c0981da47d5696fe36474fcf86b4ce03ae3ff818 (patch) | |
| tree | f42add1021b9f2ac6a69ac7cf6c4499962739a45 /llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp | |
| parent | 344a3780b2e33f6ca763666c380202b18aab72a3 (diff) | |
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp')
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp b/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp index 9bee5e8d1864..4bc979de795d 100644 --- a/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp +++ b/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp @@ -46,9 +46,9 @@ static MachineBasicBlock *getSingleSchedPred(MachineBasicBlock *MBB, // The loop header has two predecessors, return the latch, but not for a // single block loop. if (MBB->pred_size() == 2 && Loop != nullptr && Loop->getHeader() == MBB) { - for (auto I = MBB->pred_begin(); I != MBB->pred_end(); ++I) - if (Loop->contains(*I)) - PredMBB = (*I == MBB ? nullptr : *I); + for (MachineBasicBlock *Pred : MBB->predecessors()) + if (Loop->contains(Pred)) + PredMBB = (Pred == MBB ? nullptr : Pred); } assert ((PredMBB == nullptr || !Loop || Loop->contains(PredMBB)) @@ -106,13 +106,12 @@ void SystemZPostRASchedStrategy::enterMBB(MachineBasicBlock *NextMBB) { // Emit incoming terminator(s). Be optimistic and assume that branch // prediction will generally do "the right thing". - for (MachineBasicBlock::iterator I = SinglePredMBB->getFirstTerminator(); - I != SinglePredMBB->end(); I++) { - LLVM_DEBUG(dbgs() << "** Emitting incoming branch: "; I->dump();); - bool TakenBranch = (I->isBranch() && - (TII->getBranchInfo(*I).isIndirect() || - TII->getBranchInfo(*I).getMBBTarget() == MBB)); - HazardRec->emitInstruction(&*I, TakenBranch); + for (MachineInstr &MI : SinglePredMBB->terminators()) { + LLVM_DEBUG(dbgs() << "** Emitting incoming branch: "; MI.dump();); + bool TakenBranch = (MI.isBranch() && + (TII->getBranchInfo(MI).isIndirect() || + TII->getBranchInfo(MI).getMBBTarget() == MBB)); + HazardRec->emitInstruction(&MI, TakenBranch); if (TakenBranch) break; } |
