diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2020-01-17 20:45:01 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-01-17 20:45:01 +0000 |
| commit | 706b4fc47bbc608932d3b491ae19a3b9cde9497b (patch) | |
| tree | 4adf86a776049cbf7f69a1929c4babcbbef925eb /llvm/utils/TableGen/X86FoldTablesEmitter.cpp | |
| parent | 7cc9cf2bf09f069cb2dd947ead05d0b54301fb71 (diff) | |
Notes
Diffstat (limited to 'llvm/utils/TableGen/X86FoldTablesEmitter.cpp')
| -rw-r--r-- | llvm/utils/TableGen/X86FoldTablesEmitter.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp index 2c15e35f234d..8026c324cd40 100644 --- a/llvm/utils/TableGen/X86FoldTablesEmitter.cpp +++ b/llvm/utils/TableGen/X86FoldTablesEmitter.cpp @@ -618,14 +618,14 @@ void X86FoldTablesEmitter::run(formatted_raw_ostream &OS) { uint8_t Opc = getValueFromBitsInit(MemInst->TheDef->getValueAsBitsInit("Opcode")); - if (RegInsts.count(Opc) == 0) + auto RegInstsIt = RegInsts.find(Opc); + if (RegInstsIt == RegInsts.end()) continue; // Two forms (memory & register) of the same instruction must have the same // opcode. try matching only with register form instructions with the same // opcode. - std::vector<const CodeGenInstruction *> &OpcRegInsts = - RegInsts.find(Opc)->second; + std::vector<const CodeGenInstruction *> &OpcRegInsts = RegInstsIt->second; auto Match = find_if(OpcRegInsts, IsMatch(MemInst, Records)); if (Match != OpcRegInsts.end()) { |