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authorEmmanuel Vadot <manu@FreeBSD.org>2022-08-10 12:05:33 +0000
committerEmmanuel Vadot <manu@FreeBSD.org>2022-08-10 12:05:33 +0000
commit17bac45f172c86f09a59b2aca99646ab17f7a606 (patch)
treeb1317ae24dd32a3bda5dfd1c6111d1abe99296e1 /src/arm/imx6qdl-phytec-pfla02.dtsi
parent71ca10f8bbe6096fb8f641e138cd06d189f2b4e3 (diff)
downloadsrc-17bac45f172c86f09a59b2aca99646ab17f7a606.tar.gz
src-17bac45f172c86f09a59b2aca99646ab17f7a606.zip
Diffstat (limited to 'src/arm/imx6qdl-phytec-pfla02.dtsi')
-rw-r--r--src/arm/imx6qdl-phytec-pfla02.dtsi5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/arm/imx6qdl-phytec-pfla02.dtsi b/src/arm/imx6qdl-phytec-pfla02.dtsi
index 7bd658b7bdda..f3236204cb5a 100644
--- a/src/arm/imx6qdl-phytec-pfla02.dtsi
+++ b/src/arm/imx6qdl-phytec-pfla02.dtsi
@@ -322,8 +322,8 @@
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
- MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1
- MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1
+ MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
+ MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1
>;
};
@@ -410,6 +410,7 @@
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
+ uart-has-rtscts;
status = "disabled";
};