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| author | Andrew Turner <andrew@FreeBSD.org> | 2016-07-27 10:33:45 +0000 |
|---|---|---|
| committer | Andrew Turner <andrew@FreeBSD.org> | 2016-07-27 10:33:45 +0000 |
| commit | c7716441be3a4a48aa7b7cdf69a15625c1cd8ef5 (patch) | |
| tree | 2a59dacd09463974e72f84b0e05f237b0ba3f57b /src/arm/rk3066a.dtsi | |
| parent | 235ad806ee815395bce54dc1b0ce1c06cd29b44a (diff) | |
| download | src-c7716441be3a4a48aa7b7cdf69a15625c1cd8ef5.tar.gz src-c7716441be3a4a48aa7b7cdf69a15625c1cd8ef5.zip | |
Notes
Diffstat (limited to 'src/arm/rk3066a.dtsi')
| -rw-r--r-- | src/arm/rk3066a.dtsi | 30 |
1 files changed, 22 insertions, 8 deletions
diff --git a/src/arm/rk3066a.dtsi b/src/arm/rk3066a.dtsi index 58bac5053858..c0ba86c3a2ab 100644 --- a/src/arm/rk3066a.dtsi +++ b/src/arm/rk3066a.dtsi @@ -61,11 +61,13 @@ reg = <0x0>; operating-points = < /* kHz uV */ - 1008000 1075000 - 816000 1025000 - 600000 1025000 - 504000 1000000 - 312000 975000 + 1416000 1300000 + 1200000 1175000 + 1008000 1125000 + 816000 1125000 + 600000 1100000 + 504000 1100000 + 312000 1075000 >; clock-latency = <40000>; clocks = <&cru ARMCLK>; @@ -167,7 +169,7 @@ clocks = <&cru PCLK_EFUSE>; clock-names = "pclk_efuse"; - cpu_leakage: cpu_leakage { + cpu_leakage: cpu_leakage@17 { reg = <0x17 0x1>; }; }; @@ -188,6 +190,16 @@ clock-names = "timer", "pclk"; }; + tsadc: tsadc@20060000 { + compatible = "rockchip,rk3066-tsadc"; + reg = <0x20060000 0x100>; + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "saradc", "apb_pclk"; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + status = "disabled"; + }; + usbphy: phy { compatible = "rockchip,rk3066a-usb-phy", "rockchip,rk3288-usb-phy"; rockchip,grf = <&grf>; @@ -195,18 +207,20 @@ #size-cells = <0>; status = "disabled"; - usbphy0: usb-phy0 { + usbphy0: usb-phy@17c { #phy-cells = <0>; reg = <0x17c>; clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; + #clock-cells = <0>; }; - usbphy1: usb-phy1 { + usbphy1: usb-phy@188 { #phy-cells = <0>; reg = <0x188>; clocks = <&cru SCLK_OTGPHY1>; clock-names = "phyclk"; + #clock-cells = <0>; }; }; |