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| author | Emmanuel Vadot <manu@FreeBSD.org> | 2024-04-19 16:04:55 +0000 |
|---|---|---|
| committer | Emmanuel Vadot <manu@FreeBSD.org> | 2024-04-19 16:04:55 +0000 |
| commit | 48aa10e065908667e32e3aab09f1c787cd127470 (patch) | |
| tree | 141762c42a29902f49f1d104ba845bff099f3c9f /src/arm/st/stm32f746.dtsi | |
| parent | 1fcc28bca1057f051708a8fc59129ea42c574693 (diff) | |
| download | src-vendor/device-tree.tar.gz src-vendor/device-tree.zip | |
Import device-tree files from Linux 6.8vendor/device-tree/6.8vendor/device-tree
Diffstat (limited to 'src/arm/st/stm32f746.dtsi')
| -rw-r--r-- | src/arm/st/stm32f746.dtsi | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/src/arm/st/stm32f746.dtsi b/src/arm/st/stm32f746.dtsi index 53a8e2dec9a4..65c72b6fcc83 100644 --- a/src/arm/st/stm32f746.dtsi +++ b/src/arm/st/stm32f746.dtsi @@ -274,6 +274,26 @@ clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; }; + spi2: spi@40003800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40003800 0x400>; + interrupts = <36>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI2)>; + status = "disabled"; + }; + + spi3: spi@40003c00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40003c00 0x400>; + interrupts = <51>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI3)>; + status = "disabled"; + }; + usart2: serial@40004400 { compatible = "st,stm32f7-uart"; reg = <0x40004400 0x400>; @@ -491,9 +511,30 @@ status = "disabled"; }; + spi1: spi@40013000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40013000 0x400>; + interrupts = <35>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI1)>; + status = "disabled"; + }; + + spi4: spi@40013400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40013400 0x400>; + interrupts = <84>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI4)>; + status = "disabled"; + }; + syscfg: syscon@40013800 { compatible = "st,stm32-syscfg", "syscon"; reg = <0x40013800 0x400>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SYSCFG)>; }; exti: interrupt-controller@40013c00 { @@ -554,6 +595,26 @@ }; }; + spi5: spi@40015000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40015000 0x400>; + interrupts = <85>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI5)>; + status = "disabled"; + }; + + spi6: spi@40015400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40015400 0x400>; + interrupts = <86>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI6)>; + status = "disabled"; + }; + ltdc: display-controller@40016800 { compatible = "st,stm32-ltdc"; reg = <0x40016800 0x200>; |