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authorEmmanuel Vadot <manu@FreeBSD.org>2023-08-09 13:31:58 +0000
committerEmmanuel Vadot <manu@FreeBSD.org>2023-08-09 13:31:58 +0000
commitc47d0ea183983e0631f8cc41e9d25e4854368a0a (patch)
tree329e5cd35d28aea1a42c6228cb539abaddf662a2 /src/arm64/qcom/qdu1000.dtsi
parent4a8223f297bb7dff7a684da702777d7e94d054fe (diff)
downloadsrc-c47d0ea183983e0631f8cc41e9d25e4854368a0a.tar.gz
src-c47d0ea183983e0631f8cc41e9d25e4854368a0a.zip
Diffstat (limited to 'src/arm64/qcom/qdu1000.dtsi')
-rw-r--r--src/arm64/qcom/qdu1000.dtsi31
1 files changed, 27 insertions, 4 deletions
diff --git a/src/arm64/qcom/qdu1000.dtsi b/src/arm64/qcom/qdu1000.dtsi
index f234159d2060..fb553f0bb17a 100644
--- a/src/arm64/qcom/qdu1000.dtsi
+++ b/src/arm64/qcom/qdu1000.dtsi
@@ -27,6 +27,7 @@
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x0>;
+ clocks = <&cpufreq_hw 0>;
enable-method = "psci";
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
@@ -34,9 +35,13 @@
next-level-cache = <&L2_0>;
L2_0: l2-cache {
compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
next-level-cache = <&L3_0>;
L3_0: l3-cache {
compatible = "cache";
+ cache-level = <3>;
+ cache-unified;
};
};
};
@@ -45,6 +50,7 @@
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x100>;
+ clocks = <&cpufreq_hw 0>;
enable-method = "psci";
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
@@ -52,6 +58,8 @@
next-level-cache = <&L2_100>;
L2_100: l2-cache {
compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
next-level-cache = <&L3_0>;
};
};
@@ -60,6 +68,7 @@
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x200>;
+ clocks = <&cpufreq_hw 0>;
enable-method = "psci";
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
@@ -67,6 +76,8 @@
next-level-cache = <&L2_200>;
L2_200: l2-cache {
compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
next-level-cache = <&L3_0>;
};
};
@@ -75,6 +86,7 @@
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x0 0x300>;
+ clocks = <&cpufreq_hw 0>;
enable-method = "psci";
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
@@ -82,6 +94,8 @@
next-level-cache = <&L2_300>;
L2_300: l2-cache {
compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
next-level-cache = <&L3_0>;
};
};
@@ -412,8 +426,6 @@
pinctrl-0 = <&qup_uart0_default>;
pinctrl-names = "default";
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
status = "disabled";
};
@@ -581,8 +593,6 @@
pinctrl-0 = <&qup_uart7_tx>, <&qup_uart7_rx>;
pinctrl-names = "default";
interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
status = "disabled";
};
};
@@ -1312,6 +1322,7 @@
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
clock-names = "xo", "alternate";
#freq-domain-cells = <1>;
+ #clock-cells = <1>;
};
gem_noc: interconnect@19100000 {
@@ -1320,6 +1331,18 @@
qcom,bcm-voters = <&apps_bcm_voter>;
#interconnect-cells = <2>;
};
+
+ system-cache-controller@19200000 {
+ compatible = "qcom,qdu1000-llcc";
+ reg = <0 0x19200000 0 0xd80000>,
+ <0 0x1a200000 0 0x80000>,
+ <0 0x221c8128 0 0x4>;
+ reg-names = "llcc_base",
+ "llcc_broadcast_base",
+ "multi_channel_register";
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ multi-ch-bit-off = <24 2>;
+ };
};
timer {