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authorMarius Strobl <marius@FreeBSD.org>2010-10-15 14:52:11 +0000
committerMarius Strobl <marius@FreeBSD.org>2010-10-15 14:52:11 +0000
commit8e5d93dbb40452863b266a378868255bf986af67 (patch)
tree6dd0ca5b178547c1f20c8ce1f607ac42d4afe2ae /sys/dev/dc
parentd1457e3703928a249a45a6dd996918bc7eb6ba20 (diff)
Notes
Diffstat (limited to 'sys/dev/dc')
-rw-r--r--sys/dev/dc/if_dc.c64
-rw-r--r--sys/dev/dc/pnphy.c3
2 files changed, 30 insertions, 37 deletions
diff --git a/sys/dev/dc/if_dc.c b/sys/dev/dc/if_dc.c
index 19bf069e9215..856908129bc4 100644
--- a/sys/dev/dc/if_dc.c
+++ b/sys/dev/dc/if_dc.c
@@ -779,26 +779,6 @@ dc_miibus_readreg(device_t dev, int phy, int reg)
sc = device_get_softc(dev);
bzero(&frame, sizeof(frame));
- /*
- * Note: both the AL981 and AN983 have internal PHYs,
- * however the AL981 provides direct access to the PHY
- * registers while the AN983 uses a serial MII interface.
- * The AN983's MII interface is also buggy in that you
- * can read from any MII address (0 to 31), but only address 1
- * behaves normally. To deal with both cases, we pretend
- * that the PHY is at MII address 1.
- */
- if (DC_IS_ADMTEK(sc) && phy != DC_ADMTEK_PHYADDR)
- return (0);
-
- /*
- * Note: the ukphy probes of the RS7112 report a PHY at
- * MII address 0 (possibly HomePNA?) and 1 (ethernet)
- * so we only respond to correct one.
- */
- if (DC_IS_CONEXANT(sc) && phy != DC_CONEXANT_PHYADDR)
- return (0);
-
if (sc->dc_pmode != DC_PMODE_MII) {
if (phy == (MII_NPHY - 1)) {
switch (reg) {
@@ -901,12 +881,6 @@ dc_miibus_writereg(device_t dev, int phy, int reg, int data)
sc = device_get_softc(dev);
bzero(&frame, sizeof(frame));
- if (DC_IS_ADMTEK(sc) && phy != DC_ADMTEK_PHYADDR)
- return (0);
-
- if (DC_IS_CONEXANT(sc) && phy != DC_CONEXANT_PHYADDR)
- return (0);
-
if (DC_IS_PNIC(sc)) {
CSR_WRITE_4(sc, DC_PN_MII, DC_PN_MIIOPCODE_WRITE |
(phy << 23) | (reg << 10) | data);
@@ -1815,14 +1789,12 @@ dc_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
static int
dc_attach(device_t dev)
{
- int tmp = 0;
uint32_t eaddr[(ETHER_ADDR_LEN+3)/4];
u_int32_t command;
struct dc_softc *sc;
struct ifnet *ifp;
u_int32_t reg, revision;
- int error = 0, rid, mac_offset;
- int i;
+ int error, i, mac_offset, phy, rid, tmp;
u_int8_t *mac;
sc = device_get_softc(dev);
@@ -2217,6 +2189,7 @@ dc_attach(device_t dev)
* old selection (SIA only or SIA/SYM) and attach the dcphy
* driver instead.
*/
+ tmp = 0;
if (DC_IS_INTEL(sc)) {
dc_apply_fixup(sc, IFM_AUTO);
tmp = sc->dc_pmode;
@@ -2225,7 +2198,7 @@ dc_attach(device_t dev)
/*
* Setup General Purpose port mode and data so the tulip can talk
- * to the MII. This needs to be done before mii_phy_probe so that
+ * to the MII. This needs to be done before mii_attach so that
* we can actually see them.
*/
if (DC_IS_XIRCOM(sc)) {
@@ -2237,16 +2210,37 @@ dc_attach(device_t dev)
DELAY(10);
}
- error = mii_phy_probe(dev, &sc->dc_miibus,
- dc_ifmedia_upd, dc_ifmedia_sts);
+ phy = MII_PHY_ANY;
+ /*
+ * Note: both the AL981 and AN983 have internal PHYs, however the
+ * AL981 provides direct access to the PHY registers while the AN983
+ * uses a serial MII interface. The AN983's MII interface is also
+ * buggy in that you can read from any MII address (0 to 31), but
+ * only address 1 behaves normally. To deal with both cases, we
+ * pretend that the PHY is at MII address 1.
+ */
+ if (DC_IS_ADMTEK(sc))
+ phy = DC_ADMTEK_PHYADDR;
+
+ /*
+ * Note: the ukphy probes of the RS7112 report a PHY at MII address
+ * 0 (possibly HomePNA?) and 1 (ethernet) so we only respond to the
+ * correct one.
+ */
+ if (DC_IS_CONEXANT(sc))
+ phy = DC_CONEXANT_PHYADDR;
+
+ error = mii_attach(dev, &sc->dc_miibus, ifp, dc_ifmedia_upd,
+ dc_ifmedia_sts, BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0);
if (error && DC_IS_INTEL(sc)) {
sc->dc_pmode = tmp;
if (sc->dc_pmode != DC_PMODE_SIA)
sc->dc_pmode = DC_PMODE_SYM;
sc->dc_flags |= DC_21143_NWAY;
- mii_phy_probe(dev, &sc->dc_miibus,
- dc_ifmedia_upd, dc_ifmedia_sts);
+ mii_attach(dev, &sc->dc_miibus, ifp, dc_ifmedia_upd,
+ dc_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY,
+ MII_OFFSET_ANY, 0);
/*
* For non-MII cards, we need to have the 21143
* drive the LEDs. Except there are some systems
@@ -2261,7 +2255,7 @@ dc_attach(device_t dev)
}
if (error) {
- device_printf(dev, "MII without any PHY!\n");
+ device_printf(dev, "attaching PHYs failed\n");
goto fail;
}
diff --git a/sys/dev/dc/pnphy.c b/sys/dev/dc/pnphy.c
index 570ee5fa0c64..15704b2aebb5 100644
--- a/sys/dev/dc/pnphy.c
+++ b/sys/dev/dc/pnphy.c
@@ -132,6 +132,7 @@ pnphy_attach(device_t dev)
mii = ma->mii_data;
LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
+ sc->mii_flags = miibus_get_flags(dev);
sc->mii_inst = mii->mii_instance++;
sc->mii_phy = ma->mii_phyno;
sc->mii_service = pnphy_service;
@@ -169,8 +170,6 @@ pnphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
break;
- sc->mii_flags = 0;
-
switch (IFM_SUBTYPE(ife->ifm_media)) {
case IFM_AUTO:
/* NWAY is busted on this chip */