1 files changed, 17 insertions, 8 deletions

diff --git a/sys/dev/ic/ns16550.h b/sys/dev/ic/ns16550.h
index 3cdeb556bef4..9b47d7984e03 100644
--- a/sys/dev/ic/ns16550.h
+++ b/sys/dev/ic/ns16550.h
@@ -41,6 +41,8 @@
 /* 8250 registers #[0-6]. */
 
 #define	com_data	0	/* data register (R/W) */
+#define	com_thr		com_data /* transmitter holding register (W) */
+#define	com_rhr		com_data /* receiver holding register (R) */
 
 #define	com_ier		1	/* interrupt enable register (W) */
 #define	IER_ERXRDY	0x1
@@ -49,6 +51,7 @@
 #define	IER_EMSC	0x8
 
 #define	com_iir		2	/* interrupt identification register (R) */
+#define	com_isr		com_iir	/* interrupt status register (R) */
 #define	IIR_IMASK	0xf
 #define	IIR_RXTOUT	0xc
 #define	IIR_RLS		0x6
@@ -58,9 +61,13 @@
 #define	IIR_MLSC	0x0
 #define	IIR_FIFO_MASK	0xc0	/* set if FIFOs are enabled */
 
-#define	com_lctl	3	/* line control register (R/W) */
-#define	com_cfcr	3	/* character format control register (R/W) */
-#define	CFCR_DLAB	0x80
+#define	com_lcr		3	/* line control register (R/W) */
+#define	com_lctl	com_lcr
+#define	com_cfcr	com_lcr	/* character format control register (R/W) */
+#define	LCR_DLAB	0x80
+#define	CFCR_DLAB	LCR_DLAB
+#define	LCR_EFR_ENABLE	0xbf	/* magic to enable EFR on 16650 up */
+#define	CFCR_EFR_ENABLE	LCR_EFR_ENABLE
 #define	CFCR_SBREAK	0x40
 #define	CFCR_PZERO	0x30
 #define	CFCR_PONE	0x20
@@ -72,7 +79,6 @@
 #define	CFCR_7BITS	0x02
 #define	CFCR_6BITS	0x01
 #define	CFCR_5BITS	0x00
-#define	CFCR_EFR_ENABLE	0xbf	/* magic to enable EFR on 16650 up */
 
 #define	com_mcr		4	/* modem control register (R/W) */
 #define	MCR_PRESCALE	0x80	/* only available on 16650 up */
@@ -104,14 +110,17 @@
 #define	MSR_DCTS	0x01
 
 /* 8250 multiplexed registers #[0-1].  Access enabled by LCR[7]. */
-#define	com_dlbl	0	/* divisor latch low (W) */
-#define	com_dlbh	1	/* divisor latch high (W) */
+#define	com_dll		0	/* divisor latch low (R/W) */
+#define	com_dlbl	com_dll
+#define	com_dlm		1	/* divisor latch high (R/W) */
+#define	com_dlbh	com_dlm
 
 /* 16450 register #7.  Not multiplexed. */
 #define	com_scr		7	/* scratch register (R/W) */
 
 /* 16550 register #2.  Not multiplexed. */
-#define	com_fifo	2	/* FIFO control register (W) */
+#define	com_fcr		2	/* FIFO control register (W) */
+#define	com_fifo	com_fcr
 #define	FIFO_ENABLE	0x01
 #define	FIFO_RCV_RST	0x02
 #define	FIFO_XMT_RST	0x04
@@ -123,7 +132,7 @@
 
 /* 16650 registers #2,[4-7].  Access enabled by LCR_EFR_ENABLE. */
 
-#define	com_efr		com_fifo /* enhanced feature register (R/W) */
+#define	com_efr		2	/* enhanced features register (R/W) */
 #define	EFR_EFE		0x10	/* enhanced functions enable */
 
 #ifdef PC98