15 files changed, 5482 insertions, 11223 deletions

diff --git a/sys/dev/aic7xxx/93cx6.c b/sys/dev/aic7xxx/93cx6.c
deleted file mode 100644
index 06e547b57b13..000000000000
--- a/sys/dev/aic7xxx/93cx6.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
- * Interface for the 93C66/56/46/26/06 serial eeprom parts.
- *
- * Copyright (c) 1995, 1996 Daniel M. Eischen
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice immediately at the beginning of the file, without modification,
- *    this list of conditions, and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Absolutely no warranty of function or purpose is made by the author
- *    Daniel M. Eischen.
- * 4. Modifications may be freely made to this file if the above conditions
- *    are met.
- *
- * $FreeBSD$
- */
-
-/*
- *   The instruction set of the 93C66/56/46/26/06 chips are as follows:
- *
- *               Start  OP	    *
- *     Function   Bit  Code  Address**  Data     Description
- *     -------------------------------------------------------------------
- *     READ        1    10   A5 - A0             Reads data stored in memory,
- *                                               starting at specified address
- *     EWEN        1    00   11XXXX              Write enable must preceed
- *                                               all programming modes
- *     ERASE       1    11   A5 - A0             Erase register A5A4A3A2A1A0
- *     WRITE       1    01   A5 - A0   D15 - D0  Writes register
- *     ERAL        1    00   10XXXX              Erase all registers
- *     WRAL        1    00   01XXXX    D15 - D0  Writes to all registers
- *     EWDS        1    00   00XXXX              Disables all programming
- *                                               instructions
- *     *Note: A value of X for address is a don't care condition.
- *    **Note: There are 8 address bits for the 93C56/66 chips unlike
- *	      the 93C46/26/06 chips which have 6 address bits.
- *
- *   The 93C46 has a four wire interface: clock, chip select, data in, and
- *   data out.  In order to perform one of the above functions, you need
- *   to enable the chip select for a clock period (typically a minimum of
- *   1 usec, with the clock high and low a minimum of 750 and 250 nsec
- *   respectively).  While the chip select remains high, you can clock in
- *   the instructions (above) starting with the start bit, followed by the
- *   OP code, Address, and Data (if needed).  For the READ instruction, the
- *   requested 16-bit register contents is read from the data out line but
- *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB
- *   first).  The clock cycling from low to high initiates the next data
- *   bit to be sent from the chip.
- *
- */
-
-#include "opt_aic7xxx.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <machine/bus_memio.h>
-#include <machine/bus_pio.h>
-#include <machine/bus.h>
-#include <dev/aic7xxx/93cx6.h>
-
-/*
- * Right now, we only have to read the SEEPROM.  But we make it easier to
- * add other 93Cx6 functions.
- */
-static struct seeprom_cmd {
-  	unsigned char len;
- 	unsigned char bits[3];
-} seeprom_read = {3, {1, 1, 0}};
-
-/*
- * Wait for the SEERDY to go high; about 800 ns.
- */
-#define CLOCK_PULSE(sd, rdy)				\
-	while ((SEEPROM_STATUS_INB(sd) & rdy) == 0) {	\
-		;  /* Do nothing */			\
-	}						\
-	(void)SEEPROM_INB(sd);	/* Clear clock */
-
-/*
- * Read the serial EEPROM and returns 1 if successful and 0 if
- * not successful.
- */
-int
-read_seeprom(sd, buf, start_addr, count)
-	struct seeprom_descriptor *sd;
-	u_int16_t *buf;
-	bus_size_t start_addr;
-	bus_size_t count;
-{
-	int i = 0;
-	u_int k = 0;
-	u_int16_t v;
-	u_int8_t temp;
-
-	/*
-	 * Read the requested registers of the seeprom.  The loop
-	 * will range from 0 to count-1.
-	 */
-	for (k = start_addr; k < count + start_addr; k++) {
-		/* Send chip select for one clock cycle. */
-		temp = sd->sd_MS ^ sd->sd_CS;
-		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
-		CLOCK_PULSE(sd, sd->sd_RDY);
-
-		/*
-		 * Now we're ready to send the read command followed by the
-		 * address of the 16-bit register we want to read.
-		 */
-		for (i = 0; i < seeprom_read.len; i++) {
-			if (seeprom_read.bits[i] != 0)
-				temp ^= sd->sd_DO;
-			SEEPROM_OUTB(sd, temp);
-			CLOCK_PULSE(sd, sd->sd_RDY);
-			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
-			CLOCK_PULSE(sd, sd->sd_RDY);
-			if (seeprom_read.bits[i] != 0)
-				temp ^= sd->sd_DO;
-		}
-		/* Send the 6 or 8 bit address (MSB first, LSB last). */
-		for (i = (sd->sd_chip - 1); i >= 0; i--) {
-			if ((k & (1 << i)) != 0)
-				temp ^= sd->sd_DO;
-			SEEPROM_OUTB(sd, temp);
-			CLOCK_PULSE(sd, sd->sd_RDY);
-			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
-			CLOCK_PULSE(sd, sd->sd_RDY);
-			if ((k & (1 << i)) != 0)
-				temp ^= sd->sd_DO;
-		}
-
-		/*
-		 * Now read the 16 bit register.  An initial 0 precedes the
-		 * register contents which begins with bit 15 (MSB) and ends
-		 * with bit 0 (LSB).  The initial 0 will be shifted off the
-		 * top of our word as we let the loop run from 0 to 16.
-		 */
-		v = 0;
-		for (i = 16; i >= 0; i--) {
-			SEEPROM_OUTB(sd, temp);
-			CLOCK_PULSE(sd, sd->sd_RDY);
-			v <<= 1;
-			if (SEEPROM_DATA_INB(sd) & sd->sd_DI)
-				v |= 1;
-			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
-			CLOCK_PULSE(sd, sd->sd_RDY);
-		}
-
-		buf[k - start_addr] = v;
-
-		/* Reset the chip select for the next command cycle. */
-		temp = sd->sd_MS;
-		SEEPROM_OUTB(sd, temp);
-		CLOCK_PULSE(sd, sd->sd_RDY);
-		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
-		CLOCK_PULSE(sd, sd->sd_RDY);
-		SEEPROM_OUTB(sd, temp);
-		CLOCK_PULSE(sd, sd->sd_RDY);
-	}
-#ifdef AHC_DUMP_EEPROM
-	printf("\nSerial EEPROM:\n\t");
-	for (k = 0; k < count; k = k + 1) {
-		if (((k % 8) == 0) && (k != 0)) {
-			printf ("\n\t");
-		}
-		printf (" 0x%x", buf[k]);
-	}
-	printf ("\n");
-#endif
-	return (1);
-}
diff --git a/sys/dev/aic7xxx/93cx6.h b/sys/dev/aic7xxx/93cx6.h
deleted file mode 100644
index 7875032e28de..000000000000
--- a/sys/dev/aic7xxx/93cx6.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * Interface to the 93C46 serial EEPROM that is used to store BIOS
- * settings for the aic7xxx based adaptec SCSI controllers.  It can
- * also be used for 93C26 and 93C06 serial EEPROMS.
- *
- * Copyright (c) 1994, 1995 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * Alternatively, this software may be distributed under the terms of the
- * the GNU Public License ("GPL").
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/param.h>
-#if !defined(__NetBSD__)
-#include <sys/systm.h>
-#endif
-
-#ifdef _KERNEL
-
-typedef enum {
-	C46 = 6,
-	C56_66 = 8
-} seeprom_chip_t;
-
-struct seeprom_descriptor {
-	bus_space_tag_t sd_tag;             
-	bus_space_handle_t sd_bsh;
-	bus_size_t sd_control_offset;
-	bus_size_t sd_status_offset;
-	bus_size_t sd_dataout_offset;
-	seeprom_chip_t sd_chip;
-	u_int16_t sd_MS;
-	u_int16_t sd_RDY;
-	u_int16_t sd_CS;
-	u_int16_t sd_CK;
-	u_int16_t sd_DO;
-	u_int16_t sd_DI;
-};
-
-/*
- * This function will read count 16-bit words from the serial EEPROM and
- * return their value in buf.  The port address of the aic7xxx serial EEPROM
- * control register is passed in as offset.  The following parameters are
- * also passed in:
- *
- *   CS  - Chip select
- *   CK  - Clock
- *   DO  - Data out
- *   DI  - Data in
- *   RDY - SEEPROM ready
- *   MS  - Memory port mode select
- *
- *  A failed read attempt returns 0, and a successful read returns 1.
- */
-
-#define	SEEPROM_INB(sd) \
-	bus_space_read_1(sd->sd_tag, sd->sd_bsh, sd->sd_control_offset)
-#define	SEEPROM_OUTB(sd, value) \
-	bus_space_write_1(sd->sd_tag, sd->sd_bsh, sd->sd_control_offset, value)
-#define	SEEPROM_STATUS_INB(sd) \
-	bus_space_read_1(sd->sd_tag, sd->sd_bsh, sd->sd_status_offset)
-#define	SEEPROM_DATA_INB(sd) \
-	bus_space_read_1(sd->sd_tag, sd->sd_bsh, sd->sd_dataout_offset)
-
-int read_seeprom(struct seeprom_descriptor *sd, u_int16_t *buf,
-		 bus_size_t start_addr, bus_size_t count);
-
-#endif /* _KERNEL */
diff --git a/sys/dev/aic7xxx/ahc_eisa.c b/sys/dev/aic7xxx/ahc_eisa.c
index 4e91eed4974b..9e0e3f007e74 100644
--- a/sys/dev/aic7xxx/ahc_eisa.c
+++ b/sys/dev/aic7xxx/ahc_eisa.c
@@ -1,8 +1,8 @@
 /*
- * Product specific probe and attach routines for:
- * 	27/284X and aic7770 motherboard SCSI controllers
+ * FreeBSD, EISA product support functions
+ * 
  *
- * Copyright (c) 1994, 1995, 1996, 1997, 1998 Justin T. Gibbs.
+ * Copyright (c) 1994, 1995, 1996, 1997, 1998, 2000 Justin T. Gibbs.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -26,92 +26,60 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
+ * $Id$
+ *
  * $FreeBSD$
  */
 
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/bus.h>
-
-#include <machine/bus_pio.h>
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <sys/rman.h>
+#include <dev/aic7xxx/aic7xxx_freebsd.h>
 
 #include <dev/eisa/eisaconf.h>
 
-#include <cam/cam.h>
-#include <cam/cam_ccb.h>
-#include <cam/cam_sim.h>
-#include <cam/cam_xpt_sim.h>
-#include <cam/scsi/scsi_all.h>
-
-#include <dev/aic7xxx/aic7xxx.h>
-#include <dev/aic7xxx/93cx6.h>
-
-#include <aic7xxx_reg.h>
-
-#define EISA_DEVICE_ID_ADAPTEC_AIC7770	0x04907770
-#define EISA_DEVICE_ID_ADAPTEC_274x	0x04907771
-#define EISA_DEVICE_ID_ADAPTEC_284xB	0x04907756 /* BIOS enabled */
-#define EISA_DEVICE_ID_ADAPTEC_284x	0x04907757 /* BIOS disabled*/
-
-#define AHC_EISA_SLOT_OFFSET	0xc00
-#define AHC_EISA_IOSIZE		0x100
-#define INTDEF			0x5cul	/* Interrupt Definition Register */
-
-static void	aha2840_load_seeprom(struct ahc_softc *ahc);
-
-static const char *aic7770_match(eisa_id_t type);
-
-static const char*
-aic7770_match(eisa_id_t type)
-{
-	switch (type) {
-	case EISA_DEVICE_ID_ADAPTEC_AIC7770:
-		return ("Adaptec aic7770 SCSI host adapter");
-		break;
-	case EISA_DEVICE_ID_ADAPTEC_274x:
-		return ("Adaptec 274X SCSI host adapter");
-		break;
-	case EISA_DEVICE_ID_ADAPTEC_284xB:
-	case EISA_DEVICE_ID_ADAPTEC_284x:
-		return ("Adaptec 284X SCSI host adapter");
-		break;
-	default:
-		break;
-	}
-	return (NULL);
-}
-
 static int
 aic7770_probe(device_t dev)
 {
-	const char *desc;
-	u_int32_t iobase;
-	u_int32_t irq;
-	u_int8_t intdef;
-	u_int8_t hcntrl;
-	int shared;
+	struct	 aic7770_identity *entry;
+	struct	 resource *regs;
+	uint32_t iobase;
+	bus_space_handle_t bsh;
+	bus_space_tag_t	tag;
+	u_int	 irq;
+	u_int	 intdef;
+	u_int	 hcntrl;
+	int	 shared;
+	int	 rid;
+	int	 error;
 
-	desc = aic7770_match(eisa_get_id(dev));
-	if (!desc)
+	entry = aic7770_find_device(eisa_get_id(dev));
+	if (entry == NULL)
 		return (ENXIO);
-	device_set_desc(dev, desc);
+	device_set_desc(dev, entry->name);
 
 	iobase = (eisa_get_slot(dev) * EISA_SLOT_SIZE) + AHC_EISA_SLOT_OFFSET;
 
-		/* Pause the card preseving the IRQ type */
-	hcntrl = inb(iobase + HCNTRL) & IRQMS;
+	eisa_add_iospace(dev, iobase, AHC_EISA_IOSIZE, RESVADDR_NONE);
+
+	regs = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
+				0, ~0, 1, RF_ACTIVE);
+	if (regs == NULL) {
+		device_printf(dev, "Unable to map I/O space?!\n");
+		return ENOMEM;
+	}
+
+	tag = rman_get_bustag(regs);
+	bsh = rman_get_bushandle(regs);
+	error = 0;
 
-	outb(iobase + HCNTRL, hcntrl | PAUSE);
+	/* Pause the card preseving the IRQ type */
+	hcntrl = bus_space_read_1(tag, bsh, HCNTRL) & IRQMS;
+	bus_space_write_1(tag, bsh, HCNTRL, hcntrl | PAUSE);
+	while ((bus_space_read_1(tag, bsh, HCNTRL) & PAUSE) == 0)
+		;
 
-	eisa_add_iospace(dev, iobase, AHC_EISA_IOSIZE, RESVADDR_NONE);
-	intdef = inb(INTDEF + iobase);
-	shared = (intdef & 0x80) ? EISA_TRIGGER_EDGE : EISA_TRIGGER_LEVEL;
-	irq = intdef & 0xf;
+	/* Make sure we have a valid interrupt vector */
+	intdef = bus_space_read_1(tag, bsh, INTDEF);
+	shared = (intdef & EDGE_TRIG) ? EISA_TRIGGER_EDGE : EISA_TRIGGER_LEVEL;
+	irq = intdef & VECTOR;
 	switch (irq) {
 	case 9: 
 	case 10:
@@ -119,338 +87,107 @@ aic7770_probe(device_t dev)
 	case 12:
 	case 14:
 	case 15:
-	    break;
+		break;
 	default:
-	    printf("aic7770 at slot %d: illegal "
-		   "irq setting %d\n", eisa_get_slot(dev),
-		   intdef);
-	    irq = 0;
-	    break;
+		printf("aic7770 at slot %d: illegal irq setting %d\n",
+		       eisa_get_slot(dev), intdef);
+		error = ENXIO;
 	}
-	if (irq == 0)
-	    return ENXIO;
 
-	eisa_add_intr(dev, irq, shared);
+	if (error == 0)
+		eisa_add_intr(dev, irq, shared);
 
-	return 0;
+	bus_release_resource(dev, SYS_RES_IOPORT, rid, regs);
+	return (error);
 }
 
 static int
 aic7770_attach(device_t dev)
 {
-	ahc_chip chip;
-	bus_dma_tag_t parent_dmat;
-	struct ahc_softc *ahc;
-	struct resource *io;
-	int error, rid;
+	struct	 aic7770_identity *entry;
+	struct	 ahc_softc *ahc;
+	char	*name;
+	int	 error;
 
-	rid = 0;
-	io = NULL;
-	ahc = NULL;
-	switch (eisa_get_id(dev)) {
-	case EISA_DEVICE_ID_ADAPTEC_274x:
-	case EISA_DEVICE_ID_ADAPTEC_AIC7770:
-		chip = AHC_AIC7770|AHC_EISA;
-		break;
-	case EISA_DEVICE_ID_ADAPTEC_284xB:
-	case EISA_DEVICE_ID_ADAPTEC_284x:
-		chip = AHC_AIC7770|AHC_VL;
-		break;
-	default: 
-		printf("aic7770_attach: Unknown device type!\n");
-		goto bad;
-	}
+	entry = aic7770_find_device(eisa_get_id(dev));
+	if (entry == NULL)
+		return (ENXIO);
+
+	/*
+	 * Allocate a softc for this card and
+	 * set it up for attachment by our
+	 * common detect routine.
+	 */
+	name = malloc(strlen(device_get_nameunit(dev)) + 1, M_DEVBUF, M_NOWAIT);
+	if (name == NULL)
+		return (ENOMEM);
+	strcpy(name, device_get_nameunit(dev));
+	ahc = ahc_alloc(NULL, name);
+	if (ahc == NULL)
+		return (ENOMEM);
 
-	/* XXX Should be a child of the EISA bus dma tag */
+	/* Allocate a dmatag for our SCB DMA maps */
+	/* XXX Should be a child of the PCI bus dma tag */
 	error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1,
 				   /*boundary*/0,
 				   /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
 				   /*highaddr*/BUS_SPACE_MAXADDR,
 				   /*filter*/NULL, /*filterarg*/NULL,
-				   /*maxsize*/MAXBSIZE,
-				   /*nsegments*/AHC_NSEG,
+				   /*maxsize*/MAXBSIZE, /*nsegments*/AHC_NSEG,
 				   /*maxsegsz*/AHC_MAXTRANSFER_SIZE,
-				   /*flags*/BUS_DMA_ALLOCNOW, &parent_dmat);
+				   /*flags*/BUS_DMA_ALLOCNOW,
+				   &ahc->parent_dmat);
 
 	if (error != 0) {
 		printf("ahc_eisa_attach: Could not allocate DMA tag "
 		       "- error %d\n", error);
-		goto bad;
-	}
-
-	io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
-				0, ~0, 1, RF_ACTIVE);
-	if (!io) {
-		device_printf(dev, "No I/O space?!\n");
-		return ENOMEM;
-	}
-
-	if (!(ahc = ahc_alloc(dev, io, SYS_RES_IOPORT, rid,
-			      parent_dmat, chip, AHC_AIC7770_FE, AHC_FNONE,
-			      NULL)))
-		goto bad;
-
-	io = NULL;
-	
-	ahc->channel = 'A';
-	ahc->channel_b = 'B';
-	if (ahc_reset(ahc) != 0) {
-		goto bad;
-	}
-
-	/*
-	 * The IRQMS bit enables level sensitive interrupts. Only allow
-	 * IRQ sharing if it's set.
-	 */
-	rid = 0;
-	ahc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
-				      0, ~0, 1, RF_ACTIVE);
-	if (ahc->irq == NULL) {
-		device_printf(dev, "Can't allocate interrupt\n");
-		goto bad;
-	}
-	ahc->irq_res_type = SYS_RES_IRQ;
-
-	/*
-	 * Tell the user what type of interrupts we're using.
-	 * usefull for debugging irq problems
-	 */
-	if (bootverbose) {
-		printf("%s: Using %s Interrupts\n",
-		       ahc_name(ahc),
-		       ahc->pause & IRQMS ?
-				"Level Sensitive" : "Edge Triggered");
-	}
-
-	/*
-	 * Now that we know we own the resources we need, do the 
-	 * card initialization.
-	 *
-	 * First, the aic7770 card specific setup.
-	 */
-	switch (chip & (AHC_EISA|AHC_VL)) {
-	case AHC_EISA:
-	{
-		u_int biosctrl;
-		u_int scsiconf;
-		u_int scsiconf1;
-#if DEBUG
-		int i;
-#endif
-
-		biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL);
-		scsiconf = ahc_inb(ahc, SCSICONF);
-		scsiconf1 = ahc_inb(ahc, SCSICONF + 1);
-
-#if DEBUG
-		for (i = TARG_SCSIRATE; i <= HA_274_BIOSCTRL; i+=8) {
-			printf("0x%x, 0x%x, 0x%x, 0x%x, "
-			       "0x%x, 0x%x, 0x%x, 0x%x\n",
-				ahc_inb(ahc, i),
-				ahc_inb(ahc, i+1),
-				ahc_inb(ahc, i+2),
-				ahc_inb(ahc, i+3),
-				ahc_inb(ahc, i+4),
-				ahc_inb(ahc, i+5),
-				ahc_inb(ahc, i+6),
-				ahc_inb(ahc, i+7));
-		}
-#endif
-
-		/* Get the primary channel information */
-		if ((biosctrl & CHANNEL_B_PRIMARY) != 0)
-			ahc->flags |= AHC_CHANNEL_B_PRIMARY;
-
-		if ((biosctrl & BIOSMODE) == BIOSDISABLED) {
-			ahc->flags |= AHC_USEDEFAULTS;
-		} else {
-			if ((ahc->features & AHC_WIDE) != 0) {
-				ahc->our_id = scsiconf1 & HWSCSIID;
-				if (scsiconf & TERM_ENB)
-					ahc->flags |= AHC_TERM_ENB_A;
-			} else {
-				ahc->our_id = scsiconf & HSCSIID;
-				ahc->our_id_b = scsiconf1 & HSCSIID;
-				if (scsiconf & TERM_ENB)
-					ahc->flags |= AHC_TERM_ENB_A;
-				if (scsiconf1 & TERM_ENB)
-					ahc->flags |= AHC_TERM_ENB_B;
-			}
-		}
-		/*
-		 * We have no way to tell, so assume extended
-		 * translation is enabled.
-		 */
-		ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B;
-		break;
-	}
-	case AHC_VL:
-	{
-		aha2840_load_seeprom(ahc);
-		break;
-	}
-	default:
-		break;
-	}
-
-	/*
-	 * See if we have a Rev E or higher aic7770. Anything below a
-	 * Rev E will have a R/O autoflush disable configuration bit.
-	 */
-	{
-		char *id_string;
-		u_int8_t sblkctl;
-		u_int8_t sblkctl_orig;
-
-		sblkctl_orig = ahc_inb(ahc, SBLKCTL);
-		sblkctl = sblkctl_orig ^ AUTOFLUSHDIS;
-		ahc_outb(ahc, SBLKCTL, sblkctl);
-		sblkctl = ahc_inb(ahc, SBLKCTL);
-		if (sblkctl != sblkctl_orig) {
-			id_string = "aic7770 >= Rev E, ";
-			/*
-			 * Ensure autoflush is enabled
-			 */
-			sblkctl &= ~AUTOFLUSHDIS;
-			ahc_outb(ahc, SBLKCTL, sblkctl);
-
-		} else
-			id_string = "aic7770 <= Rev C, ";
-
-		printf("%s: %s", ahc_name(ahc), id_string);
-	}
-
-	/* Setup the FIFO threshold and the bus off time */
-	{
-		u_int8_t hostconf = ahc_inb(ahc, HOSTCONF);
-		ahc_outb(ahc, BUSSPD, hostconf & DFTHRSH);
-		ahc_outb(ahc, BUSTIME, (hostconf << 2) & BOFF);
+		ahc_free(ahc);
+		return (ENOMEM);
 	}
-
-	/*
-	 * Generic aic7xxx initialization.
-	 */
-	if (ahc_init(ahc)) {
-		/*
-		 * The board's IRQ line is not yet enabled so it's safe
-		 * to release the irq.
-		 */
-		goto bad;
+	ahc->dev_softc = dev;
+	error = aic7770_config(ahc, entry);
+	if (error != 0) {
+		ahc_free(ahc);
+		return (error);
 	}
 
-	/*
-	 * Enable the board's BUS drivers
-	 */
-	ahc_outb(ahc, BCTL, ENABLE);
-
-	/* Attach sub-devices - always succeeds */
 	ahc_attach(ahc);
-
-	return 0;
-
- bad:
-	if (ahc != NULL)
-		ahc_free(ahc);
-	
-	if (io != NULL)
-		bus_release_resource(dev, SYS_RES_IOPORT, 0, io);
-
-	return -1;
+	return (0);
 }
 
-/*
- * Read the 284x SEEPROM.
- */
-static void
-aha2840_load_seeprom(struct ahc_softc *ahc)
+int
+aic7770_map_registers(struct ahc_softc *ahc)
 {
-	struct	  seeprom_descriptor sd;
-	struct	  seeprom_config sc;
-	u_int16_t checksum = 0;
-	u_int8_t  scsi_conf;
-	int	  have_seeprom;
-
-	sd.sd_tag = ahc->tag;
-	sd.sd_bsh = ahc->bsh;
-	sd.sd_control_offset = SEECTL_2840;
-	sd.sd_status_offset = STATUS_2840;
-	sd.sd_dataout_offset = STATUS_2840;		
-	sd.sd_chip = C46;
-	sd.sd_MS = 0;
-	sd.sd_RDY = EEPROM_TF;
-	sd.sd_CS = CS_2840;
-	sd.sd_CK = CK_2840;
-	sd.sd_DO = DO_2840;
-	sd.sd_DI = DI_2840;
-
-	if (bootverbose)
-		printf("%s: Reading SEEPROM...", ahc_name(ahc));
-	have_seeprom = read_seeprom(&sd,
-				    (u_int16_t *)&sc,
-				    /*start_addr*/0,
-				    sizeof(sc)/2);
+	struct	resource *regs;
+	int	rid;
 
-	if (have_seeprom) {
-		/* Check checksum */
-		int i;
-		int maxaddr = (sizeof(sc)/2) - 1;
-		u_int16_t *scarray = (u_int16_t *)&sc;
-
-		for (i = 0; i < maxaddr; i++)
-			checksum = checksum + scarray[i];
-		if (checksum != sc.checksum) {
-			if(bootverbose)
-				printf ("checksum error\n");
-			have_seeprom = 0;
-		} else if (bootverbose) {
-			printf("done.\n");
-		}
+	regs = bus_alloc_resource(ahc->dev_softc, SYS_RES_IOPORT,
+				  &rid, 0, ~0, 1, RF_ACTIVE);
+	if (regs == NULL) {
+		device_printf(ahc->dev_softc, "Unable to map I/O space?!\n");
+		return ENOMEM;
 	}
+	ahc->platform_data->regs_res_type = SYS_RES_IOPORT;
+	ahc->platform_data->regs_res_id = rid,
+	ahc->platform_data->regs = regs;
+	ahc->tag = rman_get_bustag(regs);
+	ahc->bsh = rman_get_bushandle(regs);
+	return (0);
+}
 
-	if (!have_seeprom) {
-		if (bootverbose)
-			printf("%s: No SEEPROM available\n", ahc_name(ahc));
-		ahc->flags |= AHC_USEDEFAULTS;
-	} else {
-		/*
-		 * Put the data we've collected down into SRAM
-		 * where ahc_init will find it.
-		 */
-		int i;
-		int max_targ = (ahc->features & AHC_WIDE) != 0 ? 16 : 8;
-		u_int16_t discenable;
-
-		discenable = 0;
-		for (i = 0; i < max_targ; i++){
-	                u_int8_t target_settings;
-			target_settings = (sc.device_flags[i] & CFXFER) << 4;
-			if (sc.device_flags[i] & CFSYNCH)
-				target_settings |= SOFS;
-			if (sc.device_flags[i] & CFWIDEB)
-				target_settings |= WIDEXFER;
-			if (sc.device_flags[i] & CFDISC)
-				discenable |= (0x01 << i);
-			ahc_outb(ahc, TARG_SCSIRATE + i, target_settings);
-		}
-		ahc_outb(ahc, DISC_DSB, ~(discenable & 0xff));
-		ahc_outb(ahc, DISC_DSB + 1, ~((discenable >> 8) & 0xff));
-
-		ahc->our_id = sc.brtime_id & CFSCSIID;
-
-		scsi_conf = (ahc->our_id & 0x7);
-		if (sc.adapter_control & CFSPARITY)
-			scsi_conf |= ENSPCHK;
-		if (sc.adapter_control & CFRESETB)
-			scsi_conf |= RESET_SCSI;
-
-		if (sc.bios_control & CF284XEXTEND)		
-			ahc->flags |= AHC_EXTENDED_TRANS_A;
-		/* Set SCSICONF info */
-		ahc_outb(ahc, SCSICONF, scsi_conf);
+int
+aic7770_map_int(struct ahc_softc *ahc)
+{
+	int zero;
 
-		if (sc.adapter_control & CF284XSTERM)
-			ahc->flags |= AHC_TERM_ENB_A;
-	}
+	zero = 0;
+	ahc->platform_data->irq =
+	    bus_alloc_resource(ahc->dev_softc, SYS_RES_IRQ, &zero,
+			       0, ~0, 1, RF_ACTIVE);
+	if (ahc->platform_data->irq == NULL)
+		return (ENOMEM);
+	ahc->platform_data->irq_res_type = SYS_RES_IRQ;
+	return (0);
 }
 
 static device_method_t ahc_eisa_methods[] = {
diff --git a/sys/dev/aic7xxx/ahc_pci.c b/sys/dev/aic7xxx/ahc_pci.c
index d457f6c2dc28..dfe248beb5e4 100644
--- a/sys/dev/aic7xxx/ahc_pci.c
+++ b/sys/dev/aic7xxx/ahc_pci.c
@@ -1,7 +1,5 @@
 /*
- * Product specific probe and attach routines for:
- *      3940, 2940, aic7895, aic7890, aic7880,
- *	aic7870, aic7860 and aic7850 SCSI controllers
+ * FreeBSD, PCI product support functions
  *
  * Copyright (c) 1995, 1996, 1997, 1998, 1999, 2000 Justin T. Gibbs
  * All rights reserved.
@@ -15,12 +13,8 @@
  * 2. The name of the author may not be used to endorse or promote products
  *    derived from this software without specific prior written permission.
  *
- * Where this Software is combined with software released under the terms of 
- * the GNU Public License ("GPL") and the terms of the GPL would require the 
- * combined work to also be released under the terms of the GPL, the terms
- * and conditions of this License will apply in addition to those of the
- * GPL with the exception of any terms or conditions of this License that
- * conflict with, or are expressly prohibited by, the GPL.
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU Public License ("GPL").
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
@@ -34,547 +28,19 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
+ * $Id$
+ *
  * $FreeBSD$
  */
 
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/bus.h>
-
-#include <pci/pcireg.h>
-#include <pci/pcivar.h>
-
-#include <machine/bus_memio.h>
-#include <machine/bus_pio.h>
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <machine/clock.h>
-#include <sys/rman.h>
-
-#include <cam/cam.h>
-#include <cam/cam_ccb.h>
-#include <cam/cam_sim.h>
-#include <cam/cam_xpt_sim.h>
-
-#include <cam/scsi/scsi_all.h>
-
-#include <dev/aic7xxx/aic7xxx.h>
-#include <dev/aic7xxx/93cx6.h>
-
-#include <aic7xxx_reg.h>
-
-#define AHC_PCI_IOADDR	PCIR_MAPS		/* I/O Address */
-#define AHC_PCI_MEMADDR	(PCIR_MAPS + 4)	/* Mem I/O Address */
-
-static __inline u_int64_t
-ahc_compose_id(u_int device, u_int vendor, u_int subdevice, u_int subvendor)
-{
-	u_int64_t id;
-
-	id = subvendor
-	   | (subdevice << 16)
-	   | ((u_int64_t)vendor << 32)
-	   | ((u_int64_t)device << 48);
-
-	return (id);
-}
-
-#define ID_ALL_MASK		0xFFFFFFFFFFFFFFFFull
-#define ID_DEV_VENDOR_MASK	0xFFFFFFFF00000000ull
-#define ID_AIC7850		0x5078900400000000ull
-#define ID_AHA_2910_15_20_30C	0x5078900478509004ull
-#define ID_AIC7855		0x5578900400000000ull
-#define ID_AIC7859		0x3860900400000000ull
-#define ID_AHA_2930CU		0x3860900438699004ull
-#define ID_AIC7860		0x6078900400000000ull
-#define ID_AIC7860C		0x6078900478609004ull
-#define ID_AHA_2940AU_0		0x6178900400000000ull
-#define ID_AHA_2940AU_1		0x6178900478619004ull
-#define ID_AHA_2940AU_CN	0x2178900478219004ull
-#define ID_AHA_2930C_VAR	0x6038900438689004ull
-
-#define ID_AIC7870		0x7078900400000000ull
-#define ID_AHA_2940		0x7178900400000000ull
-#define ID_AHA_3940		0x7278900400000000ull
-#define ID_AHA_398X		0x7378900400000000ull
-#define ID_AHA_2944		0x7478900400000000ull
-#define ID_AHA_3944		0x7578900400000000ull
-
-#define ID_AIC7880		0x8078900400000000ull
-#define ID_AIC7880_B		0x8078900478809004ull
-#define ID_AHA_2940U		0x8178900400000000ull
-#define ID_AHA_3940U		0x8278900400000000ull
-#define ID_AHA_2944U		0x8478900400000000ull
-#define ID_AHA_3944U		0x8578900400000000ull
-#define ID_AHA_398XU		0x8378900400000000ull
-#define ID_AHA_4944U		0x8678900400000000ull
-#define ID_AHA_2940UB		0x8178900478819004ull
-#define ID_AHA_2930U		0x8878900478889004ull
-#define ID_AHA_2940U_PRO	0x8778900478879004ull
-#define ID_AHA_2940U_CN		0x0078900478009004ull
-
-#define ID_AIC7895		0x7895900478959004ull
-#define ID_AIC7895_RAID_PORT	0x7893900478939004ull
-#define ID_AHA_2940U_DUAL	0x7895900478919004ull
-#define ID_AHA_3940AU		0x7895900478929004ull
-#define ID_AHA_3944AU		0x7895900478949004ull
-
-#define ID_AIC7890		0x001F9005000F9005ull
-#define ID_AHA_2930U2		0x0011900501819005ull
-#define ID_AHA_2940U2B		0x00109005A1009005ull
-#define ID_AHA_2940U2_OEM	0x0010900521809005ull
-#define ID_AHA_2940U2		0x00109005A1809005ull
-#define ID_AHA_2950U2B		0x00109005E1009005ull
-
-#define ID_AIC7892		0x008F9005FFFF9005ull
-#define ID_AHA_29160		0x00809005E2A09005ull
-#define ID_AHA_29160_CPQ	0x00809005E2A00E11ull
-#define ID_AHA_29160N		0x0080900562A09005ull
-#define ID_AHA_29160B		0x00809005E2209005ull
-#define ID_AHA_19160B		0x0081900562A19005ull
-
-#define ID_AIC7896		0x005F9005FFFF9005ull
-#define ID_AHA_3950U2B_0	0x00509005FFFF9005ull
-#define ID_AHA_3950U2B_1	0x00509005F5009005ull
-#define ID_AHA_3950U2D_0	0x00519005FFFF9005ull
-#define ID_AHA_3950U2D_1	0x00519005B5009005ull
-
-#define ID_AIC7899		0x00CF9005FFFF9005ull
-#define ID_AHA_3960D		0x00C09005F6209005ull /* AKA AHA-39160 */
-#define ID_AHA_3960D_CPQ	0x00C09005F6200E11ull
-
-#define ID_AIC7810		0x1078900400000000ull
-#define ID_AIC7815		0x1578900400000000ull
-
-typedef int (ahc_device_setup_t)(device_t, char *, ahc_chip *,
-				 ahc_feature *, ahc_flag *);
-
-static ahc_device_setup_t ahc_aic7850_setup;
-static ahc_device_setup_t ahc_aic7855_setup;
-static ahc_device_setup_t ahc_aic7859_setup;
-static ahc_device_setup_t ahc_aic7860_setup;
-static ahc_device_setup_t ahc_aic7870_setup;
-static ahc_device_setup_t ahc_aha394X_setup;
-static ahc_device_setup_t ahc_aha398X_setup;
-static ahc_device_setup_t ahc_aic7880_setup;
-static ahc_device_setup_t ahc_2940Pro_setup;
-static ahc_device_setup_t ahc_aha394XU_setup;
-static ahc_device_setup_t ahc_aha398XU_setup;
-static ahc_device_setup_t ahc_aic7890_setup;
-static ahc_device_setup_t ahc_aic7892_setup;
-static ahc_device_setup_t ahc_aic7895_setup;
-static ahc_device_setup_t ahc_aic7896_setup;
-static ahc_device_setup_t ahc_aic7899_setup;
-static ahc_device_setup_t ahc_raid_setup;
-static ahc_device_setup_t ahc_aha394XX_setup;
-static ahc_device_setup_t ahc_aha398XX_setup;
-
-struct ahc_pci_identity {
-	u_int64_t		 full_id;
-	u_int64_t		 id_mask;
-	char			*name;
-	ahc_device_setup_t	*setup;
-};
-
-struct ahc_pci_identity ahc_pci_ident_table [] =
-{
-	/* aic7850 based controllers */
-	{
-		ID_AHA_2910_15_20_30C,
-		ID_ALL_MASK,
-		"Adaptec 2910/15/20/30C SCSI adapter",
-		ahc_aic7850_setup
-	},
-	/* aic7859 based controllers */
-	{
-		ID_AHA_2930CU,
-		ID_ALL_MASK,
-		"Adaptec 2930CU SCSI adapter",
-		ahc_aic7859_setup
-	},
-	/* aic7860 based controllers */
-	{
-		ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 2940A Ultra SCSI adapter",
-		ahc_aic7860_setup
-	},
-	{
-		ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 2940A/CN Ultra SCSI adapter",
-		ahc_aic7860_setup
-	},
-	{
-		ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 2930C SCSI adapter (VAR)",
-		ahc_aic7860_setup
-	},
-	/* aic7870 based controllers */
-	{
-		ID_AHA_2940,
-		ID_ALL_MASK,
-		"Adaptec 2940 SCSI adapter",
-		ahc_aic7870_setup
-	},
-	{
-		ID_AHA_3940,
-		ID_ALL_MASK,
-		"Adaptec 3940 SCSI adapter",
-		ahc_aha394X_setup
-	},
-	{
-		ID_AHA_398X,
-		ID_ALL_MASK,
-		"Adaptec 398X SCSI RAID adapter",
-		ahc_aha398X_setup
-	},
-	{
-		ID_AHA_2944,
-		ID_ALL_MASK,
-		"Adaptec 2944 SCSI adapter",
-		ahc_aic7870_setup
-	},
-	{
-		ID_AHA_3944,
-		ID_ALL_MASK,
-		"Adaptec 3944 SCSI adapter",
-		ahc_aha394X_setup
-	},
-	/* aic7880 based controllers */
-	{
-		ID_AHA_2940U & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 2940 Ultra SCSI adapter",
-		ahc_aic7880_setup
-	},
-	{
-		ID_AHA_3940U & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 3940 Ultra SCSI adapter",
-		ahc_aha394XU_setup
-	},
-	{
-		ID_AHA_2944U & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 2944 Ultra SCSI adapter",
-		ahc_aic7880_setup
-	},
-	{
-		ID_AHA_3944U & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 3944 Ultra SCSI adapter",
-		ahc_aha394XU_setup
-	},
-	{
-		ID_AHA_398XU & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 398X Ultra SCSI RAID adapter",
-		ahc_aha398XU_setup
-	},
-	{
-		/*
-		 * XXX Don't know the slot numbers
-		 * so we can't identify channels
-		 */
-		ID_AHA_4944U & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 4944 Ultra SCSI adapter",
-		ahc_aic7880_setup
-	},
-	{
-		ID_AHA_2930U & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 2930 Ultra SCSI adapter",
-		ahc_aic7880_setup
-	},
-	{
-		ID_AHA_2940U_PRO & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 2940 Pro Ultra SCSI adapter",
-		ahc_2940Pro_setup
-	},
-	{
-		ID_AHA_2940U_CN & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec 2940/CN Ultra SCSI adapter",
-		ahc_aic7880_setup
-	},
-	/* aic7890 based controllers */
-	{
-		ID_AHA_2930U2,
-		ID_ALL_MASK,
-		"Adaptec 2930 Ultra2 SCSI adapter",
-		ahc_aic7890_setup
-	},
-	{
-		ID_AHA_2940U2B,
-		ID_ALL_MASK,
-		"Adaptec 2940B Ultra2 SCSI adapter",
-		ahc_aic7890_setup
-	},
-	{
-		ID_AHA_2940U2_OEM,
-		ID_ALL_MASK,
-		"Adaptec 2940 Ultra2 SCSI adapter (OEM)",
-		ahc_aic7890_setup
-	},
-	{
-		ID_AHA_2940U2,
-		ID_ALL_MASK,
-		"Adaptec 2940 Ultra2 SCSI adapter",
-		ahc_aic7890_setup
-	},
-	{
-		ID_AHA_2950U2B,
-		ID_ALL_MASK,
-		"Adaptec 2950 Ultra2 SCSI adapter",
-		ahc_aic7890_setup
-	},
-	/* aic7892 based controllers */
-	{
-		ID_AHA_29160,
-		ID_ALL_MASK,
-		"Adaptec 29160 Ultra160 SCSI adapter",
-		ahc_aic7892_setup
-	},
-	{
-		ID_AHA_29160_CPQ,
-		ID_ALL_MASK,
-		"Adaptec (Compaq OEM) 29160 Ultra160 SCSI adapter",
-		ahc_aic7892_setup
-	},
-	{
-		ID_AHA_29160N,
-		ID_ALL_MASK,
-		"Adaptec 29160N Ultra160 SCSI adapter",
-		ahc_aic7892_setup
-	},
-	{
-		ID_AHA_29160B,
-		ID_ALL_MASK,
-		"Adaptec 29160B Ultra160 SCSI adapter",
-		ahc_aic7892_setup
-	},
-	{
-		ID_AHA_19160B,
-		ID_ALL_MASK,
-		"Adaptec 19160B Ultra160 SCSI adapter",
-		ahc_aic7892_setup
-	},
-	/* aic7895 based controllers */	
-	{
-		ID_AHA_2940U_DUAL,
-		ID_ALL_MASK,
-		"Adaptec 2940/DUAL Ultra SCSI adapter",
-		ahc_aic7895_setup
-	},
-	{
-		ID_AHA_3940AU,
-		ID_ALL_MASK,
-		"Adaptec 3940A Ultra SCSI adapter",
-		ahc_aic7895_setup
-	},
-	{
-		ID_AHA_3944AU,
-		ID_ALL_MASK,
-		"Adaptec 3944A Ultra SCSI adapter",
-		ahc_aic7895_setup
-	},
-	/* aic7896/97 based controllers */	
-	{
-		ID_AHA_3950U2B_0,
-		ID_ALL_MASK,
-		"Adaptec 3950B Ultra2 SCSI adapter",
-		ahc_aic7896_setup
-	},
-	{
-		ID_AHA_3950U2B_1,
-		ID_ALL_MASK,
-		"Adaptec 3950B Ultra2 SCSI adapter",
-		ahc_aic7896_setup
-	},
-	{
-		ID_AHA_3950U2D_0,
-		ID_ALL_MASK,
-		"Adaptec 3950D Ultra2 SCSI adapter",
-		ahc_aic7896_setup
-	},
-	{
-		ID_AHA_3950U2D_1,
-		ID_ALL_MASK,
-		"Adaptec 3950D Ultra2 SCSI adapter",
-		ahc_aic7896_setup
-	},
-	/* aic7899 based controllers */	
-	{
-		ID_AHA_3960D,
-		ID_ALL_MASK,
-		"Adaptec 3960D Ultra160 SCSI adapter",
-		ahc_aic7899_setup
-	},
-	{
-		ID_AHA_3960D_CPQ,
-		ID_ALL_MASK,
-		"Adaptec (Compaq OEM) 3960D Ultra160 SCSI adapter",
-		ahc_aic7899_setup
-	},
-	/* Generic chip probes for devices we don't know 'exactly' */
-	{
-		ID_AIC7850 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7850 SCSI adapter",
-		ahc_aic7850_setup
-	},
-	{
-		ID_AIC7855 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7855 SCSI adapter",
-		ahc_aic7855_setup
-	},
-	{
-		ID_AIC7859 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7859 SCSI adapter",
-		ahc_aic7859_setup
-	},
-	{
-		ID_AIC7860 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7860 SCSI adapter",
-		ahc_aic7860_setup
-	},
-	{
-		ID_AIC7870 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7870 SCSI adapter",
-		ahc_aic7870_setup
-	},
-	{
-		ID_AIC7880 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7880 Ultra SCSI adapter",
-		ahc_aic7880_setup
-	},
-	{
-		ID_AIC7890 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7890/91 Ultra2 SCSI adapter",
-		ahc_aic7890_setup
-	},
-	{
-		ID_AIC7892 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7892 Ultra160 SCSI adapter",
-		ahc_aic7892_setup
-	},
-	{
-		ID_AIC7895 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7895 Ultra SCSI adapter",
-		ahc_aic7895_setup
-	},
-	{
-		ID_AIC7895_RAID_PORT & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7895 Ultra SCSI adapter (RAID PORT)",
-		ahc_aic7895_setup
-	},
-	{
-		ID_AIC7896 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7896/97 Ultra2 SCSI adapter",
-		ahc_aic7896_setup
-	},
-	{
-		ID_AIC7899 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7899 Ultra160 SCSI adapter",
-		ahc_aic7899_setup
-	},
-	{
-		ID_AIC7810 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7810 RAID memory controller",
-		ahc_raid_setup
-	},
-	{
-		ID_AIC7815 & ID_DEV_VENDOR_MASK,
-		ID_DEV_VENDOR_MASK,
-		"Adaptec aic7815 RAID memory controller",
-		ahc_raid_setup
-	}
-};
-
-static const int ahc_num_pci_devs =
-	sizeof(ahc_pci_ident_table) / sizeof(*ahc_pci_ident_table);
-		
-#define AHC_394X_SLOT_CHANNEL_A	4
-#define AHC_394X_SLOT_CHANNEL_B	5
-
-#define AHC_398X_SLOT_CHANNEL_A	4
-#define AHC_398X_SLOT_CHANNEL_B	8
-#define AHC_398X_SLOT_CHANNEL_C	12
-
-#define	DEVCONFIG		0x40
-#define		SCBSIZE32	0x00010000ul	/* aic789X only */
-#define		MPORTMODE	0x00000400ul	/* aic7870 only */
-#define		RAMPSM		0x00000200ul	/* aic7870 only */
-#define		VOLSENSE	0x00000100ul
-#define		SCBRAMSEL	0x00000080ul
-#define		MRDCEN		0x00000040ul
-#define		EXTSCBTIME	0x00000020ul	/* aic7870 only */
-#define		EXTSCBPEN	0x00000010ul	/* aic7870 only */
-#define		BERREN		0x00000008ul
-#define		DACEN		0x00000004ul
-#define		STPWLEVEL	0x00000002ul
-#define		DIFACTNEGEN	0x00000001ul	/* aic7870 only */
+#include <dev/aic7xxx/aic7xxx_freebsd.h>
 
-#define	CSIZE_LATTIME		0x0c
-#define		CACHESIZE	0x0000003ful	/* only 5 bits */
-#define		LATTIME		0x0000ff00ul
-
-static struct ahc_pci_identity *ahc_find_pci_device(device_t dev);
-static int ahc_ext_scbram_present(struct ahc_softc *ahc);
-static void ahc_ext_scbram_config(struct ahc_softc *ahc, int enable,
-				  int pcheck, int fast);
-static void ahc_probe_ext_scbram(struct ahc_softc *ahc);
-static void check_extport(struct ahc_softc *ahc, u_int *sxfrctl1);
-static void configure_termination(struct ahc_softc *ahc,
-				  struct seeprom_descriptor *sd,
-				  u_int adapter_control,
-	 			  u_int *sxfrctl1);
-
-static void ahc_new_term_detect(struct ahc_softc *ahc,
-				int *enableSEC_low,
-				int *enableSEC_high,
-				int *enablePRI_low,
-				int *enablePRI_high,
-				int *eeprom_present);
-static void aic787X_cable_detect(struct ahc_softc *ahc, int *internal50_present,
-				 int *internal68_present,
-				 int *externalcable_present,
-				 int *eeprom_present);
-static void aic785X_cable_detect(struct ahc_softc *ahc, int *internal50_present,
-				 int *externalcable_present,
-				 int *eeprom_present);
-static int acquire_seeprom(struct ahc_softc *ahc,
-			   struct seeprom_descriptor *sd);
-static void release_seeprom(struct seeprom_descriptor *sd);
-static void write_brdctl(struct ahc_softc *ahc, u_int8_t value);
-static u_int8_t read_brdctl(struct ahc_softc *ahc);
-
-static struct ahc_softc *first_398X;
+#define	AHC_PCI_IOADDR  PCIR_MAPS	/* I/O Address */
+#define	AHC_PCI_MEMADDR (PCIR_MAPS + 4) /* Mem I/O Address */
 
 static int ahc_pci_probe(device_t dev);
 static int ahc_pci_attach(device_t dev);
 
-/* Exported for use in the ahc_intr routine */
-void ahc_pci_intr(struct ahc_softc *ahc);
-
 static device_method_t ahc_pci_methods[] = {
 	/* Device interface */
 	DEVMETHOD(device_probe,		ahc_pci_probe),
@@ -592,30 +58,10 @@ static devclass_t ahc_devclass;
 
 DRIVER_MODULE(ahc, pci, ahc_pci_driver, ahc_devclass, 0, 0);
 
-static struct ahc_pci_identity *
-ahc_find_pci_device(device_t dev)
-{
-	u_int64_t  full_id;
-	struct	   ahc_pci_identity *entry;
-	u_int	   i;
-
-	full_id = ahc_compose_id(pci_get_device(dev),
-				 pci_get_vendor(dev),
-				 pci_get_subdevice(dev),
-				 pci_get_subvendor(dev));
-
-	for (i = 0; i < ahc_num_pci_devs; i++) {
-		entry = &ahc_pci_ident_table[i];
-		if (entry->full_id == (full_id & entry->id_mask))
-			return (entry);
-	}
-	return (NULL);
-}
-
 static int
 ahc_pci_probe(device_t dev)
 {
-	struct	   ahc_pci_identity *entry;
+	struct	ahc_pci_identity *entry;
 
 	entry = ahc_find_pci_device(dev);
 	if (entry != NULL) {
@@ -628,59 +74,27 @@ ahc_pci_probe(device_t dev)
 static int
 ahc_pci_attach(device_t dev)
 {
-	bus_dma_tag_t	   parent_dmat;
-	struct		   ahc_pci_identity *entry;
-	struct		   resource *regs;
-	struct		   ahc_softc *ahc;
-	u_int		   command;
-	struct scb_data   *shared_scb_data;
-	ahc_chip	   ahc_t = AHC_NONE;
-	ahc_feature	   ahc_fe = AHC_FENONE;
-	ahc_flag	   ahc_f = AHC_FNONE;
-	int		   regs_type;
-	int		   regs_id;
-	u_int		   our_id = 0;
-	u_int		   sxfrctl1;
-	u_int		   scsiseq;
-	int		   error;
-	int		   zero;
-	char		   channel;
+	struct	 ahc_pci_identity *entry;
+	struct	 ahc_softc *ahc;
+	char	*name;
+	int	 error;
 
-	shared_scb_data = NULL;
-	command = pci_read_config(dev, PCIR_COMMAND, /*bytes*/1);
 	entry = ahc_find_pci_device(dev);
 	if (entry == NULL)
 		return (ENXIO);
-	error = entry->setup(dev, &channel, &ahc_t, &ahc_fe, &ahc_f);
-	if (error != 0)
-		return (error);
 
-	regs = NULL;
-	regs_type = 0;
-	regs_id = 0;
-#ifdef AHC_ALLOW_MEMIO
-	if ((command & PCIM_CMD_MEMEN) != 0) {
-		regs_type = SYS_RES_MEMORY;
-		regs_id = AHC_PCI_MEMADDR;
-		regs = bus_alloc_resource(dev, regs_type,
-					  &regs_id, 0, ~0, 1, RF_ACTIVE);
-	}
-#endif
-	if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
-		regs_type = SYS_RES_IOPORT;
-		regs_id = AHC_PCI_IOADDR;
-		regs = bus_alloc_resource(dev, regs_type,
-					  &regs_id, 0, ~0, 1, RF_ACTIVE);
-	}
- 
-	if (regs == NULL) {
-		device_printf(dev, "can't allocate register resources\n");
+	/*
+	 * Allocate a softc for this card and
+	 * set it up for attachment by our
+	 * common detect routine.
+	 */
+	name = malloc(strlen(device_get_nameunit(dev)) + 1, M_DEVBUF, M_NOWAIT);
+	if (name == NULL)
+		return (ENOMEM);
+	strcpy(name, device_get_nameunit(dev));
+	ahc = ahc_alloc(NULL, name);
+	if (ahc == NULL)
 		return (ENOMEM);
-	}
-
-	/* Ensure busmastering is enabled */
-	command |= PCIM_CMD_BUSMASTEREN;
-	pci_write_config(dev, PCIR_COMMAND, command, /*bytes*/1);
 
 	/* Allocate a dmatag for our SCB DMA maps */
 	/* XXX Should be a child of the PCI bus dma tag */
@@ -691,1178 +105,97 @@ ahc_pci_attach(device_t dev)
 				   /*filter*/NULL, /*filterarg*/NULL,
 				   /*maxsize*/MAXBSIZE, /*nsegments*/AHC_NSEG,
 				   /*maxsegsz*/AHC_MAXTRANSFER_SIZE,
-				   /*flags*/BUS_DMA_ALLOCNOW, &parent_dmat);
+				   /*flags*/BUS_DMA_ALLOCNOW,
+				   &ahc->parent_dmat);
 
 	if (error != 0) {
 		printf("ahc_pci_attach: Could not allocate DMA tag "
 		       "- error %d\n", error);
-		return (ENOMEM);
-	}
-
-	/* On all PCI adapters, we allow SCB paging */
-	ahc_f |= AHC_PAGESCBS;
-	if ((ahc = ahc_alloc(dev, regs, regs_type, regs_id, parent_dmat,
-			     ahc_t|AHC_PCI, ahc_fe, ahc_f,
-			     shared_scb_data)) == NULL)
-		return (ENOMEM);
-
-	ahc->channel = channel;
-
-	/* Store our PCI bus information for use in our PCI error handler */
-	ahc->device = dev;
-	
-	/* Remeber how the card was setup in case there is no SEEPROM */
-	ahc_outb(ahc, HCNTRL, ahc->pause);
-	if ((ahc->features & AHC_ULTRA2) != 0)
-		our_id = ahc_inb(ahc, SCSIID_ULTRA2) & OID;
-	else
-		our_id = ahc_inb(ahc, SCSIID) & OID;
-	sxfrctl1 = ahc_inb(ahc, SXFRCTL1) & STPWEN;
-	scsiseq = ahc_inb(ahc, SCSISEQ);
-
-	if (ahc_reset(ahc) != 0) {
-		/* Failed */
-		ahc_free(ahc);
-		return (ENXIO);
-	}
-
-	if ((ahc->features & AHC_DT) != 0) {
-		u_int sfunct;
-
-		/* Perform ALT-Mode Setup */
-		sfunct = ahc_inb(ahc, SFUNCT) & ~ALT_MODE;
-		ahc_outb(ahc, SFUNCT, sfunct | ALT_MODE);
-		ahc_outb(ahc, OPTIONMODE, OPTIONMODE_DEFAULTS);
-		/* Send CRC info in target mode every 4K */
-		ahc_outb(ahc, TARGCRCCNT, 0);
-		ahc_outb(ahc, TARGCRCCNT + 1, 0x10);
-		ahc_outb(ahc, SFUNCT, sfunct);
-
-		/* Normal mode setup */
-		ahc_outb(ahc, CRCCONTROL1, CRCVALCHKEN|CRCENDCHKEN|CRCREQCHKEN
-					  |TARGCRCENDEN|TARGCRCCNTEN);
-	}
-	zero = 0;
-	ahc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &zero,
-				      0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
-	if (ahc->irq == NULL) {
 		ahc_free(ahc);
 		return (ENOMEM);
 	}
-
-	ahc->irq_res_type = SYS_RES_IRQ;
-
-	/*
-	 * Do aic7880/aic7870/aic7860/aic7850 specific initialization
-	 */
-	{
-		u_int8_t sblkctl;
-		u_int dscommand0;
-
-		dscommand0 = ahc_inb(ahc, DSCOMMAND0);
-		dscommand0 |= MPARCKEN;
-		if ((ahc->features & AHC_ULTRA2) != 0) {
-
-			/*
-			 * DPARCKEN doesn't work correctly on
-			 * some MBs so don't use it.
-			 */
-			dscommand0 &= ~(USCBSIZE32|DPARCKEN);
-			dscommand0 |= CACHETHEN;
-		}
-
-		ahc_outb(ahc, DSCOMMAND0, dscommand0);
-
-		/* See if we have an SEEPROM and perform auto-term */
-		check_extport(ahc, &sxfrctl1);
-
-		/*
-		 * Take the LED out of diagnostic mode
-		 */
-		sblkctl = ahc_inb(ahc, SBLKCTL);
-		ahc_outb(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON)));
-
-		/*
-		 * I don't know where this is set in the SEEPROM or by the
-		 * BIOS, so we default to 100% on Ultra or slower controllers
-		 * and 75% on ULTRA2 controllers.
-		 */
-		if ((ahc->features & AHC_ULTRA2) != 0) {
-			ahc_outb(ahc, DFF_THRSH, RD_DFTHRSH_75|WR_DFTHRSH_75);
-		} else {
-			ahc_outb(ahc, DSPCISTATUS, DFTHRSH_100);
-		}
-
-		if (ahc->flags & AHC_USEDEFAULTS) {
-			/*
-			 * PCI Adapter default setup
-			 * Should only be used if the adapter does not have
-			 * an SEEPROM.
-			 */
-			/* See if someone else set us up already */
-			if (scsiseq != 0) {
-				printf("%s: Using left over BIOS settings\n",
-					ahc_name(ahc));
-				ahc->flags &= ~AHC_USEDEFAULTS;
-			} else {
-				/*
-				 * Assume only one connector and always turn
-				 * on termination.
-				 */
- 				our_id = 0x07;
-				sxfrctl1 = STPWEN;
-			}
-			ahc_outb(ahc, SCSICONF, our_id|ENSPCHK|RESET_SCSI);
-
-			ahc->our_id = our_id;
-		}
-	}
-
-	/*
-	 * Take a look to see if we have external SRAM.
-	 * We currently do not attempt to use SRAM that is
-	 * shared among multiple controllers.
-	 */
-	ahc_probe_ext_scbram(ahc);
-
-
-	printf("%s: %s ", ahc_name(ahc),
-	       ahc_chip_names[ahc->chip & AHC_CHIPID_MASK]);
-
-	/*
-	 * Record our termination setting for the
-	 * generic initialization routine.
-	 */
-	if ((sxfrctl1 & STPWEN) != 0)
-		ahc->flags |= AHC_TERM_ENB_A;
-
-	if (ahc_init(ahc)) {
+	ahc->dev_softc = dev;
+	error = ahc_pci_config(ahc, entry);
+	if (error != 0) {
 		ahc_free(ahc);
-		return (ENOMEM);
-	}
-
-	/* XXX Crude hack - fix sometime */
-	if (ahc->flags & AHC_SHARED_SRAM) {
-		/* Only set this once we've successfully probed */
-		if (shared_scb_data == NULL)
-			first_398X = ahc;
+		return (error);
 	}
 
 	ahc_attach(ahc);
 	return (0);
 }
 
-/*
- * Test for the presense of external sram in an
- * "unshared" configuration.
- */
-static int
-ahc_ext_scbram_present(struct ahc_softc *ahc)
-{
-	int ramps;
-	int single_user;
-	u_int32_t devconfig;
-
-	devconfig = pci_read_config(ahc->device, DEVCONFIG, /*bytes*/4);
-	single_user = (devconfig & MPORTMODE) != 0;
-
-	if ((ahc->features & AHC_ULTRA2) != 0)
-		ramps = (ahc_inb(ahc, DSCOMMAND0) & RAMPS) != 0;
-	else if ((ahc->chip & AHC_CHIPID_MASK) >= AHC_AIC7870)
-		ramps = (devconfig & RAMPSM) != 0;
-	else
-		ramps = 0;
-
-	if (ramps && single_user)
-		return (1);
-	return (0);
-}
-
-/*
- * Enable external scbram.
- */
-static void
-ahc_ext_scbram_config(struct ahc_softc *ahc, int enable, int pcheck, int fast)
-{
-	u_int32_t devconfig;
-
-	if (ahc->features & AHC_MULTI_FUNC) {
-		/*
-		 * Set the SCB Base addr (highest address bit)
-		 * depending on which channel we are.
-		 */
-		ahc_outb(ahc, SCBBADDR, pci_get_function(ahc->device));
-	}
-
-	devconfig = pci_read_config(ahc->device, DEVCONFIG, /*bytes*/4);
-	if ((ahc->features & AHC_ULTRA2) != 0) {
-		u_int dscommand0;
-
-		dscommand0 = ahc_inb(ahc, DSCOMMAND0);
-		if (enable)
-			dscommand0 &= ~INTSCBRAMSEL;
-		else
-			dscommand0 |= INTSCBRAMSEL;
-		ahc_outb(ahc, DSCOMMAND0, dscommand0);
-	} else {
-		if (fast)
-			devconfig &= ~EXTSCBTIME;
-		else
-			devconfig |= EXTSCBTIME;
-		if (enable)
-			devconfig &= ~SCBRAMSEL;
-		else
-			devconfig |= SCBRAMSEL;
-	}
-	if (pcheck)
-		devconfig |= EXTSCBPEN;
-	else
-		devconfig &= ~EXTSCBPEN;
-
-	pci_write_config(ahc->device, DEVCONFIG, devconfig, /*bytes*/4);
-}
-
-/*
- * Take a look to see if we have external SRAM.
- * We currently do not attempt to use SRAM that is
- * shared among multiple controllers.
- */
-static void
-ahc_probe_ext_scbram(struct ahc_softc *ahc)
-{
-	int num_scbs;
-	int test_num_scbs;
-	int enable;
-	int pcheck;
-	int fast;
-
-	if (ahc_ext_scbram_present(ahc) == 0)
-		return;
-
-	/*
-	 * Probe for the best parameters to use.
-	 */
-	enable = FALSE;
-	pcheck = FALSE;
-	fast = FALSE;
-	ahc_ext_scbram_config(ahc, /*enable*/TRUE, pcheck, fast);
-	num_scbs = ahc_probe_scbs(ahc);
-	if (num_scbs == 0) {
-		/* The SRAM wasn't really present. */
-		goto done;
-	}
-	enable = TRUE;
-
-	/*
-	 * Clear any outstanding parity error
-	 * and ensure that parity error reporting
-	 * is enabled.
-	 */
-	ahc_outb(ahc, SEQCTL, 0);
-	ahc_outb(ahc, CLRINT, CLRPARERR);
-	ahc_outb(ahc, CLRINT, CLRBRKADRINT);
-
-	/* Now see if we can do parity */
-	ahc_ext_scbram_config(ahc, enable, /*pcheck*/TRUE, fast);
-	num_scbs = ahc_probe_scbs(ahc);
-	if ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0
-	 || (ahc_inb(ahc, ERROR) & MPARERR) == 0)
-		pcheck = TRUE;
-
-	/* Clear any resulting parity error */
-	ahc_outb(ahc, CLRINT, CLRPARERR);
-	ahc_outb(ahc, CLRINT, CLRBRKADRINT);
-
-	/* Now see if we can do fast timing */
-	ahc_ext_scbram_config(ahc, enable, pcheck, /*fast*/TRUE);
-	test_num_scbs = ahc_probe_scbs(ahc);
-	if (test_num_scbs == num_scbs
-	 && ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0
-	  || (ahc_inb(ahc, ERROR) & MPARERR) == 0))
-		fast = TRUE;
-
-done:
-	/*
-	 * Disable parity error reporting until we
-	 * can load instruction ram.
-	 */
-	ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS);
-	/* Clear any latched parity error */
-	ahc_outb(ahc, CLRINT, CLRPARERR);
-	ahc_outb(ahc, CLRINT, CLRBRKADRINT);
-	if (bootverbose && enable) {
-		printf("%s: External SRAM, %s access%s\n",
-		       ahc_name(ahc), fast ? "fast" : "slow", 
-		       pcheck ? ", parity checking enabled" : "");
-		       
-	}
-	ahc_ext_scbram_config(ahc, enable, pcheck, fast);
-}
-
-/*
- * Check the external port logic for a serial eeprom
- * and termination/cable detection contrls.
- */
-static void
-check_extport(struct ahc_softc *ahc, u_int *sxfrctl1)
-{
-	struct	  seeprom_descriptor sd;
-	struct	  seeprom_config sc;
-	u_int	  scsi_conf;
-	u_int	  adapter_control;
-	int	  have_seeprom;
-	int	  have_autoterm;
-
-	sd.sd_tag = ahc->tag;
-	sd.sd_bsh = ahc->bsh;
-	sd.sd_control_offset = SEECTL;		
-	sd.sd_status_offset = SEECTL;		
-	sd.sd_dataout_offset = SEECTL;		
-
-	/*
-	 * For some multi-channel devices, the c46 is simply too
-	 * small to work.  For the other controller types, we can
-	 * get our information from either SEEPROM type.  Set the
-	 * type to start our probe with accordingly.
-	 */
-	if (ahc->flags & AHC_LARGE_SEEPROM)
-		sd.sd_chip = C56_66;
-	else
-		sd.sd_chip = C46;
-
-	sd.sd_MS = SEEMS;
-	sd.sd_RDY = SEERDY;
-	sd.sd_CS = SEECS;
-	sd.sd_CK = SEECK;
-	sd.sd_DO = SEEDO;
-	sd.sd_DI = SEEDI;
-
-	have_seeprom = acquire_seeprom(ahc, &sd);
-	if (have_seeprom) {
-
-		if (bootverbose) 
-			printf("%s: Reading SEEPROM...", ahc_name(ahc));
-
-		for (;;) {
-			bus_size_t start_addr;
-
-			start_addr = 32 * (ahc->channel - 'A');
-
-			have_seeprom = read_seeprom(&sd, (u_int16_t *)&sc,
-						    start_addr, sizeof(sc)/2);
-
-			if (have_seeprom) {
-				/* Check checksum */
-				int i;
-				int maxaddr;
-				u_int32_t checksum;
-				u_int16_t *scarray;
-
-				maxaddr = (sizeof(sc)/2) - 1;
-				checksum = 0;
-				scarray = (u_int16_t *)&sc;
-
-				for (i = 0; i < maxaddr; i++)
-					checksum = checksum + scarray[i];
-				if (checksum == 0
-				 || (checksum & 0xFFFF) != sc.checksum) {
-					if (bootverbose && sd.sd_chip == C56_66)
-						printf ("checksum error\n");
-					have_seeprom = 0;
-				} else {
-					if (bootverbose)
-						printf("done.\n");
-					break;
-				}
-			}
-
-			if (sd.sd_chip == C56_66)
-				break;
-			sd.sd_chip = C56_66;
-		}
-	}
-
-	if (!have_seeprom) {
-		if (bootverbose)
-			printf("%s: No SEEPROM available.\n", ahc_name(ahc));
-		ahc->flags |= AHC_USEDEFAULTS;
-	} else {
-		/*
-		 * Put the data we've collected down into SRAM
-		 * where ahc_init will find it.
-		 */
-		int i;
-		int max_targ = sc.max_targets & CFMAXTARG;
-		u_int16_t discenable;
-		u_int16_t ultraenb;
-
-		discenable = 0;
-		ultraenb = 0;
-		if ((sc.adapter_control & CFULTRAEN) != 0) {
-			/*
-			 * Determine if this adapter has a "newstyle"
-			 * SEEPROM format.
-			 */
-			for (i = 0; i < max_targ; i++) {
-				if ((sc.device_flags[i] & CFSYNCHISULTRA) != 0){
-					ahc->flags |= AHC_NEWEEPROM_FMT;
-					break;
-				}
-			}
-		}
-
-		for (i = 0; i < max_targ; i++) {
-			u_int     scsirate;
-			u_int16_t target_mask;
-
-			target_mask = 0x01 << i;
-			if (sc.device_flags[i] & CFDISC)
-				discenable |= target_mask;
-			if ((ahc->flags & AHC_NEWEEPROM_FMT) != 0) {
-				if ((sc.device_flags[i] & CFSYNCHISULTRA) != 0)
-					ultraenb |= target_mask;
-			} else if ((sc.adapter_control & CFULTRAEN) != 0) {
-				ultraenb |= target_mask;
-			}
-			if ((sc.device_flags[i] & CFXFER) == 0x04
-			 && (ultraenb & target_mask) != 0) {
-				/* Treat 10MHz as a non-ultra speed */
-				sc.device_flags[i] &= ~CFXFER;
-			 	ultraenb &= ~target_mask;
-			}
-			if ((ahc->features & AHC_ULTRA2) != 0) {
-				u_int offset;
-
-				if (sc.device_flags[i] & CFSYNCH)
-					offset = MAX_OFFSET_ULTRA2;
-				else 
-					offset = 0;
-				ahc_outb(ahc, TARG_OFFSET + i, offset);
-
-				scsirate = (sc.device_flags[i] & CFXFER)
-					 | ((ultraenb & target_mask)
-					    ? 0x8 : 0x0);
-				if (sc.device_flags[i] & CFWIDEB)
-					scsirate |= WIDEXFER;
-			} else {
-				scsirate = (sc.device_flags[i] & CFXFER) << 4;
-				if (sc.device_flags[i] & CFSYNCH)
-					scsirate |= SOFS;
-				if (sc.device_flags[i] & CFWIDEB)
-					scsirate |= WIDEXFER;
-			}
-			ahc_outb(ahc, TARG_SCSIRATE + i, scsirate);
-		}
-		ahc->our_id = sc.brtime_id & CFSCSIID;
-
-		scsi_conf = (ahc->our_id & 0x7);
-		if (sc.adapter_control & CFSPARITY)
-			scsi_conf |= ENSPCHK;
-		if (sc.adapter_control & CFRESETB)
-			scsi_conf |= RESET_SCSI;
-
-		if (sc.bios_control & CFEXTEND)
-			ahc->flags |= AHC_EXTENDED_TRANS_A;
-		if (ahc->features & AHC_ULTRA
-		 && (ahc->flags & AHC_NEWEEPROM_FMT) == 0) {
-			/* Should we enable Ultra mode? */
-			if (!(sc.adapter_control & CFULTRAEN))
-				/* Treat us as a non-ultra card */
-				ultraenb = 0;
-		}
-		/* Set SCSICONF info */
-		ahc_outb(ahc, SCSICONF, scsi_conf);
-		ahc_outb(ahc, DISC_DSB, ~(discenable & 0xff));
-		ahc_outb(ahc, DISC_DSB + 1, ~((discenable >> 8) & 0xff));
-		ahc_outb(ahc, ULTRA_ENB, ultraenb & 0xff);
-		ahc_outb(ahc, ULTRA_ENB + 1, (ultraenb >> 8) & 0xff);
-	}
-
-	/*
-	 * Cards that have the external logic necessary to talk to
-	 * a SEEPROM, are almost certain to have the remaining logic
-	 * necessary for auto-termination control.  This assumption
-	 * hasn't failed yet...
-	 */
-	have_autoterm = have_seeprom;
-	if (have_seeprom)
-		adapter_control = sc.adapter_control;
-	else
-		adapter_control = CFAUTOTERM;
-
-	/*
-	 * Some low-cost chips have SEEPROM and auto-term control built
-	 * in, instead of using a GAL.  They can tell us directly
-	 * if the termination logic is enabled.
-	 */
-	if ((ahc->features & AHC_SPIOCAP) != 0) {
-		if ((ahc_inb(ahc, SPIOCAP) & SSPIOCPS) != 0)
-			have_autoterm = TRUE;
-		else
-			have_autoterm = FALSE;
-	}
-
-	if (have_autoterm)
-		configure_termination(ahc, &sd, adapter_control, sxfrctl1);
-
-	release_seeprom(&sd);
-}
-
-static void
-configure_termination(struct ahc_softc *ahc,
-		      struct seeprom_descriptor *sd,
-		      u_int adapter_control,
-		      u_int *sxfrctl1)
+int
+ahc_pci_map_registers(struct ahc_softc *ahc)
 {
-	u_int8_t brddat;
-	
-	brddat = 0;
+	struct	resource *regs;
+	u_int	command;
+	int	regs_type;
+	int	regs_id;
 
-	/*
-	 * Update the settings in sxfrctl1 to match the
-	 * termination settings 
-	 */
-	*sxfrctl1 = 0;
-	
-	/*
-	 * SEECS must be on for the GALS to latch
-	 * the data properly.  Be sure to leave MS
-	 * on or we will release the seeprom.
-	 */
-	SEEPROM_OUTB(sd, sd->sd_MS | sd->sd_CS);
-	if ((adapter_control & CFAUTOTERM) != 0
-	 || (ahc->features & AHC_NEW_TERMCTL) != 0) {
-		int internal50_present;
-		int internal68_present;
-		int externalcable_present;
-		int eeprom_present;
-		int enableSEC_low;
-		int enableSEC_high;
-		int enablePRI_low;
-		int enablePRI_high;
-
-		enableSEC_low = 0;
-		enableSEC_high = 0;
-		enablePRI_low = 0;
-		enablePRI_high = 0;
-		if ((ahc->features & AHC_NEW_TERMCTL) != 0) {
-			ahc_new_term_detect(ahc, &enableSEC_low,
-					       &enableSEC_high,
-					       &enablePRI_low,
-					       &enablePRI_high,
-					       &eeprom_present);
-			if ((adapter_control & CFSEAUTOTERM) == 0) {
-				if (bootverbose)
-					printf("%s: Manual SE Termination\n",
-					       ahc_name(ahc));
-				enableSEC_low = (adapter_control & CFSTERM);
-				enableSEC_high = (adapter_control & CFWSTERM);
-			}
-			if ((adapter_control & CFAUTOTERM) == 0) {
-				if (bootverbose)
-					printf("%s: Manual LVD Termination\n",
-					       ahc_name(ahc));
-				enablePRI_low = enablePRI_high =
-				    (adapter_control & CFLVDSTERM);
-			}
-			/* Make the table calculations below happy */
-			internal50_present = 0;
-			internal68_present = 1;
-			externalcable_present = 1;
-		} else if ((ahc->features & AHC_SPIOCAP) != 0) {
-			aic785X_cable_detect(ahc, &internal50_present,
-					     &externalcable_present,
-					     &eeprom_present);
-		} else {
-			aic787X_cable_detect(ahc, &internal50_present,
-					     &internal68_present,
-					     &externalcable_present,
-					     &eeprom_present);
-		}
-
-		if ((ahc->features & AHC_WIDE) == 0)
-			internal68_present = 0;
-
-		if (bootverbose) {
-			if ((ahc->features & AHC_ULTRA2) == 0) {
-				printf("%s: internal 50 cable %s present, "
-				       "internal 68 cable %s present\n",
-				       ahc_name(ahc),
-				       internal50_present ? "is":"not",
-				       internal68_present ? "is":"not");
-
-				printf("%s: external cable %s present\n",
-				       ahc_name(ahc),
-				       externalcable_present ? "is":"not");
-			}
-			printf("%s: BIOS eeprom %s present\n",
-			       ahc_name(ahc), eeprom_present ? "is" : "not");
-		}
+	command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, /*bytes*/1);
+	regs = NULL;
+	regs_type = 0;
+	regs_id = 0;
+#ifdef AHC_ALLOW_MEMIO
+	if ((command & PCIM_CMD_MEMEN) != 0) {
+		regs_type = SYS_RES_MEMORY;
+		regs_id = AHC_PCI_MEMADDR;
+		regs = bus_alloc_resource(ahc->dev_softc, regs_type,
+					  &regs_id, 0, ~0, 1, RF_ACTIVE);
+		if (regs != NULL) {
+			ahc->tag = rman_get_bustag(regs);
+			ahc->bsh = rman_get_bushandle(regs);
 
-		if ((ahc->flags & AHC_INT50_SPEEDFLEX) != 0) {
 			/*
-			 * The 50 pin connector is a separate bus,
-			 * so force it to always be terminated.
-			 * In the future, perform current sensing
-			 * to determine if we are in the middle of
-			 * a properly terminated bus.
+			 * Do a quick test to see if memory mapped
+			 * I/O is functioning correctly.
 			 */
-			internal50_present = 0;
-		}
-
-		/*
-		 * Now set the termination based on what
-		 * we found.
-		 * Flash Enable = BRDDAT7
-		 * Secondary High Term Enable = BRDDAT6
-		 * Secondary Low Term Enable = BRDDAT5 (7890)
-		 * Primary High Term Enable = BRDDAT4 (7890)
-		 */
-		if ((ahc->features & AHC_ULTRA2) == 0
-		    && (internal50_present != 0)
-		    && (internal68_present != 0)
-		    && (externalcable_present != 0)) {
-			printf("%s: Illegal cable configuration!!. "
-			       "Only two connectors on the "
-			       "adapter may be used at a "
-			       "time!\n", ahc_name(ahc));
-		}
-
-		if ((ahc->features & AHC_WIDE) != 0
-		 && ((externalcable_present == 0)
-		  || (internal68_present == 0)
-		  || (enableSEC_high != 0))) {
-			brddat |= BRDDAT6;
-			if (bootverbose) {
-				if ((ahc->flags & AHC_INT50_SPEEDFLEX) != 0)
-					printf("%s: 68 pin termination "
-					       "Enabled\n", ahc_name(ahc));
-				else
-					printf("%s: %sHigh byte termination "
-					       "Enabled\n", ahc_name(ahc),
-					       enableSEC_high ? "Secondary "
-							      : "");
-			}
-		}
-
-		if (((internal50_present ? 1 : 0)
-		   + (internal68_present ? 1 : 0)
-		   + (externalcable_present ? 1 : 0)) <= 1
-		 || (enableSEC_low != 0)) {
-			if ((ahc->features & AHC_ULTRA2) != 0)
-				brddat |= BRDDAT5;
-			else
-				*sxfrctl1 |= STPWEN;
-			if (bootverbose) {
-				if ((ahc->flags & AHC_INT50_SPEEDFLEX) != 0)
-					printf("%s: 50 pin termination "
-					       "Enabled\n", ahc_name(ahc));
-				else
-					printf("%s: %sLow byte termination "
-					       "Enabled\n", ahc_name(ahc),
-					       enableSEC_low ? "Secondary "
-							     : "");
+			if (ahc_inb(ahc, HCNTRL) == 0xFF) {
+				device_printf(ahc->dev_softc,
+				       "PCI Device %d:%d:%d failed memory "
+				       "mapped test.  Using PIO.\n",
+				       ahc_get_pci_bus(ahc->dev_softc),
+				       ahc_get_pci_slot(ahc->dev_softc),
+				       ahc_get_pci_function(ahc->dev_softc));
+				bus_release_resource(ahc->dev_softc, regs_type,
+						     regs_id, regs);
+				regs = NULL;
 			}
 		}
-
-		if (enablePRI_low != 0) {
-			*sxfrctl1 |= STPWEN;
-			if (bootverbose)
-				printf("%s: Primary Low Byte termination "
-				       "Enabled\n", ahc_name(ahc));
-		}
-
-		/*
-		 * Setup STPWEN before setting up the rest of
-		 * the termination per the tech note on the U160 cards.
-		 */
-		ahc_outb(ahc, SXFRCTL1, *sxfrctl1);
-
-		if (enablePRI_high != 0) {
-			brddat |= BRDDAT4;
-			if (bootverbose)
-				printf("%s: Primary High Byte "
-				       "termination Enabled\n",
-				       ahc_name(ahc));
-		}
-		
-		write_brdctl(ahc, brddat);
-
-	} else {
-		if ((adapter_control & CFSTERM) != 0) {
-			*sxfrctl1 |= STPWEN;
-
-			if (bootverbose)
-				printf("%s: %sLow byte termination Enabled\n",
-				       ahc_name(ahc),
-				       (ahc->features & AHC_ULTRA2) ? "Primary "
-								    : "");
-		}
-
-		if ((adapter_control & CFWSTERM) != 0) {
-			brddat |= BRDDAT6;
-			if (bootverbose)
-				printf("%s: %sHigh byte termination Enabled\n",
-				       ahc_name(ahc),
-				       (ahc->features & AHC_ULTRA2)
-				     ? "Secondary " : "");
-		}
-
-		/*
-		 * Setup STPWEN before setting up the rest of
-		 * the termination per the tech note on the U160 cards.
-		 */
-		ahc_outb(ahc, SXFRCTL1, *sxfrctl1);
-
-		write_brdctl(ahc, brddat);
 	}
-	SEEPROM_OUTB(sd, sd->sd_MS); /* Clear CS */
-}
-
-static void
-ahc_new_term_detect(struct ahc_softc *ahc, int *enableSEC_low,
-		    int *enableSEC_high, int *enablePRI_low,
-		    int *enablePRI_high, int *eeprom_present)
-{
-	u_int8_t brdctl;
-
-	/*
-	 * BRDDAT7 = Eeprom
-	 * BRDDAT6 = Enable Secondary High Byte termination
-	 * BRDDAT5 = Enable Secondary Low Byte termination
-	 * BRDDAT4 = Enable Primary high byte termination
-	 * BRDDAT3 = Enable Primary low byte termination
-	 */
-	brdctl = read_brdctl(ahc);
-	*eeprom_present = brdctl & BRDDAT7;
-	*enableSEC_high = (brdctl & BRDDAT6);
-	*enableSEC_low = (brdctl & BRDDAT5);
-	*enablePRI_high = (brdctl & BRDDAT4);
-	*enablePRI_low = (brdctl & BRDDAT3);
-}
-
-static void
-aic787X_cable_detect(struct ahc_softc *ahc, int *internal50_present,
-		     int *internal68_present, int *externalcable_present,
-		     int *eeprom_present)
-{
-	u_int8_t brdctl;
-
-	/*
-	 * First read the status of our cables.
-	 * Set the rom bank to 0 since the
-	 * bank setting serves as a multiplexor
-	 * for the cable detection logic.
-	 * BRDDAT5 controls the bank switch.
-	 */
-	write_brdctl(ahc, 0);
-
-	/*
-	 * Now read the state of the internal
-	 * connectors.  BRDDAT6 is INT50 and
-	 * BRDDAT7 is INT68.
-	 */
-	brdctl = read_brdctl(ahc);
-	*internal50_present = !(brdctl & BRDDAT6);
-	*internal68_present = !(brdctl & BRDDAT7);
-
-	/*
-	 * Set the rom bank to 1 and determine
-	 * the other signals.
-	 */
-	write_brdctl(ahc, BRDDAT5);
-
-	/*
-	 * Now read the state of the external
-	 * connectors.  BRDDAT6 is EXT68 and
-	 * BRDDAT7 is EPROMPS.
-	 */
-	brdctl = read_brdctl(ahc);
-	*externalcable_present = !(brdctl & BRDDAT6);
-	*eeprom_present = brdctl & BRDDAT7;
-}
-
-static void
-aic785X_cable_detect(struct ahc_softc *ahc, int *internal50_present,
-		     int *externalcable_present, int *eeprom_present)
-{
-	u_int8_t brdctl;
-
-	ahc_outb(ahc, BRDCTL, BRDRW|BRDCS);
-	ahc_outb(ahc, BRDCTL, 0);
-	brdctl = ahc_inb(ahc, BRDCTL);
-	*internal50_present = !(brdctl & BRDDAT5);
-	*externalcable_present = !(brdctl & BRDDAT6);
-
-	*eeprom_present = (ahc_inb(ahc, SPIOCAP) & EEPROM) != 0;
-}
-	
-static int
-acquire_seeprom(struct ahc_softc *ahc, struct seeprom_descriptor *sd)
-{
-	int wait;
-
-	if ((ahc->features & AHC_SPIOCAP) != 0
-	 && (ahc_inb(ahc, SPIOCAP) & SEEPROM) == 0)
-		return (0);
-
-	/*
-	 * Request access of the memory port.  When access is
-	 * granted, SEERDY will go high.  We use a 1 second
-	 * timeout which should be near 1 second more than
-	 * is needed.  Reason: after the chip reset, there
-	 * should be no contention.
-	 */
-	SEEPROM_OUTB(sd, sd->sd_MS);
-	wait = 1000;  /* 1 second timeout in msec */
-	while (--wait && ((SEEPROM_STATUS_INB(sd) & sd->sd_RDY) == 0)) {
-		DELAY(1000);  /* delay 1 msec */
-	}
-	if ((SEEPROM_STATUS_INB(sd) & sd->sd_RDY) == 0) {
-		SEEPROM_OUTB(sd, 0); 
-		return (0);
-	}
-	return(1);
-}
-
-static void
-release_seeprom(struct seeprom_descriptor *sd)
-{
-	/* Release access to the memory port and the serial EEPROM. */
-	SEEPROM_OUTB(sd, 0);
-}
-
-static void
-write_brdctl(struct ahc_softc *ahc, u_int8_t value)
-{
-	u_int8_t brdctl;
-
-	if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7895) {
-		brdctl = BRDSTB;
-	 	if (ahc->channel == 'B')
-			brdctl |= BRDCS;
-	} else if ((ahc->features & AHC_ULTRA2) != 0) {
-		brdctl = 0;
-	} else {
-		brdctl = BRDSTB|BRDCS;
-	}
-	ahc_outb(ahc, BRDCTL, brdctl);
-	DELAY(20);
-	brdctl |= value;
-	ahc_outb(ahc, BRDCTL, brdctl);
-	DELAY(20);
-	if ((ahc->features & AHC_ULTRA2) != 0)
-		brdctl |= BRDSTB_ULTRA2;
-	else
-		brdctl &= ~BRDSTB;
-	ahc_outb(ahc, BRDCTL, brdctl);
-	DELAY(20);
-	if ((ahc->features & AHC_ULTRA2) != 0)
-		brdctl = 0;
-	else
-		brdctl &= ~BRDCS;
-	ahc_outb(ahc, BRDCTL, brdctl);
-}
-
-static u_int8_t
-read_brdctl(ahc)
-	struct 	ahc_softc *ahc;
-{
-	u_int8_t brdctl;
-	u_int8_t value;
-
-	if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7895) {
-		brdctl = BRDRW;
-	 	if (ahc->channel == 'B')
-			brdctl |= BRDCS;
-	} else if ((ahc->features & AHC_ULTRA2) != 0) {
-		brdctl = BRDRW_ULTRA2;
-	} else {
-		brdctl = BRDRW|BRDCS;
-	}
-	ahc_outb(ahc, BRDCTL, brdctl);
-	DELAY(20);
-	value = ahc_inb(ahc, BRDCTL);
-	ahc_outb(ahc, BRDCTL, 0);
-	return (value);
-}
-
-#define	DPE	0x80
-#define SSE	0x40
-#define	RMA	0x20
-#define	RTA	0x10
-#define STA	0x08
-#define DPR	0x01
-
-void
-ahc_pci_intr(struct ahc_softc *ahc)
-{
-	u_int8_t status1;
-
-	status1 = pci_read_config(ahc->device, PCIR_STATUS + 1, /*bytes*/1);
-
-	if (status1 & DPE) {
-		printf("%s: Data Parity Error Detected during address "
-		       "or write data phase\n", ahc_name(ahc));
-	}
-	if (status1 & SSE) {
-		printf("%s: Signal System Error Detected\n", ahc_name(ahc));
-	}
-	if (status1 & RMA) {
-		printf("%s: Received a Master Abort\n", ahc_name(ahc));
-	}
-	if (status1 & RTA) {
-		printf("%s: Received a Target Abort\n", ahc_name(ahc));
-	}
-	if (status1 & STA) {
-		printf("%s: Signaled a Target Abort\n", ahc_name(ahc));
-	}
-	if (status1 & DPR) {
-		printf("%s: Data Parity Error has been reported via PERR#\n",
-		       ahc_name(ahc));
-	}
-	if ((status1 & (DPE|SSE|RMA|RTA|STA|DPR)) == 0) {
-		printf("%s: Latched PCIERR interrupt with "
-		       "no status bits set\n", ahc_name(ahc)); 
+#endif
+	if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
+		regs_type = SYS_RES_IOPORT;
+		regs_id = AHC_PCI_IOADDR;
+		regs = bus_alloc_resource(ahc->dev_softc, regs_type,
+					  &regs_id, 0, ~0, 1, RF_ACTIVE);
+		ahc->tag = rman_get_bustag(regs);
+		ahc->bsh = rman_get_bushandle(regs);
 	}
-	pci_write_config(ahc->device, PCIR_STATUS + 1, status1, /*bytes*/1);
-
-	if (status1 & (DPR|RMA|RTA)) {
-		ahc_outb(ahc, CLRINT, CLRPARERR);
+	ahc->platform_data->regs_res_type = regs_type;
+	ahc->platform_data->regs_res_id = regs_id;
+	ahc->platform_data->regs = regs;
+ 
+	if (regs == NULL) {
+		device_printf(ahc->dev_softc,
+			      "can't allocate register resources\n");
+		return (ENOMEM);
 	}
-}
-
-static int
-ahc_aic7850_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	*channel = 'A';
-	*chip = AHC_AIC7850;
-	*features = AHC_AIC7850_FE;
-	return (0);
-}
-
-static int
-ahc_aic7855_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	*channel = 'A';
-	*chip = AHC_AIC7855;
-	*features = AHC_AIC7855_FE;
-	return (0);
-}
-
-static int
-ahc_aic7859_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	*channel = 'A';
-	*chip = AHC_AIC7859;
-	*features = AHC_AIC7859_FE;
-	return (0);
-}
-
-static int
-ahc_aic7860_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	*channel = 'A';
-	*chip = AHC_AIC7860;
-	*features = AHC_AIC7860_FE;
-	return (0);
-}
-
-static int
-ahc_aic7870_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	*channel = 'A';
-	*chip = AHC_AIC7870;
-	*features = AHC_AIC7870_FE;
-	return (0);
-}
-
-static int
-ahc_aha394X_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	int error;
-
-	error = ahc_aic7870_setup(dev, channel, chip, features, flags);
-	if (error == 0)
-		error = ahc_aha394XX_setup(dev, channel, chip, features, flags);
-	return (error);
-}
-
-static int
-ahc_aha398X_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	int error;
-
-	error = ahc_aic7870_setup(dev, channel, chip, features, flags);
-	if (error == 0)
-		error = ahc_aha398XX_setup(dev, channel, chip, features, flags);
-	return (error);
-}
-
-static int
-ahc_aic7880_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	*channel = 'A';
-	*chip = AHC_AIC7880;
-	*features = AHC_AIC7880_FE;
 	return (0);
 }
 
-static int
-ahc_2940Pro_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
+int
+ahc_pci_map_int(struct ahc_softc *ahc)
 {
-	int error;
-
-	*flags |= AHC_INT50_SPEEDFLEX;
-	error = ahc_aic7880_setup(dev, channel, chip, features, flags);
-	return (0);
-}
+	int zero;
 
-static int
-ahc_aha394XU_setup(device_t dev, char *channel, ahc_chip *chip,
-		   ahc_feature *features, ahc_flag *flags)
-{
-	int error;
-
-	error = ahc_aic7880_setup(dev, channel, chip, features, flags);
-	if (error == 0)
-		error = ahc_aha394XX_setup(dev, channel, chip, features, flags);
-	return (error);
-}
-
-static int
-ahc_aha398XU_setup(device_t dev, char *channel, ahc_chip *chip,
-		   ahc_feature *features, ahc_flag *flags)
-{
-	int error;
-
-	error = ahc_aic7880_setup(dev, channel, chip, features, flags);
-	if (error == 0)
-		error = ahc_aha398XX_setup(dev, channel, chip, features, flags);
-	return (error);
-}
-
-static int
-ahc_aic7890_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	*channel = 'A';
-	*chip = AHC_AIC7890;
-	*features = AHC_AIC7890_FE;
-	*flags |= AHC_NEWEEPROM_FMT;
-	return (0);
-}
-
-static int
-ahc_aic7892_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	*channel = 'A';
-	*chip = AHC_AIC7892;
-	*features = AHC_AIC7892_FE;
-	*flags |= AHC_NEWEEPROM_FMT;
-	return (0);
-}
-
-static int
-ahc_aic7895_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	u_int32_t devconfig;
-
-	*channel = pci_get_function(dev) == 1 ? 'B' : 'A';
-	*chip = AHC_AIC7895;
-	/* The 'C' revision of the aic7895 has a few additional features */
-	if (pci_get_revid(dev) >= 4)
-		*features = AHC_AIC7895C_FE;
-	else
-		*features = AHC_AIC7895_FE;
-	*flags |= AHC_NEWEEPROM_FMT;
-	devconfig = pci_read_config(dev, DEVCONFIG, /*bytes*/4);
-	devconfig &= ~SCBSIZE32;
-	pci_write_config(dev, DEVCONFIG, devconfig, /*bytes*/4);
-	return (0);
-}
-
-static int
-ahc_aic7896_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	*channel = pci_get_function(dev) == 1 ? 'B' : 'A';
-	*chip = AHC_AIC7896;
-	*features = AHC_AIC7896_FE;
-	*flags |= AHC_NEWEEPROM_FMT;
-	return (0);
-}
-
-static int
-ahc_aic7899_setup(device_t dev, char *channel, ahc_chip *chip,
-		  ahc_feature *features, ahc_flag *flags)
-{
-	*channel = pci_get_function(dev) == 1 ? 'B' : 'A';
-	*chip = AHC_AIC7899;
-	*features = AHC_AIC7899_FE;
-	*flags |= AHC_NEWEEPROM_FMT;
-	return (0);
-}
-
-static int
-ahc_raid_setup(device_t dev, char *channel, ahc_chip *chip,
-	       ahc_feature *features, ahc_flag *flags)
-{
-	printf("RAID functionality unsupported\n");
-	return (ENXIO);
-}
-
-static int
-ahc_aha394XX_setup(device_t dev, char *channel, ahc_chip *chip,
-		   ahc_feature *features, ahc_flag *flags)
-{
-	switch (pci_get_slot(dev)) {
-	case AHC_394X_SLOT_CHANNEL_A:
-		*channel = 'A';
-		break;
-	case AHC_394X_SLOT_CHANNEL_B:
-		*channel = 'B';
-		break;
-	default:
-		printf("adapter at unexpected slot %d\n"
-		       "unable to map to a channel\n",
-		       pci_get_slot(dev));
-		*channel = 'A';
-	}
-	return (0);
-}
-
-static int
-ahc_aha398XX_setup(device_t dev, char *channel, ahc_chip *chip,
-		   ahc_feature *features, ahc_flag *flags)
-{
-	switch (pci_get_slot(dev)) {
-	case AHC_398X_SLOT_CHANNEL_A:
-		*channel = 'A';
-		break;
-	case AHC_398X_SLOT_CHANNEL_B:
-		*channel = 'B';
-		break;
-	case AHC_398X_SLOT_CHANNEL_C:
-		*channel = 'C';
-		break;
-	default:
-		printf("adapter at unexpected slot %d\n"
-		       "unable to map to a channel\n",
-		       pci_get_slot(dev));
-		*channel = 'A';
-	}
-	*flags |= AHC_LARGE_SEEPROM;
+	zero = 0;
+	ahc->platform_data->irq =
+	    bus_alloc_resource(ahc->dev_softc, SYS_RES_IRQ, &zero,
+			       0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
+	if (ahc->platform_data->irq == NULL)
+		return (ENOMEM);
+	ahc->platform_data->irq_res_type = SYS_RES_IRQ;
 	return (0);
 }
diff --git a/sys/dev/aic7xxx/aic7xxx.c b/sys/dev/aic7xxx/aic7xxx.c
index 29e96f499136..b5da00ff4655 100644
--- a/sys/dev/aic7xxx/aic7xxx.c
+++ b/sys/dev/aic7xxx/aic7xxx.c
@@ -1,9 +1,5 @@
 /*
- * Generic driver for the aic7xxx based adaptec SCSI controllers
- * Product specific probe and attach routines can be found in:
- * i386/eisa/ahc_eisa.c	27/284X and aic7770 motherboard controllers
- * pci/ahc_pci.c	3985, 3980, 3940, 2940, aic7895, aic7890,
- *			aic7880, aic7870, aic7860, and aic7850 controllers
+ * Core routines and tables shareable across OS platforms.
  *
  * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999, 2000 Justin T. Gibbs.
  * All rights reserved.
@@ -18,7 +14,7 @@
  *    derived from this software without specific prior written permission.
  *
  * Alternatively, this software may be distributed under the terms of the
- * the GNU Public License ("GPL").
+ * GNU Public License ("GPL").
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
@@ -32,139 +28,27 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $FreeBSD$
- */
-/*
- * A few notes on features of the driver.
- *
- * SCB paging takes advantage of the fact that devices stay disconnected
- * from the bus a relatively long time and that while they're disconnected,
- * having the SCBs for these transactions down on the host adapter is of
- * little use.  Instead of leaving this idle SCB down on the card we copy
- * it back up into kernel memory and reuse the SCB slot on the card to
- * schedule another transaction.  This can be a real payoff when doing random
- * I/O to tagged queueing devices since there are more transactions active at
- * once for the device to sort for optimal seek reduction. The algorithm goes
- * like this...
- *
- * The sequencer maintains two lists of its hardware SCBs.  The first is the
- * singly linked free list which tracks all SCBs that are not currently in
- * use.  The second is the doubly linked disconnected list which holds the
- * SCBs of transactions that are in the disconnected state sorted most
- * recently disconnected first.  When the kernel queues a transaction to
- * the card, a hardware SCB to "house" this transaction is retrieved from
- * either of these two lists.  If the SCB came from the disconnected list,
- * a check is made to see if any data transfer or SCB linking (more on linking
- * in a bit) information has been changed since it was copied from the host
- * and if so, DMAs the SCB back up before it can be used.  Once a hardware
- * SCB has been obtained, the SCB is DMAed from the host.  Before any work
- * can begin on this SCB, the sequencer must ensure that either the SCB is
- * for a tagged transaction or the target is not already working on another
- * non-tagged transaction.  If a conflict arises in the non-tagged case, the
- * sequencer finds the SCB for the active transactions and sets the SCB_LINKED
- * field in that SCB to this next SCB to execute.  To facilitate finding
- * active non-tagged SCBs, the last four bytes of up to the first four hardware
- * SCBs serve as a storage area for the currently active SCB ID for each
- * target.
- *
- * When a device reconnects, a search is made of the hardware SCBs to find
- * the SCB for this transaction.  If the search fails, a hardware SCB is
- * pulled from either the free or disconnected SCB list and the proper
- * SCB is DMAed from the host.  If the MK_MESSAGE control bit is set
- * in the control byte of the SCB while it was disconnected, the sequencer
- * will assert ATN and attempt to issue a message to the host.
- *
- * When a command completes, a check for non-zero status and residuals is
- * made.  If either of these conditions exists, the SCB is DMAed back up to
- * the host so that it can interpret this information.  Additionally, in the
- * case of bad status, the sequencer generates a special interrupt and pauses
- * itself.  This allows the host to setup a request sense command if it 
- * chooses for this target synchronously with the error so that sense
- * information isn't lost.
+ * $Id: //depot/src/aic7xxx/aic7xxx.c#4 $
  *
+ * $FreeBSD$
  */
 
-#include <opt_aic7xxx.h>
-
-#include <pci.h>
-#include <stddef.h>	/* For offsetof */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/malloc.h>
-#include <sys/eventhandler.h>
-#include <sys/buf.h>
-#include <sys/proc.h>
-
-#include <cam/cam.h>
-#include <cam/cam_ccb.h>
-#include <cam/cam_sim.h>
-#include <cam/cam_xpt_sim.h>
-#include <cam/cam_debug.h>
-
-#include <cam/scsi/scsi_all.h>
-#include <cam/scsi/scsi_message.h>
-
-#if NPCI > 0
-#include <machine/bus_memio.h>
+#ifdef	__linux__
+#include "aic7xxx_linux.h"
+#include "aic7xxx_inline.h"
+#include "aicasm/aicasm_insformat.h"
 #endif
-#include <machine/bus_pio.h>
-#include <machine/bus.h>
-#include <machine/clock.h>
-#include <sys/rman.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/pmap.h>
-
-#include <dev/aic7xxx/aic7xxx.h>
-#include <dev/aic7xxx/sequencer.h>
 
-#include <aic7xxx_reg.h>
-#include <aic7xxx_seq.h>
-
-#include <sys/kernel.h>
-
-#ifndef AHC_TMODE_ENABLE
-#define AHC_TMODE_ENABLE 0
+#ifdef	__FreeBSD__
+#include <dev/aic7xxx/aic7xxx_freebsd.h>
+#include <dev/aic7xxx/aic7xxx_inline.h>
+#include <dev/aic7xxx/aicasm/aicasm_insformat.h>
 #endif
 
-#define MAX(a,b) (((a) > (b)) ? (a) : (b))
-#define MIN(a,b) (((a) < (b)) ? (a) : (b))
-#define ALL_CHANNELS '\0'
-#define ALL_TARGETS_MASK 0xFFFF
-#define INITIATOR_WILDCARD	(~0)
-
-#define	SIM_IS_SCSIBUS_B(ahc, sim)	\
-	((sim) == ahc->sim_b)
-#define	SIM_CHANNEL(ahc, sim)	\
-	(((sim) == ahc->sim_b) ? 'B' : 'A')
-#define	SIM_SCSI_ID(ahc, sim)	\
-	(((sim) == ahc->sim_b) ? ahc->our_id_b : ahc->our_id)
-#define	SIM_PATH(ahc, sim)	\
-	(((sim) == ahc->sim_b) ? ahc->path_b : ahc->path)
-#define	SCB_IS_SCSIBUS_B(scb)	\
-	(((scb)->hscb->tcl & SELBUSB) != 0)
-#define	SCB_TARGET(scb)	\
-	(((scb)->hscb->tcl & TID) >> 4)
-#define	SCB_CHANNEL(scb) \
-	(SCB_IS_SCSIBUS_B(scb) ? 'B' : 'A')
-#define	SCB_LUN(scb)	\
-	((scb)->hscb->tcl & LID)
-#define SCB_TARGET_OFFSET(scb)		\
-	(SCB_TARGET(scb) + (SCB_IS_SCSIBUS_B(scb) ? 8 : 0))
-#define SCB_TARGET_MASK(scb)		\
-	(0x01 << (SCB_TARGET_OFFSET(scb)))
-#define TCL_CHANNEL(ahc, tcl)		\
-	((((ahc)->features & AHC_TWIN) && ((tcl) & SELBUSB)) ? 'B' : 'A')
-#define TCL_SCSI_ID(ahc, tcl)		\
-	(TCL_CHANNEL((ahc), (tcl)) == 'B' ? (ahc)->our_id_b : (ahc)->our_id)
-#define TCL_TARGET(tcl) (((tcl) & TID) >> TCL_TARGET_SHIFT)
-#define TCL_LUN(tcl) ((tcl) & LID)
-
-#define ccb_scb_ptr spriv_ptr0
-#define ccb_ahc_ptr spriv_ptr1
+/****************************** Softc Data ************************************/
+struct ahc_softc_tailq ahc_tailq = TAILQ_HEAD_INITIALIZER(ahc_tailq);
 
+/***************************** Lookup Tables **********************************/
 char *ahc_chip_names[] =
 {
 	"NONE",
@@ -175,523 +59,16 @@ char *ahc_chip_names[] =
 	"aic7860",
 	"aic7870",
 	"aic7880",
-	"aic7890/91",
-	"aic7892",
 	"aic7895",
+	"aic7895C",
+	"aic7890/91",
 	"aic7896/97",
+	"aic7892",
 	"aic7899"
 };
+const u_int num_chip_names = NUM_ELEMENTS(ahc_chip_names);
 
-typedef enum {
-	ROLE_UNKNOWN,
-	ROLE_INITIATOR,
-	ROLE_TARGET
-} role_t;
-
-struct ahc_devinfo {
-	int	  our_scsiid;
-	int	  target_offset;
-	u_int16_t target_mask;
-	u_int8_t  target;
-	u_int8_t  lun;
-	char	  channel;
-	role_t	  role;		/*
-				 * Only guaranteed to be correct if not
-				 * in the busfree state.
-				 */
-};
-
-typedef enum {
-	SEARCH_COMPLETE,
-	SEARCH_COUNT,
-	SEARCH_REMOVE
-} ahc_search_action;
-
-#ifdef AHC_DEBUG
-static int     ahc_debug = AHC_DEBUG;
-#endif
-
-#if NPCI > 0
-void ahc_pci_intr(struct ahc_softc *ahc);
-#endif
-
-static int	ahcinitscbdata(struct ahc_softc *ahc);
-static void	ahcfiniscbdata(struct ahc_softc *ahc);
-
-static bus_dmamap_callback_t	ahcdmamapcb; 
-
-#if UNUSED
-static void	ahc_dump_targcmd(struct target_cmd *cmd);
-#endif
-static void	ahc_shutdown(void *arg, int howto);
-static cam_status
-		ahc_find_tmode_devs(struct ahc_softc *ahc,
-				    struct cam_sim *sim, union ccb *ccb,
-				    struct tmode_tstate **tstate,
-				    struct tmode_lstate **lstate,
-				    int notfound_failure);
-static void	ahc_action(struct cam_sim *sim, union ccb *ccb);
-static void	ahc_async(void *callback_arg, u_int32_t code,
-			  struct cam_path *path, void *arg);
-static void	ahc_execute_scb(void *arg, bus_dma_segment_t *dm_segs,
-				int nsegments, int error);
-static void	ahc_poll(struct cam_sim *sim);
-static void	ahc_setup_data(struct ahc_softc *ahc,
-			       struct ccb_scsiio *csio, struct scb *scb);
-static void	ahc_freeze_devq(struct ahc_softc *ahc, struct cam_path *path);
-static void	ahcallocscbs(struct ahc_softc *ahc);
-#if UNUSED
-static void	ahc_scb_devinfo(struct ahc_softc *ahc,
-				struct ahc_devinfo *devinfo,
-				struct scb *scb);
-#endif
-static void	ahc_fetch_devinfo(struct ahc_softc *ahc,
-				  struct ahc_devinfo *devinfo);
-static void	ahc_compile_devinfo(struct ahc_devinfo *devinfo, u_int our_id,
-				    u_int target, u_int lun, char channel,
-				    role_t role);
-static u_int	ahc_abort_wscb(struct ahc_softc *ahc, u_int scbpos, u_int prev);
-static void	ahc_done(struct ahc_softc *ahc, struct scb *scbp);
-static struct tmode_tstate *
-		ahc_alloc_tstate(struct ahc_softc *ahc,
-				 u_int scsi_id, char channel);
-static void	ahc_free_tstate(struct ahc_softc *ahc,
-				u_int scsi_id, char channel, int force);
-static void	ahc_handle_en_lun(struct ahc_softc *ahc, struct cam_sim *sim,
-				  union ccb *ccb);
-static void	ahc_update_scsiid(struct ahc_softc *ahc, u_int targid_mask);
-static int	ahc_handle_target_cmd(struct ahc_softc *ahc,
-				      struct target_cmd *cmd);
-static void 	ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat);
-static void	ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat);
-static void	ahc_build_transfer_msg(struct ahc_softc *ahc,
-				       struct ahc_devinfo *devinfo);
-static void	ahc_setup_initiator_msgout(struct ahc_softc *ahc,
-					   struct ahc_devinfo *devinfo,
-					   struct scb *scb);
-static void	ahc_setup_target_msgin(struct ahc_softc *ahc,
-				       struct ahc_devinfo *devinfo);
-static int	ahc_handle_msg_reject(struct ahc_softc *ahc,
-				      struct ahc_devinfo *devinfo);
-static void	ahc_clear_msg_state(struct ahc_softc *ahc);
-static void	ahc_handle_message_phase(struct ahc_softc *ahc,
-					 struct cam_path *path);
-static int	ahc_sent_msg(struct ahc_softc *ahc, u_int msgtype, int full);
-typedef enum {
-	MSGLOOP_IN_PROG,
-	MSGLOOP_MSGCOMPLETE,
-	MSGLOOP_TERMINATED
-} msg_loop_stat;
-static int ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
-				   struct ahc_devinfo *devinfo);
-static void	ahc_handle_ign_wide_residue(struct ahc_softc *ahc,
-					    struct ahc_devinfo *devinfo);
-static void	ahc_handle_devreset(struct ahc_softc *ahc,
-				    struct ahc_devinfo *devinfo,
-				    cam_status status, ac_code acode,
-				    char *message,
-				    int verbose_level);
-#ifdef AHC_DUMP_SEQ
-static void	ahc_dumpseq(struct ahc_softc *ahc);
-#endif
-static void	ahc_loadseq(struct ahc_softc *ahc);
-static int	ahc_check_patch(struct ahc_softc *ahc,
-				struct patch **start_patch,
-				int start_instr, int *skip_addr);
-static void	ahc_download_instr(struct ahc_softc *ahc,
-				   int instrptr, u_int8_t *dconsts);
-static int	ahc_match_scb(struct scb *scb, int target, char channel,
-			      int lun, u_int tag, role_t role);
-#ifdef AHC_DEBUG
-static void	ahc_print_scb(struct scb *scb);
-#endif
-static int	ahc_search_qinfifo(struct ahc_softc *ahc, int target,
-				   char channel, int lun, u_int tag,
-				   role_t role, u_int32_t status,
-				   ahc_search_action action);
-static void	ahc_abort_ccb(struct ahc_softc *ahc, struct cam_sim *sim,
-			      union ccb *ccb);
-static int	ahc_reset_channel(struct ahc_softc *ahc, char channel,
-				  int initiate_reset);
-static int	ahc_abort_scbs(struct ahc_softc *ahc, int target,
-			       char channel, int lun, u_int tag, role_t role,
-			       u_int32_t status);
-static int	ahc_search_disc_list(struct ahc_softc *ahc, int target,
-				     char channel, int lun, u_int tag,
-				     int stop_on_first, int remove,
-				     int save_state);
-static u_int	ahc_rem_scb_from_disc_list(struct ahc_softc *ahc,
-					   u_int prev, u_int scbptr);
-static void	ahc_add_curscb_to_free_list(struct ahc_softc *ahc);
-static void	ahc_clear_intstat(struct ahc_softc *ahc);
-static void	ahc_reset_current_bus(struct ahc_softc *ahc);
-static struct ahc_syncrate *
-		ahc_devlimited_syncrate(struct ahc_softc *ahc, u_int *period);
-static struct ahc_syncrate *
-		ahc_find_syncrate(struct ahc_softc *ahc, u_int *period,
-				  u_int maxsync);
-static u_int	ahc_find_period(struct ahc_softc *ahc, u_int scsirate,
-				u_int maxsync);
-static void	ahc_validate_offset(struct ahc_softc *ahc,
-				    struct ahc_syncrate *syncrate,
-				    u_int *offset, int wide); 
-static void	ahc_update_target_msg_request(struct ahc_softc *ahc,
-					      struct ahc_devinfo *devinfo,
-					      struct ahc_initiator_tinfo *tinfo,
-					      int force, int paused);
-static int	ahc_create_path(struct ahc_softc *ahc,
-				struct ahc_devinfo *devinfo,
-				struct cam_path **path);
-static void	ahc_set_syncrate(struct ahc_softc *ahc,
-				 struct ahc_devinfo *devinfo,
-				 struct cam_path *path,
-				 struct ahc_syncrate *syncrate,
-				 u_int period, u_int offset, u_int type,
-				 int paused);
-static void	ahc_set_width(struct ahc_softc *ahc,
-			      struct ahc_devinfo *devinfo,
-			      struct cam_path *path, u_int width, u_int type,
-			      int paused);
-static void	ahc_set_tags(struct ahc_softc *ahc,
-			     struct ahc_devinfo *devinfo,
-			     int enable);
-static void	ahc_construct_sdtr(struct ahc_softc *ahc,
-				   u_int period, u_int offset);
- 
-static void	ahc_construct_wdtr(struct ahc_softc *ahc, u_int bus_width);
-
-static void	ahc_calc_residual(struct scb *scb);
-
-static void	ahc_update_pending_syncrates(struct ahc_softc *ahc);
-
-static void	ahc_set_recoveryscb(struct ahc_softc *ahc, struct scb *scb);
-
-static timeout_t
-		ahc_timeout;
-static void	ahc_queue_lstate_event(struct ahc_softc *ahc,
-				       struct tmode_lstate *lstate,
-				       u_int initiator_id, u_int event_type,
-				       u_int event_arg);
-static void	ahc_send_lstate_events(struct ahc_softc *ahc,
-				       struct tmode_lstate *lstate);
-static __inline int  sequencer_paused(struct ahc_softc *ahc);
-static __inline void pause_sequencer(struct ahc_softc *ahc);
-static __inline void unpause_sequencer(struct ahc_softc *ahc);
-static 		void restart_sequencer(struct ahc_softc *ahc);
-static __inline u_int ahc_index_busy_tcl(struct ahc_softc *ahc,
-					 u_int tcl, int unbusy);
- 
-static __inline void	 ahc_busy_tcl(struct ahc_softc *ahc, struct scb *scb);
-
-static __inline void	   ahc_freeze_ccb(union ccb* ccb);
-static __inline cam_status ahc_ccb_status(union ccb* ccb);
-static __inline void	   ahcsetccbstatus(union ccb* ccb,
-					   cam_status status);
-static void		   ahc_run_tqinfifo(struct ahc_softc *ahc, int paused);
-static void		   ahc_run_qoutfifo(struct ahc_softc *ahc);
-
-static __inline struct ahc_initiator_tinfo *
-			   ahc_fetch_transinfo(struct ahc_softc *ahc,
-					       char channel,
-					       u_int our_id, u_int target,
-					       struct tmode_tstate **tstate);
-static void	   ahcfreescb(struct ahc_softc *ahc, struct scb *scb);
-static __inline	struct scb *ahcgetscb(struct ahc_softc *ahc);
-
-static __inline u_int32_t
-ahc_hscb_busaddr(struct ahc_softc *ahc, u_int index)
-{
-	return (ahc->scb_data->hscb_busaddr
-		+ (sizeof(struct hardware_scb) * index));
-}
-
-#define AHC_BUSRESET_DELAY	25	/* Reset delay in us */
-
-static __inline int
-sequencer_paused(struct ahc_softc *ahc)
-{
-	return ((ahc_inb(ahc, HCNTRL) & PAUSE) != 0);
-}
-
-static __inline void
-pause_sequencer(struct ahc_softc *ahc)
-{
-	ahc_outb(ahc, HCNTRL, ahc->pause);
-
-	/*
-	 * Since the sequencer can disable pausing in a critical section, we
-	 * must loop until it actually stops.
-	 */
-	while (sequencer_paused(ahc) == 0)
-		;
-}
-
-static __inline void
-unpause_sequencer(struct ahc_softc *ahc)
-{
-	if ((ahc_inb(ahc, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) == 0)
-		ahc_outb(ahc, HCNTRL, ahc->unpause);
-}
-
-/*
- * Restart the sequencer program from address zero
- */
-static void
-restart_sequencer(struct ahc_softc *ahc)
-{
-	u_int i;
-
-	pause_sequencer(ahc);
-
-	/*
-	 * Everytime we restart the sequencer, there
-	 * is the possiblitity that we have restarted
-	 * within a three instruction window where an
-	 * SCB has been marked free but has not made it
-	 * onto the free list.  Since SCSI events(bus reset,
-	 * unexpected bus free) will always freeze the
-	 * sequencer, we cannot close this window.  To
-	 * avoid losing an SCB, we reconsitute the free
-	 * list every time we restart the sequencer.
-	 */
-	ahc_outb(ahc, FREE_SCBH, SCB_LIST_NULL);
-	for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
-		
-		ahc_outb(ahc, SCBPTR, i);
-		if (ahc_inb(ahc, SCB_TAG) == SCB_LIST_NULL)
-			ahc_add_curscb_to_free_list(ahc);
-	}
-	ahc_outb(ahc, SEQCTL, FASTMODE|SEQRESET);
-	unpause_sequencer(ahc);
-}
-
-static __inline u_int
-ahc_index_busy_tcl(struct ahc_softc *ahc, u_int tcl, int unbusy)
-{
-	u_int scbid;
-
-	scbid = ahc->untagged_scbs[tcl];
-	if (unbusy)
-		ahc->untagged_scbs[tcl] = SCB_LIST_NULL;
-
-	return (scbid);
-}
-
-static __inline void
-ahc_busy_tcl(struct ahc_softc *ahc, struct scb *scb)
-{
-	ahc->untagged_scbs[scb->hscb->tcl] = scb->hscb->tag;
-}
-
-static __inline void
-ahc_freeze_ccb(union ccb* ccb)
-{
-	if ((ccb->ccb_h.status & CAM_DEV_QFRZN) == 0) {
-		ccb->ccb_h.status |= CAM_DEV_QFRZN;
-		xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
-	}
-}
-
-static __inline cam_status
-ahc_ccb_status(union ccb* ccb)
-{
-	return (ccb->ccb_h.status & CAM_STATUS_MASK);
-}
-
-static __inline void
-ahcsetccbstatus(union ccb* ccb, cam_status status)
-{
-	ccb->ccb_h.status &= ~CAM_STATUS_MASK;
-	ccb->ccb_h.status |= status;
-}
-
-static __inline struct ahc_initiator_tinfo *
-ahc_fetch_transinfo(struct ahc_softc *ahc, char channel, u_int our_id,
-		    u_int remote_id, struct tmode_tstate **tstate)
-{
-	/*
-	 * Transfer data structures are stored from the perspective
-	 * of the target role.  Since the parameters for a connection
-	 * in the initiator role to a given target are the same as
-	 * when the roles are reversed, we pretend we are the target.
-	 */
-	if (channel == 'B')
-		our_id += 8;
-	*tstate = ahc->enabled_targets[our_id];
-	return (&(*tstate)->transinfo[remote_id]);
-}
-
-static void
-ahc_run_tqinfifo(struct ahc_softc *ahc, int paused)
-{
-	struct target_cmd *cmd;
-
-	while ((cmd = &ahc->targetcmds[ahc->tqinfifonext])->cmd_valid != 0) {
-
-		/*
-		 * Only advance through the queue if we
-		 * had the resources to process the command.
-		 */
-		if (ahc_handle_target_cmd(ahc, cmd) != 0)
-			break;
-
-		ahc->tqinfifonext++;
-		cmd->cmd_valid = 0;
-
-		/*
-		 * Lazily update our position in the target mode incomming
-		 * command queue as seen by the sequencer.
-		 */
-		if ((ahc->tqinfifonext & (HOST_TQINPOS - 1)) == 1) {
-			if ((ahc->features & AHC_HS_MAILBOX) != 0) {
-				u_int hs_mailbox;
-
-				hs_mailbox = ahc_inb(ahc, HS_MAILBOX);
-				hs_mailbox &= ~HOST_TQINPOS;
-				hs_mailbox |= ahc->tqinfifonext & HOST_TQINPOS;
-				ahc_outb(ahc, HS_MAILBOX, hs_mailbox);
-			} else {
-				if (!paused)
-					pause_sequencer(ahc);	
-				ahc_outb(ahc, KERNEL_TQINPOS,
-					 ahc->tqinfifonext & HOST_TQINPOS);
-				if (!paused)
-				unpause_sequencer(ahc);
-			}
-		}
-	}
-}
-
-static void
-ahc_run_qoutfifo(struct ahc_softc *ahc)
-{
-	struct scb *scb;
-	u_int  scb_index;
-
-	while (ahc->qoutfifo[ahc->qoutfifonext] != SCB_LIST_NULL) {
-		scb_index = ahc->qoutfifo[ahc->qoutfifonext];
-		ahc->qoutfifo[ahc->qoutfifonext++] = SCB_LIST_NULL;
-
-		scb = &ahc->scb_data->scbarray[scb_index];
-		if (scb_index >= ahc->scb_data->numscbs
-		  || (scb->flags & SCB_ACTIVE) == 0) {
-			printf("%s: WARNING no command for scb %d "
-			       "(cmdcmplt)\nQOUTPOS = %d\n",
-			       ahc_name(ahc), scb_index,
-			       ahc->qoutfifonext - 1);
-			continue;
-		}
-
-		/*
-		 * Save off the residual
-		 * if there is one.
-		 */
-		if (scb->hscb->residual_SG_count != 0)
-			ahc_calc_residual(scb);
-		else
-			scb->ccb->csio.resid = 0;
-		ahc_done(ahc, scb);
-	}
-}
-
-
-/*
- * An scb (and hence an scb entry on the board) is put onto the
- * free list.
- */
-static void
-ahcfreescb(struct ahc_softc *ahc, struct scb *scb)
-{       
-	struct hardware_scb *hscb;
-	int opri;
-
-	hscb = scb->hscb;
-
-	opri = splcam();
-
-	if ((ahc->flags & AHC_RESOURCE_SHORTAGE) != 0
-	 && (scb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
-		scb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
-		ahc->flags &= ~AHC_RESOURCE_SHORTAGE;
-	}
-
-	/* Clean up for the next user */
-	scb->flags = SCB_FREE;
-	hscb->control = 0;
-	hscb->status = 0;
-
-	SLIST_INSERT_HEAD(&ahc->scb_data->free_scbs, scb, links);
-	splx(opri);
-}
-
-/*
- * Get a free scb, either one already assigned to a hardware slot
- * on the adapter or one that will require an SCB to be paged out before
- * use. If there are none, see if we can allocate a new SCB.  Otherwise
- * either return an error or sleep.
- */
-static __inline struct scb *
-ahcgetscb(struct ahc_softc *ahc)
-{
-	struct scb *scbp;
-	int opri;
-
-	opri = splcam();
-	if ((scbp = SLIST_FIRST(&ahc->scb_data->free_scbs))) {
-		SLIST_REMOVE_HEAD(&ahc->scb_data->free_scbs, links);
-	} else {
-		ahcallocscbs(ahc);
-		scbp = SLIST_FIRST(&ahc->scb_data->free_scbs);
-		if (scbp != NULL)
-			SLIST_REMOVE_HEAD(&ahc->scb_data->free_scbs, links);
-	}
-
-	splx(opri);
-
-	return (scbp);
-}
-
-char *
-ahc_name(struct ahc_softc *ahc)
-{
-	static char name[10];
-
-	snprintf(name, sizeof(name), "ahc%d", ahc->unit);
-	return (name);
-}
-
-#ifdef  AHC_DEBUG
-static void
-ahc_print_scb(struct scb *scb)
-{
-	struct hardware_scb *hscb = scb->hscb;
-
-	printf("scb:%p control:0x%x tcl:0x%x cmdlen:%d cmdpointer:0x%x\n",
-		scb,
-		hscb->control,
-		hscb->tcl,
-		hscb->cmdlen,
-		hscb->cmdpointer);
-	printf("        datlen:%d data:0x%x segs:0x%x segp:0x%x\n",
-		hscb->datalen,
-		hscb->data,
-		hscb->SG_count,
-		hscb->SG_pointer);
-	printf("	sg_addr:%x sg_len:%d\n",
-		scb->sg_list[0].addr,
-		scb->sg_list[0].len);
-	printf("	cdb:%x %x %x %x %x %x %x %x %x %x %x %x\n",
-		hscb->cmdstore[0], hscb->cmdstore[1], hscb->cmdstore[2],
-		hscb->cmdstore[3], hscb->cmdstore[4], hscb->cmdstore[5],
-		hscb->cmdstore[6], hscb->cmdstore[7], hscb->cmdstore[8],
-		hscb->cmdstore[9], hscb->cmdstore[10], hscb->cmdstore[11]);
-}
-#endif
-
-static struct {
-        u_int8_t errno;
-	char *errmesg;
-} hard_error[] = {
+struct hard_error_entry hard_error[] = {
 	{ ILLHADDR,	"Illegal Host Access" },
 	{ ILLSADDR,	"Illegal Sequencer Address referrenced" },
 	{ ILLOPCODE,	"Illegal Opcode in sequencer program" },
@@ -701,15 +78,14 @@ static struct {
 	{ PCIERRSTAT,	"PCI Error detected" },
 	{ CIOPARERR,	"CIOBUS Parity Error" },
 };
-static const int num_errors = sizeof(hard_error)/sizeof(hard_error[0]);
+const u_int num_errors = NUM_ELEMENTS(hard_error);
 
-static struct {
-        u_int8_t phase;
-        u_int8_t mesg_out; /* Message response to parity errors */
-	char *phasemsg;
-} phase_table[] = {
+struct phase_table_entry phase_table[] =
+{
 	{ P_DATAOUT,	MSG_NOOP,		"in Data-out phase"	},
 	{ P_DATAIN,	MSG_INITIATOR_DET_ERR,	"in Data-in phase"	},
+	{ P_DATAOUT_DT,	MSG_NOOP,		"in DT Data-out phase"	},
+	{ P_DATAIN_DT,	MSG_INITIATOR_DET_ERR,	"in DT Data-in phase"	},
 	{ P_COMMAND,	MSG_NOOP,		"in Command phase"	},
 	{ P_MESGOUT,	MSG_NOOP,		"in Message-out phase"	},
 	{ P_STATUS,	MSG_INITIATOR_DET_ERR,	"in Status phase"	},
@@ -717,18 +93,20 @@ static struct {
 	{ P_BUSFREE,	MSG_NOOP,		"while idle"		},
 	{ 0,		MSG_NOOP,		"in unknown phase"	}
 };
-static const int num_phases = (sizeof(phase_table)/sizeof(phase_table[0])) - 1;
+
+/*
+ * In most cases we only wish to itterate over real phases, so
+ * exclude the last element from the count.
+ */
+const u_int num_phases = NUM_ELEMENTS(phase_table) - 1;
 
 /*
  * Valid SCSIRATE values.  (p. 3-17)
  * Provides a mapping of tranfer periods in ns to the proper value to
- * stick in the scsiscfr reg to use that transfer rate.
+ * stick in the scsixfer reg.
  */
-#define AHC_SYNCRATE_DT		0
-#define AHC_SYNCRATE_ULTRA2	1
-#define AHC_SYNCRATE_ULTRA	3
-#define AHC_SYNCRATE_FAST	6
-static struct ahc_syncrate ahc_syncrates[] = {
+struct ahc_syncrate ahc_syncrates[] =
+{
       /* ultra2    fast/ultra  period     rate */
 	{ 0x42,      0x000,      9,      "80.0" },
 	{ 0x03,      0x000,     10,      "40.0" },
@@ -747,1476 +125,240 @@ static struct ahc_syncrate ahc_syncrates[] = {
 	{ 0x00,      0x000,      0,      NULL   }
 };
 
-/*
- * Allocate a controller structure for a new device and initialize it.
- */
-struct ahc_softc *
-ahc_alloc(device_t dev, struct resource *regs, int regs_type, int regs_id,
-	  bus_dma_tag_t parent_dmat, ahc_chip chip, ahc_feature features,
-	  ahc_flag flags, struct scb_data *scb_data)
-{
-	/*
-	 * find unit and check we have that many defined
-	 */
-	struct  ahc_softc *ahc;
-	size_t	alloc_size;
-
-	/*
-	 * Allocate a storage area for us
-	 */
-	if (scb_data == NULL)
-		/*
-		 * We are not sharing SCB space with another controller
-		 * so allocate our own SCB data space.
-		 */
-		alloc_size = sizeof(struct full_ahc_softc);
-	else
-		alloc_size = sizeof(struct ahc_softc);
-	ahc = malloc(alloc_size, M_DEVBUF, M_NOWAIT);
-	if (!ahc) {
-		device_printf(dev, "cannot malloc softc!\n");
-		return NULL;
-	}
-	bzero(ahc, alloc_size);
-	LIST_INIT(&ahc->pending_ccbs);
-	ahc->device = dev;
-	ahc->unit = device_get_unit(dev);
-	ahc->regs_res_type = regs_type;
-	ahc->regs_res_id = regs_id;
-	ahc->regs = regs;
-	ahc->tag = rman_get_bustag(regs);
-	ahc->bsh = rman_get_bushandle(regs);
-	ahc->parent_dmat = parent_dmat;
-	ahc->chip = chip;
-	ahc->features = features;
-	ahc->flags = flags;
-	if (scb_data == NULL) {
-		struct full_ahc_softc* full_softc = (struct full_ahc_softc*)ahc;
-		ahc->scb_data = &full_softc->scb_data_storage;
-	} else
-		ahc->scb_data = scb_data;
+/* Our Sequencer Program */
+#include "aic7xxx_seq.h"
 
-	ahc->unpause = (ahc_inb(ahc, HCNTRL) & IRQMS) | INTEN;
-	/* The IRQMS bit is only valid on VL and EISA chips */
-	if ((ahc->chip & AHC_PCI) != 0)
-		ahc->unpause &= ~IRQMS;
-	ahc->pause = ahc->unpause | PAUSE;
-	return (ahc);
-}
-
-void
-ahc_free(ahc)
-	struct ahc_softc *ahc;
-{
-	ahcfiniscbdata(ahc);
-	switch (ahc->init_level) {
-	case 3:
-		bus_dmamap_unload(ahc->shared_data_dmat,
-				  ahc->shared_data_dmamap);
-	case 2:
-		bus_dmamem_free(ahc->shared_data_dmat, ahc->qoutfifo,
-				ahc->shared_data_dmamap);
-		bus_dmamap_destroy(ahc->shared_data_dmat,
-				   ahc->shared_data_dmamap);
-	case 1:
-		bus_dma_tag_destroy(ahc->buffer_dmat);
-		break;
-	}
-
-	if (ahc->regs != NULL)
-		bus_release_resource(ahc->device, ahc->regs_res_type,
-				     ahc->regs_res_id, ahc->regs);
-	if (ahc->irq != NULL)
-		bus_release_resource(ahc->device, ahc->irq_res_type,
-				     0, ahc->irq);
-
-	free(ahc, M_DEVBUF);
-	return;
-}
-
-static int
-ahcinitscbdata(struct ahc_softc *ahc)
-{
-	struct scb_data *scb_data;
-	int i;
-
-	scb_data = ahc->scb_data;
-	SLIST_INIT(&scb_data->free_scbs);
-	SLIST_INIT(&scb_data->sg_maps);
-
-	/* Allocate SCB resources */
-	scb_data->scbarray =
-	    (struct scb *)malloc(sizeof(struct scb) * AHC_SCB_MAX,
-				 M_DEVBUF, M_NOWAIT);
-	if (scb_data->scbarray == NULL)
-		return (ENOMEM);
-	bzero(scb_data->scbarray, sizeof(struct scb) * AHC_SCB_MAX);
-
-	/* Determine the number of hardware SCBs and initialize them */
-
-	scb_data->maxhscbs = ahc_probe_scbs(ahc);
-	/* SCB 0 heads the free list */
-	ahc_outb(ahc, FREE_SCBH, 0);
-	for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
-		ahc_outb(ahc, SCBPTR, i);
-
-		/* Clear the control byte. */
-		ahc_outb(ahc, SCB_CONTROL, 0);
-
-		/* Set the next pointer */
-		ahc_outb(ahc, SCB_NEXT, i+1);
-
-		/* Make the tag number invalid */
-		ahc_outb(ahc, SCB_TAG, SCB_LIST_NULL);
-	}
-
-	/* Make sure that the last SCB terminates the free list */
-	ahc_outb(ahc, SCBPTR, i-1);
-	ahc_outb(ahc, SCB_NEXT, SCB_LIST_NULL);
-
-	/* Ensure we clear the 0 SCB's control byte. */
-	ahc_outb(ahc, SCBPTR, 0);
-	ahc_outb(ahc, SCB_CONTROL, 0);
-
-	scb_data->maxhscbs = i;
-
-	if (ahc->scb_data->maxhscbs == 0)
-		panic("%s: No SCB space found", ahc_name(ahc));
-
-	/*
-	 * Create our DMA tags.  These tags define the kinds of device
-	 * accessable memory allocations and memory mappings we will
-	 * need to perform during normal operation.
-	 *
-	 * Unless we need to further restrict the allocation, we rely
-	 * on the restrictions of the parent dmat, hence the common
-	 * use of MAXADDR and MAXSIZE.
-	 */
-
-	/* DMA tag for our hardware scb structures */
-	if (bus_dma_tag_create(ahc->parent_dmat, /*alignment*/1, /*boundary*/0,
-			       /*lowaddr*/BUS_SPACE_MAXADDR,
-			       /*highaddr*/BUS_SPACE_MAXADDR,
-			       /*filter*/NULL, /*filterarg*/NULL,
-			       AHC_SCB_MAX * sizeof(struct hardware_scb),
-			       /*nsegments*/1,
-			       /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
-			       /*flags*/0, &scb_data->hscb_dmat) != 0) {
-		goto error_exit;
-	}
-
-	scb_data->init_level++;
-
-	/* Allocation for our ccbs */
-	if (bus_dmamem_alloc(scb_data->hscb_dmat, (void **)&scb_data->hscbs,
-			     BUS_DMA_NOWAIT, &scb_data->hscb_dmamap) != 0) {
-		goto error_exit;
-	}
-
-	scb_data->init_level++;
-
-	/* And permanently map them */
-	bus_dmamap_load(scb_data->hscb_dmat, scb_data->hscb_dmamap,
-			scb_data->hscbs,
-			AHC_SCB_MAX * sizeof(struct hardware_scb),
-			ahcdmamapcb, &scb_data->hscb_busaddr, /*flags*/0);
-
-	scb_data->init_level++;
-
-	/* DMA tag for our sense buffers */
-	if (bus_dma_tag_create(ahc->parent_dmat, /*alignment*/1, /*boundary*/0,
-			       /*lowaddr*/BUS_SPACE_MAXADDR,
-			       /*highaddr*/BUS_SPACE_MAXADDR,
-			       /*filter*/NULL, /*filterarg*/NULL,
-			       AHC_SCB_MAX * sizeof(struct scsi_sense_data),
-			       /*nsegments*/1,
-			       /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
-			       /*flags*/0, &scb_data->sense_dmat) != 0) {
-		goto error_exit;
-	}
-
-	scb_data->init_level++;
-
-	/* Allocate them */
-	if (bus_dmamem_alloc(scb_data->sense_dmat, (void **)&scb_data->sense,
-			     BUS_DMA_NOWAIT, &scb_data->sense_dmamap) != 0) {
-		goto error_exit;
-	}
-
-	scb_data->init_level++;
-
-	/* And permanently map them */
-	bus_dmamap_load(scb_data->sense_dmat, scb_data->sense_dmamap,
-			scb_data->sense,
-			AHC_SCB_MAX * sizeof(struct scsi_sense_data),
-			ahcdmamapcb, &scb_data->sense_busaddr, /*flags*/0);
-
-	scb_data->init_level++;
-
-	/* DMA tag for our S/G structures.  We allocate in page sized chunks */
-	if (bus_dma_tag_create(ahc->parent_dmat, /*alignment*/1, /*boundary*/0,
-			       /*lowaddr*/BUS_SPACE_MAXADDR,
-			       /*highaddr*/BUS_SPACE_MAXADDR,
-			       /*filter*/NULL, /*filterarg*/NULL,
-			       PAGE_SIZE, /*nsegments*/1,
-			       /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
-			       /*flags*/0, &scb_data->sg_dmat) != 0) {
-		goto error_exit;
-	}
-
-        scb_data->init_level++;
-
-	/* Perform initial CCB allocation */
-	bzero(scb_data->hscbs, AHC_SCB_MAX * sizeof(struct hardware_scb));
-	ahcallocscbs(ahc);
-
-	if (scb_data->numscbs == 0) {
-		printf("%s: ahc_init_scb_data - "
-		       "Unable to allocate initial scbs\n",
-		       ahc_name(ahc));
-		goto error_exit;
-	}
-
-	/*
-         * Note that we were successfull
-         */
-        return 0; 
-
-error_exit:
-
-	return ENOMEM;
-}
-
-static void
-ahcfiniscbdata(struct ahc_softc *ahc)
-{
-	struct scb_data *scb_data;
-
-	scb_data = ahc->scb_data;
+/**************************** Function Declarations ***************************/
+static struct tmode_tstate*
+			ahc_alloc_tstate(struct ahc_softc *ahc,
+					 u_int scsi_id, char channel);
+static void		ahc_free_tstate(struct ahc_softc *ahc,
+					u_int scsi_id, char channel, int force);
+static struct ahc_syncrate*
+			ahc_devlimited_syncrate(struct ahc_softc *ahc,
+						u_int *period,
+						u_int *ppr_options);
+static void		ahc_update_target_msg_request(struct ahc_softc *ahc,
+					      struct ahc_devinfo *devinfo,
+					      struct ahc_initiator_tinfo *tinfo,
+					      int force, int paused);
+static void		ahc_update_pending_syncrates(struct ahc_softc *ahc);
+static void		ahc_fetch_devinfo(struct ahc_softc *ahc,
+					  struct ahc_devinfo *devinfo);
+static void		ahc_scb_devinfo(struct ahc_softc *ahc,
+					struct ahc_devinfo *devinfo,
+					struct scb *scb);
+static void		ahc_setup_initiator_msgout(struct ahc_softc *ahc,
+						   struct ahc_devinfo *devinfo,
+						   struct scb *scb);
+static void		ahc_build_transfer_msg(struct ahc_softc *ahc,
+					       struct ahc_devinfo *devinfo);
+static void		ahc_construct_sdtr(struct ahc_softc *ahc,
+					   u_int period, u_int offset);
+static void		ahc_construct_wdtr(struct ahc_softc *ahc,
+					   u_int bus_width);
+static void		ahc_construct_ppr(struct ahc_softc *ahc,
+					  u_int period, u_int offset,
+					  u_int bus_width, u_int ppr_options);
+static void		ahc_clear_msg_state(struct ahc_softc *ahc);
+static void		ahc_handle_message_phase(struct ahc_softc *ahc);
+static int		ahc_sent_msg(struct ahc_softc *ahc,
+				     u_int msgtype, int full);
+static int		ahc_parse_msg(struct ahc_softc *ahc,
+				      struct ahc_devinfo *devinfo);
+static int		ahc_handle_msg_reject(struct ahc_softc *ahc,
+					      struct ahc_devinfo *devinfo);
+static void		ahc_handle_ign_wide_residue(struct ahc_softc *ahc,
+						struct ahc_devinfo *devinfo);
+static void		ahc_handle_devreset(struct ahc_softc *ahc,
+					    struct ahc_devinfo *devinfo,
+					    cam_status status, char *message,
+					    int verbose_level);
 
-	switch (scb_data->init_level) {
-	default:
-	case 7:
-	{
-		struct sg_map_node *sg_map;
+static bus_dmamap_callback_t	ahc_dmamap_cb; 
+static int			ahc_init_scbdata(struct ahc_softc *ahc);
+static void			ahc_fini_scbdata(struct ahc_softc *ahc);
 
-		while ((sg_map = SLIST_FIRST(&scb_data->sg_maps))!= NULL) {
-			SLIST_REMOVE_HEAD(&scb_data->sg_maps, links);
-			bus_dmamap_unload(scb_data->sg_dmat,
-					  sg_map->sg_dmamap);
-			bus_dmamem_free(scb_data->sg_dmat, sg_map->sg_vaddr,
-					sg_map->sg_dmamap);
-			free(sg_map, M_DEVBUF);
-		}
-		bus_dma_tag_destroy(scb_data->sg_dmat);
-	}
-	case 6:
-		bus_dmamap_unload(scb_data->sense_dmat,
-				  scb_data->sense_dmamap);
-	case 5:
-		bus_dmamem_free(scb_data->sense_dmat, scb_data->sense,
-				scb_data->sense_dmamap);
-		bus_dmamap_destroy(scb_data->sense_dmat,
-				   scb_data->sense_dmamap);
-	case 4:
-		bus_dma_tag_destroy(scb_data->sense_dmat);
-	case 3:
-		bus_dmamap_unload(scb_data->hscb_dmat, scb_data->hscb_dmamap);
-	case 2:
-		bus_dmamem_free(scb_data->hscb_dmat, scb_data->hscbs,
-				scb_data->hscb_dmamap);
-		bus_dmamap_destroy(scb_data->hscb_dmat, scb_data->hscb_dmamap);
-	case 1:
-		bus_dma_tag_destroy(scb_data->hscb_dmat);
-		break;
-	}
-	if (scb_data->scbarray != NULL)
-		free(scb_data->scbarray, M_DEVBUF);
-}
+static void		ahc_busy_tcl(struct ahc_softc *ahc,
+				     u_int tcl, u_int busyid);
+static int		ahc_match_scb(struct ahc_softc *ahc, struct scb *scb,
+				      int target, char channel, int lun,
+				      u_int tag, role_t role);
 
-static void
-ahcdmamapcb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 
-{
-	bus_addr_t *baddr;
-
-	baddr = (bus_addr_t *)arg;
-	*baddr = segs->ds_addr;
-}
-
-int
-ahc_reset(struct ahc_softc *ahc)
-{
-	u_int	sblkctl;
-	int	wait;
-	
+static u_int		ahc_rem_scb_from_disc_list(struct ahc_softc *ahc,
+						   u_int prev, u_int scbptr);
+static void		ahc_add_curscb_to_free_list(struct ahc_softc *ahc);
+static u_int		ahc_rem_wscb(struct ahc_softc *ahc,
+				     u_int scbpos, u_int prev);
+static int		ahc_abort_scbs(struct ahc_softc *ahc, int target,
+				       char channel, int lun, u_int tag,
+				       role_t role, uint32_t status);
+static void		ahc_reset_current_bus(struct ahc_softc *ahc);
+static void		ahc_calc_residual(struct scb *scb);
 #ifdef AHC_DUMP_SEQ
-	if (ahc->init_level == 0)
-		ahc_dumpseq(ahc);
+static void		ahc_dumpseq(struct ahc_softc *ahc);
 #endif
-	ahc_outb(ahc, HCNTRL, CHIPRST | ahc->pause);
-	/*
-	 * Ensure that the reset has finished
-	 */
-	wait = 1000;
-	do {
-		DELAY(1000);
-	} while (--wait && !(ahc_inb(ahc, HCNTRL) & CHIPRSTACK));
-
-	if (wait == 0) {
-		printf("%s: WARNING - Failed chip reset!  "
-		       "Trying to initialize anyway.\n", ahc_name(ahc));
-	}
-	ahc_outb(ahc, HCNTRL, ahc->pause);
-
-	/* Determine channel configuration */
-	sblkctl = ahc_inb(ahc, SBLKCTL) & (SELBUSB|SELWIDE);
-	/* No Twin Channel PCI cards */
-	if ((ahc->chip & AHC_PCI) != 0)
-		sblkctl &= ~SELBUSB;
-	switch (sblkctl) {
-	case 0:
-		/* Single Narrow Channel */
-		break;
-	case 2:
-		/* Wide Channel */
-		ahc->features |= AHC_WIDE;
-		break;
-	case 8:
-		/* Twin Channel */
-		ahc->features |= AHC_TWIN;
-		break;
-	default:
-		printf(" Unsupported adapter type.  Ignoring\n");
-		return(-1);
-	}
-
-	return (0);
-}
-
-/*
- * Called when we have an active connection to a target on the bus,
- * this function finds the nearest syncrate to the input period limited
- * by the capabilities of the bus connectivity of the target.
- */
-static struct ahc_syncrate *
-ahc_devlimited_syncrate(struct ahc_softc *ahc, u_int *period) {
-	u_int	maxsync;
-
-	if ((ahc->features & AHC_ULTRA2) != 0) {
-		if ((ahc_inb(ahc, SBLKCTL) & ENAB40) != 0
-		 && (ahc_inb(ahc, SSTAT2) & EXP_ACTIVE) == 0) {
-			maxsync = AHC_SYNCRATE_ULTRA2;
-		} else {
-			maxsync = AHC_SYNCRATE_ULTRA;
-		}
-	} else if ((ahc->features & AHC_ULTRA) != 0) {
-		maxsync = AHC_SYNCRATE_ULTRA;
-	} else {
-		maxsync = AHC_SYNCRATE_FAST;
-	}
-	return (ahc_find_syncrate(ahc, period, maxsync));
-}
-
-/*
- * Look up the valid period to SCSIRATE conversion in our table.
- * Return the period and offset that should be sent to the target
- * if this was the beginning of an SDTR.
- */
-static struct ahc_syncrate *
-ahc_find_syncrate(struct ahc_softc *ahc, u_int *period, u_int maxsync)
-{
-	struct ahc_syncrate *syncrate;
-
-	syncrate = &ahc_syncrates[maxsync];
-	while ((syncrate->rate != NULL)
-	    && ((ahc->features & AHC_ULTRA2) == 0
-	     || (syncrate->sxfr_u2 != 0))) {
-
-		if (*period <= syncrate->period) {
-			/*
-			 * When responding to a target that requests
-			 * sync, the requested rate may fall between
-			 * two rates that we can output, but still be
-			 * a rate that we can receive.  Because of this,
-			 * we want to respond to the target with
-			 * the same rate that it sent to us even
-			 * if the period we use to send data to it
-			 * is lower.  Only lower the response period
-			 * if we must.
-			 */
-			if (syncrate == &ahc_syncrates[maxsync])
-				*period = syncrate->period;
-			break;
-		}
-		syncrate++;
-	}
-
-	if ((*period == 0)
-	 || (syncrate->rate == NULL)
-	 || ((ahc->features & AHC_ULTRA2) != 0
-	  && (syncrate->sxfr_u2 == 0))) {
-		/* Use asynchronous transfers. */
-		*period = 0;
-		syncrate = NULL;
-	}
-	return (syncrate);
-}
-
-static u_int
-ahc_find_period(struct ahc_softc *ahc, u_int scsirate, u_int maxsync)
-{
-	struct ahc_syncrate *syncrate;
-
-	if ((ahc->features & AHC_ULTRA2) != 0)
-		scsirate &= SXFR_ULTRA2;
-	else
-		scsirate &= SXFR;
-
-	syncrate = &ahc_syncrates[maxsync];
-	while (syncrate->rate != NULL) {
-
-		if ((ahc->features & AHC_ULTRA2) != 0) {
-			if (syncrate->sxfr_u2 == 0)
-				break;
-			else if (scsirate == (syncrate->sxfr_u2 & SXFR_ULTRA2))
-				return (syncrate->period);
-		} else if (scsirate == (syncrate->sxfr & SXFR)) {
-				return (syncrate->period);
-		}
-		syncrate++;
-	}
-	return (0); /* async */
-}
-
-static void
-ahc_validate_offset(struct ahc_softc *ahc, struct ahc_syncrate *syncrate,
-		    u_int *offset, int wide)
-{
-	u_int maxoffset;
-
-	/* Limit offset to what we can do */
-	if (syncrate == NULL) {
-		maxoffset = 0;
-	} else if ((ahc->features & AHC_ULTRA2) != 0) {
-		maxoffset = MAX_OFFSET_ULTRA2;
-	} else {
-		if (wide)
-			maxoffset = MAX_OFFSET_16BIT;
-		else
-			maxoffset = MAX_OFFSET_8BIT;
-	}
-	*offset = MIN(*offset, maxoffset);
-}
-
-static void
-ahc_update_target_msg_request(struct ahc_softc *ahc,
-			      struct ahc_devinfo *devinfo,
-			      struct ahc_initiator_tinfo *tinfo,
-			      int force, int paused)
-{
-	u_int targ_msg_req_orig;
-
-	targ_msg_req_orig = ahc->targ_msg_req;
-	if (tinfo->current.period != tinfo->goal.period
-	 || tinfo->current.width != tinfo->goal.width
-	 || tinfo->current.offset != tinfo->goal.offset
-	 || (force
-	  && (tinfo->goal.period != 0
-	   || tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT)))
-		ahc->targ_msg_req |= devinfo->target_mask;
-	else
-		ahc->targ_msg_req &= ~devinfo->target_mask;
-
-	if (ahc->targ_msg_req != targ_msg_req_orig) {
-		/* Update the message request bit for this target */
-		if ((ahc->features & AHC_HS_MAILBOX) != 0) {
-			if (paused) {
-				ahc_outb(ahc, TARGET_MSG_REQUEST,
-					 ahc->targ_msg_req & 0xFF);
-				ahc_outb(ahc, TARGET_MSG_REQUEST + 1,
-					 (ahc->targ_msg_req >> 8) & 0xFF);
-			} else {
-				ahc_outb(ahc, HS_MAILBOX,
-					 0x01 << HOST_MAILBOX_SHIFT);
-			}
-		} else {
-			if (!paused)
-				pause_sequencer(ahc);
-
-			ahc_outb(ahc, TARGET_MSG_REQUEST,
-				 ahc->targ_msg_req & 0xFF);
-			ahc_outb(ahc, TARGET_MSG_REQUEST + 1,
-				 (ahc->targ_msg_req >> 8) & 0xFF);
-
-			if (!paused)
-				unpause_sequencer(ahc);
-		}
-	}
-}
-
-static int
-ahc_create_path(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
-		     struct cam_path **path)
-{
-	path_id_t path_id;
-
-	if (devinfo->channel == 'B')
-		path_id = cam_sim_path(ahc->sim_b);
-	else 
-		path_id = cam_sim_path(ahc->sim);
-
-	return (xpt_create_path(path, /*periph*/NULL,
-				path_id, devinfo->target,
-				devinfo->lun));
-}
-
-static void
-ahc_set_syncrate(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
-		 struct cam_path *path, struct ahc_syncrate *syncrate,
-		 u_int period, u_int offset, u_int type, int paused)
-{
-	struct	ahc_initiator_tinfo *tinfo;
-	struct	tmode_tstate *tstate;
-	u_int	old_period;
-	u_int	old_offset;
-	int	active = (type & AHC_TRANS_ACTIVE) == AHC_TRANS_ACTIVE;
-
-	if (syncrate == NULL) {
-		period = 0;
-		offset = 0;
-	}
-
-	tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
-				    devinfo->target, &tstate);
-	old_period = tinfo->current.period;
-	old_offset = tinfo->current.offset;
-
-	if ((type & AHC_TRANS_CUR) != 0
-	 && (old_period != period || old_offset != offset)) {
-		struct	cam_path *path2;
-		u_int	scsirate;
-
-		scsirate = tinfo->scsirate;
-		if ((ahc->features & AHC_ULTRA2) != 0) {
-
-			/* XXX */
-			/* Force single edge until DT is fully implemented */
-			scsirate &= ~(SXFR_ULTRA2|SINGLE_EDGE|ENABLE_CRC);
-			if (syncrate != NULL)
-				scsirate |= syncrate->sxfr_u2|SINGLE_EDGE;
-
-			if (active)
-				ahc_outb(ahc, SCSIOFFSET, offset);
-		} else {
-
-			scsirate &= ~(SXFR|SOFS);
-			/*
-			 * Ensure Ultra mode is set properly for
-			 * this target.
-			 */
-			tstate->ultraenb &= ~devinfo->target_mask;
-			if (syncrate != NULL) {
-				if (syncrate->sxfr & ULTRA_SXFR) {
-					tstate->ultraenb |=
-						devinfo->target_mask;
-				}
-				scsirate |= syncrate->sxfr & SXFR;
-				scsirate |= offset & SOFS;
-			}
-			if (active) {
-				u_int sxfrctl0;
-
-				sxfrctl0 = ahc_inb(ahc, SXFRCTL0);
-				sxfrctl0 &= ~FAST20;
-				if (tstate->ultraenb & devinfo->target_mask)
-					sxfrctl0 |= FAST20;
-				ahc_outb(ahc, SXFRCTL0, sxfrctl0);
-			}
-		}
-		if (active)
-			ahc_outb(ahc, SCSIRATE, scsirate);
-
-		tinfo->scsirate = scsirate;
-		tinfo->current.period = period;
-		tinfo->current.offset = offset;
-
-		/* Update the syncrates in any pending scbs */
-		ahc_update_pending_syncrates(ahc);
-
-		/*
-		 * If possible, tell the SCSI layer about the
-		 * new transfer parameters.
-		 */
-		/* If possible, update the XPT's notion of our transfer rate */
-		path2 = NULL;
-		if (path == NULL) {
-			int error;
-
-			error = ahc_create_path(ahc, devinfo, &path2);
-			if (error == CAM_REQ_CMP)
-				path = path2;
-			else
-				path2 = NULL;
-		}
-
-		if (path != NULL) {
-			struct	ccb_trans_settings neg;
-
-			neg.sync_period = period;
-			neg.sync_offset = offset;
-			neg.valid = CCB_TRANS_SYNC_RATE_VALID
-				  | CCB_TRANS_SYNC_OFFSET_VALID;
-			xpt_setup_ccb(&neg.ccb_h, path, /*priority*/1);
-			xpt_async(AC_TRANSFER_NEG, path, &neg);
-		}
-
-		if (path2 != NULL)
-			xpt_free_path(path2);
-
-		if (bootverbose) {
-			if (offset != 0) {
-				printf("%s: target %d synchronous at %sMHz, "
-				       "offset = 0x%x\n", ahc_name(ahc),
-				       devinfo->target, syncrate->rate, offset);
-			} else {
-				printf("%s: target %d using "
-				       "asynchronous transfers\n",
-				       ahc_name(ahc), devinfo->target);
-			}
-		}
-	}
-
-	if ((type & AHC_TRANS_GOAL) != 0) {
-		tinfo->goal.period = period;
-		tinfo->goal.offset = offset;
-	}
-
-	if ((type & AHC_TRANS_USER) != 0) {
-		tinfo->user.period = period;
-		tinfo->user.offset = offset;
-	}
-
-	ahc_update_target_msg_request(ahc, devinfo, tinfo,
-				      /*force*/FALSE,
-				      paused);
-}
-
-static void
-ahc_set_width(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
-	      struct cam_path *path, u_int width, u_int type, int paused)
-{
-	struct ahc_initiator_tinfo *tinfo;
-	struct tmode_tstate *tstate;
-	u_int  oldwidth;
-	int    active = (type & AHC_TRANS_ACTIVE) == AHC_TRANS_ACTIVE;
-
-	tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
-				    devinfo->target, &tstate);
-	oldwidth = tinfo->current.width;
-
-	if ((type & AHC_TRANS_CUR) != 0 && oldwidth != width) {
-		struct  cam_path *path2;
-		u_int	scsirate;
-
-		scsirate =  tinfo->scsirate;
-		scsirate &= ~WIDEXFER;
-		if (width == MSG_EXT_WDTR_BUS_16_BIT)
-			scsirate |= WIDEXFER;
-
-		tinfo->scsirate = scsirate;
-
-		if (active)
-			ahc_outb(ahc, SCSIRATE, scsirate);
-
-		tinfo->current.width = width;
-
-		/* If possible, update the XPT's notion of our transfer rate */
-		path2 = NULL;
-		if (path == NULL) {
-			int error;
-
-			error = ahc_create_path(ahc, devinfo, &path2);
-			if (error == CAM_REQ_CMP)
-				path = path2;
-			else
-				path2 = NULL;
-		}
-
-		if (path != NULL) {
-			struct	ccb_trans_settings neg;
-
-			neg.bus_width = width;
-			neg.valid = CCB_TRANS_BUS_WIDTH_VALID;
-			xpt_setup_ccb(&neg.ccb_h, path, /*priority*/1);
-			xpt_async(AC_TRANSFER_NEG, path, &neg);
-		}
-
-		if (path2 != NULL)
-			xpt_free_path(path2);
-
-		if (bootverbose) {
-			printf("%s: target %d using %dbit transfers\n",
-			       ahc_name(ahc), devinfo->target,
-			       8 * (0x01 << width));
-		}
-	}
-	if ((type & AHC_TRANS_GOAL) != 0)
-		tinfo->goal.width = width;
-	if ((type & AHC_TRANS_USER) != 0)
-		tinfo->user.width = width;
-
-	ahc_update_target_msg_request(ahc, devinfo, tinfo,
-				      /*force*/FALSE, paused);
-}
-
-static void
-ahc_set_tags(struct ahc_softc *ahc, struct ahc_devinfo *devinfo, int enable)
-{
-	struct ahc_initiator_tinfo *tinfo;
-	struct tmode_tstate *tstate;
-
-	tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
-				    devinfo->target, &tstate);
-
-	if (enable)
-		tstate->tagenable |= devinfo->target_mask;
-	else
-		tstate->tagenable &= ~devinfo->target_mask;
-}
-
+static void		ahc_loadseq(struct ahc_softc *ahc);
+static int		ahc_check_patch(struct ahc_softc *ahc,
+					struct patch **start_patch,
+					u_int start_instr, u_int *skip_addr);
+static void		ahc_download_instr(struct ahc_softc *ahc,
+					   u_int instrptr, uint8_t *dconsts);
+#ifdef AHC_TARGET_MODE
+static void		ahc_queue_lstate_event(struct ahc_softc *ahc,
+					       struct tmode_lstate *lstate,
+					       u_int initiator_id,
+					       u_int event_type,
+					       u_int event_arg);
+static void		ahc_update_scsiid(struct ahc_softc *ahc,
+					  u_int targid_mask);
+static int		ahc_handle_target_cmd(struct ahc_softc *ahc,
+					      struct target_cmd *cmd);
+#endif
+/************************* Sequencer Execution Control ************************/
 /*
- * Attach all the sub-devices we can find
+ * Restart the sequencer program from address zero
  */
-int
-ahc_attach(struct ahc_softc *ahc)
+void
+restart_sequencer(struct ahc_softc *ahc)
 {
-	struct ccb_setasync csa;
-	struct cam_devq *devq;
-	int bus_id;
-	int bus_id2;
-	struct cam_sim *sim;
-	struct cam_sim *sim2;
-	struct cam_path *path;
-	struct cam_path *path2;
-	int count;
-	int s;
-	int error;
-
-	count = 0;
-	sim = NULL;
-	sim2 = NULL;
-
-	s = splcam();
-	/* Hook up our interrupt handler */
-	if ((error = bus_setup_intr(ahc->device, ahc->irq, INTR_TYPE_CAM,
-				    ahc_intr, ahc, &ahc->ih)) != 0) {
-		device_printf(ahc->device, "bus_setup_intr() failed: %d\n",
-			      error);
-		goto fail;
-	}
-
-	/*
-	 * Attach secondary channel first if the user has
-	 * declared it the primary channel.
-	 */
-	if ((ahc->flags & AHC_CHANNEL_B_PRIMARY) != 0) {
-		bus_id = 1;
-		bus_id2 = 0;
-	} else {
-		bus_id = 0;
-		bus_id2 = 1;
-	}
+	u_int i;
 
-	/*
-	 * Create the device queue for our SIM(s).
-	 */
-	devq = cam_simq_alloc(AHC_SCB_MAX);
-	if (devq == NULL)
-		goto fail;
+	pause_sequencer(ahc);
 
+	/* XXX Use critical code sections.... */
 	/*
-	 * Construct our first channel SIM entry
+	 * Everytime we restart the sequencer, there
+	 * is the possiblitity that we have restarted
+	 * within a three instruction window where an
+	 * SCB has been marked free but has not made it
+	 * onto the free list.  Since SCSI events(bus reset,
+	 * unexpected bus free) will always freeze the
+	 * sequencer, we cannot close this window.  To
+	 * avoid losing an SCB, we reconsitute the free
+	 * list every time we restart the sequencer.
 	 */
-	sim = cam_sim_alloc(ahc_action, ahc_poll, "ahc", ahc, ahc->unit,
-			    1, AHC_SCB_MAX, devq);
-	if (sim == NULL) {
-		cam_simq_free(devq);
-		goto fail;
-	}
-
-	if (xpt_bus_register(sim, bus_id) != CAM_SUCCESS) {
-		cam_sim_free(sim, /*free_devq*/TRUE);
-		sim = NULL;
-		goto fail;
-	}
-	
-	if (xpt_create_path(&path, /*periph*/NULL,
-			    cam_sim_path(sim), CAM_TARGET_WILDCARD,
-			    CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
-		xpt_bus_deregister(cam_sim_path(sim));
-		cam_sim_free(sim, /*free_devq*/TRUE);
-		sim = NULL;
-		goto fail;
-	}
-		
-	xpt_setup_ccb(&csa.ccb_h, path, /*priority*/5);
-	csa.ccb_h.func_code = XPT_SASYNC_CB;
-	csa.event_enable = AC_LOST_DEVICE;
-	csa.callback = ahc_async;
-	csa.callback_arg = sim;
-	xpt_action((union ccb *)&csa);
-	count++;
-
-	if (ahc->features & AHC_TWIN) {
-		sim2 = cam_sim_alloc(ahc_action, ahc_poll, "ahc",
-				    ahc, ahc->unit, 1,
-				    AHC_SCB_MAX, devq);
-
-		if (sim2 == NULL) {
-			printf("ahc_attach: Unable to attach second "
-			       "bus due to resource shortage");
-			goto fail;
-		}
+	ahc_outb(ahc, FREE_SCBH, SCB_LIST_NULL);
+	for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
 		
-		if (xpt_bus_register(sim2, bus_id2) != CAM_SUCCESS) {
-			printf("ahc_attach: Unable to attach second "
-			       "bus due to resource shortage");
-			/*
-			 * We do not want to destroy the device queue
-			 * because the first bus is using it.
-			 */
-			cam_sim_free(sim2, /*free_devq*/FALSE);
-			goto fail;
-		}
-
-		if (xpt_create_path(&path2, /*periph*/NULL,
-				    cam_sim_path(sim2),
-				    CAM_TARGET_WILDCARD,
-				    CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
-			xpt_bus_deregister(cam_sim_path(sim2));
-			cam_sim_free(sim2, /*free_devq*/FALSE);
-			sim2 = NULL;
-			goto fail;
+		ahc_outb(ahc, SCBPTR, i);
+		if (ahc_inb(ahc, SCB_TAG) == SCB_LIST_NULL) {
+			ahc_add_curscb_to_free_list(ahc);
 		}
-		xpt_setup_ccb(&csa.ccb_h, path2, /*priority*/5);
-		csa.ccb_h.func_code = XPT_SASYNC_CB;
-		csa.event_enable = AC_LOST_DEVICE;
-		csa.callback = ahc_async;
-		csa.callback_arg = sim2;
-		xpt_action((union ccb *)&csa);
-		count++;
 	}
-
-fail:
-	if ((ahc->flags & AHC_CHANNEL_B_PRIMARY) != 0) {
-		ahc->sim_b = sim;
-		ahc->path_b = path;
-		ahc->sim = sim2;
-		ahc->path = path2;
-	} else {
-		ahc->sim = sim;
-		ahc->path = path;
-		ahc->sim_b = sim2;
-		ahc->path_b = path2;
-	}
-	splx(s);
-	return (count);
-}
-
-#if UNUSED
-static void
-ahc_scb_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
-		struct scb *scb)
-{
-	role_t	role;
-	int	our_id;
-
-	if (scb->ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
-		our_id = scb->ccb->ccb_h.target_id;
-		role = ROLE_TARGET;
-	} else {
-		our_id = SCB_CHANNEL(scb) == 'B' ? ahc->our_id_b : ahc->our_id;
-		role = ROLE_INITIATOR;
+	ahc_outb(ahc, SCSISIGO, 0);		/* De-assert BSY */
+	ahc_outb(ahc, MSG_OUT, MSG_NOOP);	/* No message to send */
+	ahc_outb(ahc, SXFRCTL1, ahc_inb(ahc, SXFRCTL1) & ~BITBUCKET);
+	/* Always allow reselection */
+	ahc_outb(ahc, SCSISEQ,
+		 ahc_inb(ahc, SCSISEQ_TEMPLATE) & (ENSELI|ENRSELI|ENAUTOATNP));
+	if ((ahc->features & AHC_CMD_CHAN) != 0) {
+		/* Ensure that no DMA operations are in progress */
+		ahc_outb(ahc, CCSGCTL, 0);
+		ahc_outb(ahc, CCSCBCTL, 0);
 	}
-	ahc_compile_devinfo(devinfo, our_id, SCB_TARGET(scb),
-			    SCB_LUN(scb), SCB_CHANNEL(scb), role);
-}
-#endif
-
-static void
-ahc_fetch_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
-{
-	u_int	saved_tcl;
-	role_t	role;
-	int	our_id;
-
-	if (ahc_inb(ahc, SSTAT0) & TARGET)
-		role = ROLE_TARGET;
-	else
-		role = ROLE_INITIATOR;
-
-	if (role == ROLE_TARGET
-	 && (ahc->features & AHC_MULTI_TID) != 0
-	 && (ahc_inb(ahc, SEQ_FLAGS) & CMDPHASE_PENDING) != 0) {
-		/* We were selected, so pull our id from TARGIDIN */
-		our_id = ahc_inb(ahc, TARGIDIN) & OID;
-	} else if ((ahc->features & AHC_ULTRA2) != 0)
-		our_id = ahc_inb(ahc, SCSIID_ULTRA2) & OID;
-	else
-		our_id = ahc_inb(ahc, SCSIID) & OID;
-
-	saved_tcl = ahc_inb(ahc, SAVED_TCL);
-	ahc_compile_devinfo(devinfo, our_id, TCL_TARGET(saved_tcl),
-			    TCL_LUN(saved_tcl), TCL_CHANNEL(ahc, saved_tcl),
-			    role);
-}
-
-static void
-ahc_compile_devinfo(struct ahc_devinfo *devinfo, u_int our_id, u_int target,
-		    u_int lun, char channel, role_t role)
-{
-	devinfo->our_scsiid = our_id;
-	devinfo->target = target;
-	devinfo->lun = lun;
-	devinfo->target_offset = target;
-	devinfo->channel = channel;
-	devinfo->role = role;
-	if (channel == 'B')
-		devinfo->target_offset += 8;
-	devinfo->target_mask = (0x01 << devinfo->target_offset);
+	ahc_outb(ahc, MWI_RESIDUAL, 0);
+	ahc_outb(ahc, SEQCTL, FASTMODE|SEQRESET);
+	unpause_sequencer(ahc);
 }
 
-/*
- * Catch an interrupt from the adapter
- */
+/************************* Input/Output Queues ********************************/
 void
-ahc_intr(void *arg)
+ahc_run_qoutfifo(struct ahc_softc *ahc)
 {
-	struct	ahc_softc *ahc;
-	u_int	intstat;
+	struct scb *scb;
+	u_int  scb_index;
 
-	ahc = (struct ahc_softc *)arg; 
+	while (ahc->qoutfifo[ahc->qoutfifonext] != SCB_LIST_NULL) {
 
-	intstat = ahc_inb(ahc, INTSTAT);
+		scb_index = ahc->qoutfifo[ahc->qoutfifonext];
+		if ((ahc->qoutfifonext & 0x03) == 0x03) {
+			u_int modnext;
 
-	/*
-	 * Any interrupts to process?
-	 */
-#if NPCI > 0
-	if ((intstat & INT_PEND) == 0) {
-		if ((ahc->chip & AHC_PCI) != 0
-		 && (ahc->unsolicited_ints > 500)) {
-			if ((ahc_inb(ahc, ERROR) & PCIERRSTAT) != 0)
-				ahc_pci_intr(ahc);
-			ahc->unsolicited_ints = 0;
-		} else {
-			ahc->unsolicited_ints++;
+			/*
+			 * Clear 32bits of QOUTFIFO at a time
+			 * so that we don't clobber an incomming
+			 * byte DMA to the array on architectures
+			 * that only support 32bit load and store
+			 * operations.
+			 */
+			modnext = ahc->qoutfifonext & ~0x3;
+			*((uint32_t *)(&ahc->qoutfifo[modnext])) = 0xFFFFFFFFUL;
 		}
-		return;
-	} else {
-		ahc->unsolicited_ints = 0;
-	}
-#else
-	if ((intstat & INT_PEND) == 0)
-		return;
-#endif
+		ahc->qoutfifonext++;
 
-	if (intstat & CMDCMPLT) {
-		ahc_outb(ahc, CLRINT, CLRCMDINT);
-		ahc_run_qoutfifo(ahc);
-		if ((ahc->flags & AHC_TARGETMODE) != 0) {
-			ahc_run_tqinfifo(ahc, /*paused*/FALSE);
+		scb = &ahc->scb_data->scbarray[scb_index];
+		if (scb_index >= ahc->scb_data->numscbs
+		  || (scb->flags & SCB_ACTIVE) == 0) {
+			printf("%s: WARNING no command for scb %d "
+			       "(cmdcmplt)\nQOUTPOS = %d\n",
+			       ahc_name(ahc), scb_index,
+			       ahc->qoutfifonext - 1);
+			continue;
 		}
-	}
-	if (intstat & BRKADRINT) {
+
 		/*
-		 * We upset the sequencer :-(
-		 * Lookup the error message
+		 * Save off the residual
+		 * if there is one.
 		 */
-		int i, error, num_errors;
-
-		error = ahc_inb(ahc, ERROR);
-		num_errors =  sizeof(hard_error)/sizeof(hard_error[0]);
-		for (i = 0; error != 1 && i < num_errors; i++)
-			error >>= 1;
-		panic("%s: brkadrint, %s at seqaddr = 0x%x\n",
-		      ahc_name(ahc), hard_error[i].errmesg,
-		      ahc_inb(ahc, SEQADDR0) |
-		      (ahc_inb(ahc, SEQADDR1) << 8));
-
-		/* Tell everyone that this HBA is no longer availible */
-		ahc_abort_scbs(ahc, CAM_TARGET_WILDCARD, ALL_CHANNELS,
-			       CAM_LUN_WILDCARD, SCB_LIST_NULL, ROLE_UNKNOWN,
-			       CAM_NO_HBA);
+		if (ahc_check_residual(scb) != 0)
+			ahc_calc_residual(scb);
+		else
+			ahc_set_residual(scb, 0);
+		ahc_done(ahc, scb);
 	}
-	if (intstat & SEQINT)
-		ahc_handle_seqint(ahc, intstat);
-
-	if (intstat & SCSIINT)
-		ahc_handle_scsiint(ahc, intstat);
 }
 
-static struct tmode_tstate *
-ahc_alloc_tstate(struct ahc_softc *ahc, u_int scsi_id, char channel)
+void
+ahc_run_untagged_queues(struct ahc_softc *ahc)
 {
-	struct tmode_tstate *master_tstate;
-	struct tmode_tstate *tstate;
-	int i, s;
-
-	master_tstate = ahc->enabled_targets[ahc->our_id];
-	if (channel == 'B') {
-		scsi_id += 8;
-		master_tstate = ahc->enabled_targets[ahc->our_id_b + 8];
-	}
-	if (ahc->enabled_targets[scsi_id] != NULL
-	 && ahc->enabled_targets[scsi_id] != master_tstate)
-		panic("%s: ahc_alloc_tstate - Target already allocated",
-		      ahc_name(ahc));
-	tstate = malloc(sizeof(*tstate), M_DEVBUF, M_NOWAIT);
-	if (tstate == NULL)
-		return (NULL);
+	int i;
 
-	/*
-	 * If we have allocated a master tstate, copy user settings from
-	 * the master tstate (taken from SRAM or the EEPROM) for this
-	 * channel, but reset our current and goal settings to async/narrow
-	 * until an initiator talks to us.
-	 */
-	if (master_tstate != NULL) {
-		bcopy(master_tstate, tstate, sizeof(*tstate));
-		bzero(tstate->enabled_luns, sizeof(tstate->enabled_luns));
-		tstate->ultraenb = 0;
-		for (i = 0; i < 16; i++) {
-			bzero(&tstate->transinfo[i].current,
-			      sizeof(tstate->transinfo[i].current));
-			bzero(&tstate->transinfo[i].goal,
-			      sizeof(tstate->transinfo[i].goal));
-		}
-	} else
-		bzero(tstate, sizeof(*tstate));
-	s = splcam();
-	ahc->enabled_targets[scsi_id] = tstate;
-	splx(s);
-	return (tstate);
+	for (i = 0; i < 16; i++)
+		ahc_run_untagged_queue(ahc, &ahc->untagged_queues[i]);
 }
 
-static void
-ahc_free_tstate(struct ahc_softc *ahc, u_int scsi_id, char channel, int force)
+void
+ahc_run_untagged_queue(struct ahc_softc *ahc, struct scb_tailq *queue)
 {
-	struct tmode_tstate *tstate;
+	struct scb *scb;
 
-	/* Don't clean up the entry for our initiator role */
-	if ((ahc->flags & AHC_INITIATORMODE) != 0
-	 && ((channel == 'B' && scsi_id == ahc->our_id_b)
-	  || (channel == 'A' && scsi_id == ahc->our_id))
-	 && force == FALSE)
+	if (ahc->untagged_queue_lock != 0)
 		return;
 
-	if (channel == 'B')
-		scsi_id += 8;
-	tstate = ahc->enabled_targets[scsi_id];
-	if (tstate != NULL)
-		free(tstate, M_DEVBUF);
-	ahc->enabled_targets[scsi_id] = NULL;
-}
-
-static void
-ahc_handle_en_lun(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb)
-{
-	struct	   tmode_tstate *tstate;
-	struct	   tmode_lstate *lstate;
-	struct	   ccb_en_lun *cel;
-	cam_status status;
-	int	   target;
-	int	   lun;
-	u_int	   target_mask;
-	char	   channel;
-	int	   s;
-
-	status = ahc_find_tmode_devs(ahc, sim, ccb, &tstate, &lstate,
-				     /* notfound_failure*/FALSE);
-
-	if (status != CAM_REQ_CMP) {
-		ccb->ccb_h.status = status;
-		return;
-	}
-			
-	cel = &ccb->cel;
-	target = ccb->ccb_h.target_id;
-	lun = ccb->ccb_h.target_lun;
-	channel = SIM_CHANNEL(ahc, sim);
-	target_mask = 0x01 << target;
-	if (channel == 'B')
-		target_mask <<= 8;
-
-	if (cel->enable != 0) {
-		u_int scsiseq;
-
-		/* Are we already enabled?? */
-		if (lstate != NULL) {
-			xpt_print_path(ccb->ccb_h.path);
-			printf("Lun already enabled\n");
-			ccb->ccb_h.status = CAM_LUN_ALRDY_ENA;
-			return;
-		}
-
-		if (cel->grp6_len != 0
-		 || cel->grp7_len != 0) {
-			/*
-			 * Don't (yet?) support vendor
-			 * specific commands.
-			 */
-			ccb->ccb_h.status = CAM_REQ_INVALID;
-			printf("Non-zero Group Codes\n");
-			return;
-		}
-
-		/*
-		 * Seems to be okay.
-		 * Setup our data structures.
-		 */
-		if (target != CAM_TARGET_WILDCARD && tstate == NULL) {
-			tstate = ahc_alloc_tstate(ahc, target, channel);
-			if (tstate == NULL) {
-				xpt_print_path(ccb->ccb_h.path);
-				printf("Couldn't allocate tstate\n");
-				ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
-				return;
-			}
-		}
-		lstate = malloc(sizeof(*lstate), M_DEVBUF, M_NOWAIT);
-		if (lstate == NULL) {
-			xpt_print_path(ccb->ccb_h.path);
-			printf("Couldn't allocate lstate\n");
-			ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
-			return;
-		}
-		bzero(lstate, sizeof(*lstate));
-		status = xpt_create_path(&lstate->path, /*periph*/NULL,
-					 xpt_path_path_id(ccb->ccb_h.path),
-					 xpt_path_target_id(ccb->ccb_h.path),
-					 xpt_path_lun_id(ccb->ccb_h.path));
-		if (status != CAM_REQ_CMP) {
-			free(lstate, M_DEVBUF);
-			xpt_print_path(ccb->ccb_h.path);
-			printf("Couldn't allocate path\n");
-			ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
-			return;
-		}
-		SLIST_INIT(&lstate->accept_tios);
-		SLIST_INIT(&lstate->immed_notifies);
-		s = splcam();
-		pause_sequencer(ahc);
-		if (target != CAM_TARGET_WILDCARD) {
-			tstate->enabled_luns[lun] = lstate;
-			ahc->enabled_luns++;
-
-			if ((ahc->features & AHC_MULTI_TID) != 0) {
-				u_int targid_mask;
-
-				targid_mask = ahc_inb(ahc, TARGID)
-					    | (ahc_inb(ahc, TARGID + 1) << 8);
-
-				targid_mask |= target_mask;
-				ahc_outb(ahc, TARGID, targid_mask);
-				ahc_outb(ahc, TARGID+1, (targid_mask >> 8));
-				
-				ahc_update_scsiid(ahc, targid_mask);
-			} else {
-				int our_id;
-				char  channel;
-
-				channel = SIM_CHANNEL(ahc, sim);
-				our_id = SIM_SCSI_ID(ahc, sim);
-
-				/*
-				 * This can only happen if selections
-				 * are not enabled
-				 */
-				if (target != our_id) {
-					u_int sblkctl;
-					char  cur_channel;
-					int   swap;
-
-					sblkctl = ahc_inb(ahc, SBLKCTL);
-					cur_channel = (sblkctl & SELBUSB)
-						    ? 'B' : 'A';
-					if ((ahc->features & AHC_TWIN) == 0)
-						cur_channel = 'A';
-					swap = cur_channel != channel;
-					if (channel == 'A')
-						ahc->our_id = target;
-					else
-						ahc->our_id_b = target;
-
-					if (swap)
-						ahc_outb(ahc, SBLKCTL,
-							 sblkctl ^ SELBUSB);
-
-					ahc_outb(ahc, SCSIID, target);
-
-					if (swap)
-						ahc_outb(ahc, SBLKCTL, sblkctl);
-				}
-			}
-		} else
-			ahc->black_hole = lstate;
-		/* Allow select-in operations */
-		if (ahc->black_hole != NULL && ahc->enabled_luns > 0) {
-			scsiseq = ahc_inb(ahc, SCSISEQ_TEMPLATE);
-			scsiseq |= ENSELI;
-			ahc_outb(ahc, SCSISEQ_TEMPLATE, scsiseq);
-			scsiseq = ahc_inb(ahc, SCSISEQ);
-			scsiseq |= ENSELI;
-			ahc_outb(ahc, SCSISEQ, scsiseq);
-		}
-		unpause_sequencer(ahc);
-		splx(s);
-		ccb->ccb_h.status = CAM_REQ_CMP;
-		xpt_print_path(ccb->ccb_h.path);
-		printf("Lun now enabled for target mode\n");
-	} else {
-		struct ccb_hdr *elm;
-		int i, empty;
-
-		if (lstate == NULL) {
-			ccb->ccb_h.status = CAM_LUN_INVALID;
-			return;
-		}
-
-		s = splcam();
-		ccb->ccb_h.status = CAM_REQ_CMP;
-		LIST_FOREACH(elm, &ahc->pending_ccbs, sim_links.le) {
-			if (elm->func_code == XPT_CONT_TARGET_IO
-			 && !xpt_path_comp(elm->path, ccb->ccb_h.path)){
-				printf("CTIO pending\n");
-				ccb->ccb_h.status = CAM_REQ_INVALID;
-				splx(s);
-				return;
-			}
-		}
-
-		if (SLIST_FIRST(&lstate->accept_tios) != NULL) {
-			printf("ATIOs pending\n");
-			ccb->ccb_h.status = CAM_REQ_INVALID;
-		}
-
-		if (SLIST_FIRST(&lstate->immed_notifies) != NULL) {
-			printf("INOTs pending\n");
-			ccb->ccb_h.status = CAM_REQ_INVALID;
-		}
-
-		if (ccb->ccb_h.status != CAM_REQ_CMP) {
-			splx(s);
-			return;
-		}
-
-		xpt_print_path(ccb->ccb_h.path);
-		printf("Target mode disabled\n");
-		xpt_free_path(lstate->path);
-		free(lstate, M_DEVBUF);
-
-		pause_sequencer(ahc);
-		/* Can we clean up the target too? */
-		if (target != CAM_TARGET_WILDCARD) {
-			tstate->enabled_luns[lun] = NULL;
-			ahc->enabled_luns--;
-			for (empty = 1, i = 0; i < 8; i++)
-				if (tstate->enabled_luns[i] != NULL) {
-					empty = 0;
-					break;
-				}
-
-			if (empty) {
-				ahc_free_tstate(ahc, target, channel,
-						/*force*/FALSE);
-				if (ahc->features & AHC_MULTI_TID) {
-					u_int targid_mask;
-
-					targid_mask = ahc_inb(ahc, TARGID)
-						    | (ahc_inb(ahc, TARGID + 1)
-						       << 8);
-
-					targid_mask &= ~target_mask;
-					ahc_outb(ahc, TARGID, targid_mask);
-					ahc_outb(ahc, TARGID+1,
-					 	 (targid_mask >> 8));
-					ahc_update_scsiid(ahc, targid_mask);
-				}
-			}
-		} else {
-
-			ahc->black_hole = NULL;
-
-			/*
-			 * We can't allow selections without
-			 * our black hole device.
-			 */
-			empty = TRUE;
-		}
-		if (ahc->enabled_luns == 0) {
-			/* Disallow select-in */
-			u_int scsiseq;
-
-			scsiseq = ahc_inb(ahc, SCSISEQ_TEMPLATE);
-			scsiseq &= ~ENSELI;
-			ahc_outb(ahc, SCSISEQ_TEMPLATE, scsiseq);
-			scsiseq = ahc_inb(ahc, SCSISEQ);
-			scsiseq &= ~ENSELI;
-			ahc_outb(ahc, SCSISEQ, scsiseq);
-		}
-		unpause_sequencer(ahc);
-		splx(s);
+	if ((scb = TAILQ_FIRST(queue)) != NULL
+	 && (scb->flags & SCB_ACTIVE) == 0) {
+		scb->flags |= SCB_ACTIVE;
+		ahc_queue_scb(ahc, scb);
 	}
 }
 
-static void
-ahc_update_scsiid(struct ahc_softc *ahc, u_int targid_mask)
-{
-	u_int scsiid_mask;
-	u_int scsiid;
-
-	if ((ahc->features & AHC_MULTI_TID) == 0)
-		panic("ahc_update_scsiid called on non-multitid unit\n");
-
-	/*
-	 * Since we will rely on the the TARGID mask
-	 * for selection enables, ensure that OID
-	 * in SCSIID is not set to some other ID
-	 * that we don't want to allow selections on.
-	 */
-	if ((ahc->features & AHC_ULTRA2) != 0)
-		scsiid = ahc_inb(ahc, SCSIID_ULTRA2);
-	else
-		scsiid = ahc_inb(ahc, SCSIID);
-	scsiid_mask = 0x1 << (scsiid & OID);
-	if ((targid_mask & scsiid_mask) == 0) {
-		u_int our_id;
-
-		/* ffs counts from 1 */
-		our_id = ffs(targid_mask);
-		if (our_id == 0)
-			our_id = ahc->our_id;
-		else
-			our_id--;
-		scsiid &= TID;
-		scsiid |= our_id;
-	}
-	if ((ahc->features & AHC_ULTRA2) != 0)
-		ahc_outb(ahc, SCSIID_ULTRA2, scsiid);
-	else
-		ahc_outb(ahc, SCSIID, scsiid);
-}
-
-static int
-ahc_handle_target_cmd(struct ahc_softc *ahc, struct target_cmd *cmd)
+/************************* Interrupt Handling *********************************/
+void
+ahc_handle_brkadrint(struct ahc_softc *ahc)
 {
-	struct	  tmode_tstate *tstate;
-	struct	  tmode_lstate *lstate;
-	struct	  ccb_accept_tio *atio;
-	u_int8_t *byte;
-	int	  initiator;
-	int	  target;
-	int	  lun;
-
-	initiator = cmd->initiator_channel >> 4;
-	target = cmd->targ_id;
-	lun    = (cmd->identify & MSG_IDENTIFY_LUNMASK);
-
-	byte = cmd->bytes;
-	tstate = ahc->enabled_targets[target];
-	lstate = NULL;
-	if (tstate != NULL && lun < 8)
-		lstate = tstate->enabled_luns[lun];
-
 	/*
-	 * Commands for disabled luns go to the black hole driver.
+	 * We upset the sequencer :-(
+	 * Lookup the error message
 	 */
-	if (lstate == NULL)
-		lstate = ahc->black_hole;
-
-	atio = (struct ccb_accept_tio*)SLIST_FIRST(&lstate->accept_tios);
-	if (atio == NULL) {
-		ahc->flags |= AHC_TQINFIFO_BLOCKED;
-		/*
-		 * Wait for more ATIOs from the peripheral driver for this lun.
-		 */
-		return (1);
-	} else
-		ahc->flags &= ~AHC_TQINFIFO_BLOCKED;
-#if 0
-	printf("Incoming command from %d for %d:%d%s\n",
-	       initiator, target, lun,
-	       lstate == ahc->black_hole ? "(Black Holed)" : "");
-#endif
-	SLIST_REMOVE_HEAD(&lstate->accept_tios, sim_links.sle);
+	int i, error, num_errors;
 
-	if (lstate == ahc->black_hole) {
-		/* Fill in the wildcards */
-		atio->ccb_h.target_id = target;
-		atio->ccb_h.target_lun = lun;
-	}
+	error = ahc_inb(ahc, ERROR);
+	num_errors =  sizeof(hard_error)/sizeof(hard_error[0]);
+	for (i = 0; error != 1 && i < num_errors; i++)
+		error >>= 1;
+	panic("%s: brkadrint, %s at seqaddr = 0x%x\n",
+	      ahc_name(ahc), hard_error[i].errmesg,
+	      ahc_inb(ahc, SEQADDR0) |
+	      (ahc_inb(ahc, SEQADDR1) << 8));
 
-	/*
-	 * Package it up and send it off to
-	 * whomever has this lun enabled.
-	 */
-	atio->sense_len = 0;
-	atio->init_id = initiator;
-	if (byte[0] != 0xFF) {
-		/* Tag was included */
-		atio->tag_action = *byte++;
-		atio->tag_id = *byte++;
-		atio->ccb_h.flags = CAM_TAG_ACTION_VALID;
-	} else {
-		byte++;
-		atio->ccb_h.flags = 0;
-	}
-
-	/* Okay.  Now determine the cdb size based on the command code */
-	switch (*byte >> CMD_GROUP_CODE_SHIFT) {
-	case 0:
-		atio->cdb_len = 6;
-		break;
-	case 1:
-	case 2:
-		atio->cdb_len = 10;
-		break;
-	case 4:
-		atio->cdb_len = 16;
-		break;
-	case 5:
-		atio->cdb_len = 12;
-		break;
-	case 3:
-	default:
-		/* Only copy the opcode. */
-		atio->cdb_len = 1;
-		printf("Reserved or VU command code type encountered\n");
-		break;
-	}
-	bcopy(byte, atio->cdb_io.cdb_bytes, atio->cdb_len);
-
-	atio->ccb_h.status |= CAM_CDB_RECVD;
-
-	if ((cmd->identify & MSG_IDENTIFY_DISCFLAG) == 0) {
-		/*
-		 * We weren't allowed to disconnect.
-		 * We're hanging on the bus until a
-		 * continue target I/O comes in response
-		 * to this accept tio.
-		 */
-#if 0
-		printf("Received Immediate Command %d:%d:%d - %p\n",
-		       initiator, target, lun, ahc->pending_device);
-#endif
-		ahc->pending_device = lstate;
-	}
-	xpt_done((union ccb*)atio);
-	return (0);
+	/* Tell everyone that this HBA is no longer availible */
+	ahc_abort_scbs(ahc, CAM_TARGET_WILDCARD, ALL_CHANNELS,
+		       CAM_LUN_WILDCARD, SCB_LIST_NULL, ROLE_UNKNOWN,
+		       CAM_NO_HBA);
 }
 
-static void
+void
 ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
 {
 	struct scb *scb;
@@ -2232,86 +374,10 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
 	 */
 	ahc_outb(ahc, CLRINT, CLRSEQINT);
 	switch (intstat & SEQINT_MASK) {
-	case NO_MATCH:
-	{
-		/* Ensure we don't leave the selection hardware on */
-		ahc_outb(ahc, SCSISEQ,
-			 ahc_inb(ahc, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP));
-
-		printf("%s:%c:%d: no active SCB for reconnecting "
-		       "target - issuing BUS DEVICE RESET\n",
-		       ahc_name(ahc), devinfo.channel, devinfo.target);
-		printf("SAVED_TCL == 0x%x, ARG_1 == 0x%x, SEQ_FLAGS == 0x%x\n",
-		       ahc_inb(ahc, SAVED_TCL), ahc_inb(ahc, ARG_1),
-		       ahc_inb(ahc, SEQ_FLAGS));
-		ahc->msgout_buf[0] = MSG_BUS_DEV_RESET;
-		ahc->msgout_len = 1;
-		ahc->msgout_index = 0;
-		ahc->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
-		ahc_outb(ahc, MSG_OUT, HOST_MSG);
-		ahc_outb(ahc, SCSISIGO, ahc_inb(ahc, LASTPHASE) | ATNO);
-		break;
-	}
-	case UPDATE_TMSG_REQ:
-		ahc_outb(ahc, TARGET_MSG_REQUEST, ahc->targ_msg_req & 0xFF);
-		ahc_outb(ahc, TARGET_MSG_REQUEST + 1,
-			 (ahc->targ_msg_req >> 8) & 0xFF);
-		ahc_outb(ahc, HS_MAILBOX, 0);
-		break;
-	case SEND_REJECT: 
-	{
-		u_int rejbyte = ahc_inb(ahc, ACCUM);
-		printf("%s:%c:%d: Warning - unknown message received from "
-		       "target (0x%x).  Rejecting\n", 
-		       ahc_name(ahc), devinfo.channel, devinfo.target, rejbyte);
-		break; 
-	}
-	case NO_IDENT: 
-	{
-		/*
-		 * The reconnecting target either did not send an identify
-		 * message, or did, but we didn't find and SCB to match and
-		 * before it could respond to our ATN/abort, it hit a dataphase.
-		 * The only safe thing to do is to blow it away with a bus
-		 * reset.
-		 */
-		int found;
-
-		printf("%s:%c:%d: Target did not send an IDENTIFY message. "
-		       "LASTPHASE = 0x%x, SAVED_TCL == 0x%x\n",
-		       ahc_name(ahc), devinfo.channel, devinfo.target,
-		       ahc_inb(ahc, LASTPHASE), ahc_inb(ahc, SAVED_TCL));
-		found = ahc_reset_channel(ahc, devinfo.channel, 
-					  /*initiate reset*/TRUE);
-		printf("%s: Issued Channel %c Bus Reset. "
-		       "%d SCBs aborted\n", ahc_name(ahc), devinfo.channel,
-		       found);
-		return;
-	}
-	case BAD_PHASE:
-	{
-		u_int lastphase;
-
-		lastphase = ahc_inb(ahc, LASTPHASE);
-		if (lastphase == P_BUSFREE) {
-			printf("%s:%c:%d: Missed busfree.  Curphase = 0x%x\n",
-			       ahc_name(ahc), devinfo.channel, devinfo.target,
-			       ahc_inb(ahc, SCSISIGI));
-			restart_sequencer(ahc);
-			return;
-		} else {
-			printf("%s:%c:%d: unknown scsi bus phase %x.  "
-			       "Attempting to continue\n",
-			       ahc_name(ahc), devinfo.channel, devinfo.target,
-			       ahc_inb(ahc, SCSISIGI));
-		}
-		break; 
-	}
 	case BAD_STATUS:
 	{
 		u_int  scb_index;
 		struct hardware_scb *hscb;
-		struct ccb_scsiio *csio;
 		/*
 		 * The sequencer will notify us when a command
 		 * has an error that would be of interest to
@@ -2349,16 +415,15 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
 			 * complete.
 			 */
 			scb->flags &= ~SCB_SENSE;
-			ahcsetccbstatus(scb->ccb, CAM_AUTOSENSE_FAIL);
+			ahc_set_transaction_status(scb, CAM_AUTOSENSE_FAIL);
 			break;
 		}
-		ahcsetccbstatus(scb->ccb, CAM_SCSI_STATUS_ERROR);
-		/* Freeze the queue unit the client sees the error. */
-		ahc_freeze_devq(ahc, scb->ccb->ccb_h.path);
-		ahc_freeze_ccb(scb->ccb);
-		csio = &scb->ccb->csio;
-		csio->scsi_status = hscb->status;
-		switch (hscb->status) {
+		ahc_set_transaction_status(scb, CAM_SCSI_STATUS_ERROR);
+		/* Freeze the queue until the client sees the error. */
+		ahc_freeze_devq(ahc, scb);
+		ahc_freeze_scb(scb);
+		ahc_set_scsi_status(scb, hscb->shared_data.status.scsi_status);
+		switch (hscb->shared_data.status.scsi_status) {
 		case SCSI_STATUS_OK:
 			printf("%s: Interrupted for staus of 0???\n",
 			       ahc_name(ahc));
@@ -2367,41 +432,52 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
 		case SCSI_STATUS_CHECK_COND:
 #ifdef AHC_DEBUG
 			if (ahc_debug & AHC_SHOWSENSE) {
-				xpt_print_path(csio->ccb_h.path);
+				ahc_print_path(ahc, scb);
 				printf("SCB %d: requests Check Status\n",
 				       scb->hscb->tag);
 			}
 #endif
 
-			if ((csio->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0) {
+			if (ahc_perform_autosense(scb)) {
 				struct ahc_dma_seg *sg;
 				struct scsi_sense *sc;
-				struct ahc_initiator_tinfo *tinfo;
+				struct ahc_initiator_tinfo *targ_info;
 				struct tmode_tstate *tstate;
+				struct ahc_transinfo *tinfo;
 
+				targ_info =
+				    ahc_fetch_transinfo(ahc,
+							devinfo.channel,
+							devinfo.our_scsiid,
+							devinfo.target,
+							&tstate);
+				tinfo = &targ_info->current;
 				sg = scb->sg_list;
-				sc = (struct scsi_sense *)(&hscb->cmdstore); 
+				sc = (struct scsi_sense *)
+				     (&hscb->shared_data.cdb); 
 				/*
 				 * Save off the residual if there is one.
 				 */
-				if (hscb->residual_SG_count != 0)
+				if (ahc_check_residual(scb))
 					ahc_calc_residual(scb);
 				else
-					scb->ccb->csio.resid = 0;
-
+					ahc_set_residual(scb, 0);
 #ifdef AHC_DEBUG
 				if (ahc_debug & AHC_SHOWSENSE) {
-					xpt_print_path(csio->ccb_h.path);
+					ahc_print_path(ahc, scb);
 					printf("Sending Sense\n");
 				}
 #endif
 				sg->addr = ahc->scb_data->sense_busaddr
 				   + (hscb->tag*sizeof(struct scsi_sense_data));
-				sg->len = MIN(sizeof(struct scsi_sense_data),
-					      csio->sense_len);
+				sg->len = ahc_get_sense_bufsize(ahc, scb);
+				sg->len |= AHC_DMA_LAST_SEG;
 
 				sc->opcode = REQUEST_SENSE;
-				sc->byte2 =  SCB_LUN(scb) << 5;
+				sc->byte2 = 0;
+				if (tinfo->protocol_version <= SCSI_REV_2
+				 && SCB_GET_LUN(scb) < 8)
+					sc->byte2 = SCB_GET_LUN(scb) << 5;
 				sc->unused[0] = 0;
 				sc->unused[1] = 0;
 				sc->length = sg->len;
@@ -2409,7 +485,8 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
 
 				/*
 				 * Would be nice to preserve DISCENB here,
-				 * but due to the way we page SCBs, we can't.
+				 * but due to the way we manage busy targets,
+				 * we can't.
 				 */
 				hscb->control = 0;
 
@@ -2421,68 +498,116 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
 				 * errors will be reported before any data
 				 * phases occur.
 				 */
-				ahc_calc_residual(scb);
-				if (scb->ccb->csio.resid
-				 == scb->ccb->csio.dxfer_len) {
-					tinfo = ahc_fetch_transinfo(ahc,
-							    devinfo.channel,
-							    devinfo.our_scsiid,
-							    devinfo.target,
-							    &tstate);
+				if (ahc_get_residual(scb) 
+				 == ahc_get_transfer_length(scb)) {
 					ahc_update_target_msg_request(ahc,
 							      &devinfo,
-							      tinfo,
+							      targ_info,
 							      /*force*/TRUE,
 							      /*paused*/TRUE);
 				}
-				hscb->status = 0;
-				hscb->SG_count = 1;
-				hscb->SG_pointer = scb->sg_list_phys;
-				hscb->data = sg->addr; 
-				hscb->datalen = sg->len;
-				hscb->cmdpointer = hscb->cmdstore_busaddr;
-				hscb->cmdlen = sizeof(*sc);
-				scb->sg_count = hscb->SG_count;
+				hscb->cdb_len = sizeof(*sc);
+				hscb->dataptr = sg->addr; 
+				hscb->datacnt = sg->len;
+				hscb->sgptr = scb->sg_list_phys | SG_FULL_RESID;
+				scb->sg_count = 1;
 				scb->flags |= SCB_SENSE;
-				/*
-				 * Ensure the target is busy since this
-				 * will be an untagged request.
-				 */
-				ahc_busy_tcl(ahc, scb);
 				ahc_outb(ahc, RETURN_1, SEND_SENSE);
 
+#ifdef __FreeBSD__
 				/*
 				 * Ensure we have enough time to actually
 				 * retrieve the sense.
 				 */
 				untimeout(ahc_timeout, (caddr_t)scb,
-					  scb->ccb->ccb_h.timeout_ch);
-				scb->ccb->ccb_h.timeout_ch =
+					  scb->io_ctx->ccb_h.timeout_ch);
+				scb->io_ctx->ccb_h.timeout_ch =
 				    timeout(ahc_timeout, (caddr_t)scb, 5 * hz);
+#endif
 			}
 			break;
-		case SCSI_STATUS_BUSY:
-		case SCSI_STATUS_QUEUE_FULL:
-			/*
-			 * Requeue any transactions that haven't been
-			 * sent yet.
-			 */
-			ahc_freeze_devq(ahc, scb->ccb->ccb_h.path);
-			ahc_freeze_ccb(scb->ccb);
+		default:
 			break;
 		}
 		break;
 	}
-	case TRACE_POINT:
+	case NO_MATCH:
+	{
+		/* Ensure we don't leave the selection hardware on */
+		ahc_outb(ahc, SCSISEQ,
+			 ahc_inb(ahc, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP));
+
+		printf("%s:%c:%d: no active SCB for reconnecting "
+		       "target - issuing BUS DEVICE RESET\n",
+		       ahc_name(ahc), devinfo.channel, devinfo.target);
+		printf("SAVED_SCSIID == 0x%x, SAVED_LUN == 0x%x, "
+		       "ARG_1 == 0x%x ARG_2 = 0x%x, SEQ_FLAGS == 0x%x\n",
+		       ahc_inb(ahc, SAVED_SCSIID), ahc_inb(ahc, SAVED_LUN),
+		       ahc_inb(ahc, ARG_1), ahc_inb(ahc, ARG_2),
+		       ahc_inb(ahc, SEQ_FLAGS));
+		printf("SCB_SCSIID == 0x%x, SCB_LUN == 0x%x, "
+		       "SCB_TAG == 0x%x\n",
+		       ahc_inb(ahc, SCB_SCSIID), ahc_inb(ahc, SCB_LUN),
+		       ahc_inb(ahc, SCB_TAG));
+		ahc->msgout_buf[0] = MSG_BUS_DEV_RESET;
+		ahc->msgout_len = 1;
+		ahc->msgout_index = 0;
+		ahc->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
+		ahc_outb(ahc, MSG_OUT, HOST_MSG);
+		ahc_outb(ahc, SCSISIGO, ahc_inb(ahc, LASTPHASE) | ATNO);
+		break;
+	}
+	case SEND_REJECT: 
+	{
+		u_int rejbyte = ahc_inb(ahc, ACCUM);
+		printf("%s:%c:%d: Warning - unknown message received from "
+		       "target (0x%x).  Rejecting\n", 
+		       ahc_name(ahc), devinfo.channel, devinfo.target, rejbyte);
+		break; 
+	}
+	case NO_IDENT: 
 	{
-		printf("SSTAT2 = 0x%x DFCNTRL = 0x%x\n", ahc_inb(ahc, SSTAT2),
-		       ahc_inb(ahc, DFCNTRL));
-		printf("SSTAT3 = 0x%x DSTATUS = 0x%x\n", ahc_inb(ahc, SSTAT3),
-		       ahc_inb(ahc, DFSTATUS));
-		printf("SSTAT0 = 0x%x, SCB_DATACNT = 0x%x\n",
-		       ahc_inb(ahc, SSTAT0),
-		       ahc_inb(ahc, SCB_DATACNT));
+		/*
+		 * The reconnecting target either did not send an identify
+		 * message, or did, but we didn't find an SCB to match and
+		 * before it could respond to our ATN/abort, it hit a dataphase.
+		 * The only safe thing to do is to blow it away with a bus
+		 * reset.
+		 */
+		int found;
+
+		printf("%s:%c:%d: Target did not send an IDENTIFY message. "
+		       "LASTPHASE = 0x%x, SAVED_SCSIID == 0x%x\n",
+		       ahc_name(ahc), devinfo.channel, devinfo.target,
+		       ahc_inb(ahc, LASTPHASE), ahc_inb(ahc, SAVED_SCSIID));
+		found = ahc_reset_channel(ahc, devinfo.channel, 
+					  /*initiate reset*/TRUE);
+		printf("%s: Issued Channel %c Bus Reset. "
+		       "%d SCBs aborted\n", ahc_name(ahc), devinfo.channel,
+		       found);
+		return;
+	}
+	case IGN_WIDE_RES:
+		ahc_handle_ign_wide_residue(ahc, &devinfo);
 		break;
+	case BAD_PHASE:
+	{
+		u_int lastphase;
+
+		lastphase = ahc_inb(ahc, LASTPHASE);
+		if (lastphase == P_BUSFREE) {
+			printf("%s:%c:%d: Missed busfree.  Curphase = 0x%x\n",
+			       ahc_name(ahc), devinfo.channel, devinfo.target,
+			       ahc_inb(ahc, SCSISIGI));
+			restart_sequencer(ahc);
+			return;
+		} else {
+			printf("%s:%c:%d: unknown scsi bus phase %x.  "
+			       "Attempting to continue\n",
+			       ahc_name(ahc), devinfo.channel, devinfo.target,
+			       ahc_inb(ahc, SCSISIGI));
+		}
+		break; 
 	}
 	case HOST_MSG_LOOP:
 	{
@@ -2491,10 +616,11 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
 		 * that requires host assistance for completion.
 		 * While handling the message phase(s), we will be
 		 * notified by the sequencer after each byte is
-		 * transfered so we can track bus phases.
+		 * transfered so we can track bus phase changes.
 		 *
-		 * If this is the first time we've seen a HOST_MSG_LOOP,
-		 * initialize the state of the host message loop.
+		 * If this is the first time we've seen a HOST_MSG_LOOP
+		 * interrupt, initialize the state of the host message
+		 * loop.
 		 */
 		if (ahc->msg_type == MSG_TYPE_NONE) {
 			u_int bus_phase;
@@ -2511,6 +637,7 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
 				 */
 				ahc_clear_intstat(ahc);
 				restart_sequencer(ahc);
+				return;
 			}
 
 			if (devinfo.role == ROLE_INITIATOR) {
@@ -2534,14 +661,16 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
 					ahc->msg_type =
 					    MSG_TYPE_TARGET_MSGOUT;
 					ahc->msgin_index = 0;
-				} else 
+				}
+#if AHC_TARGET_MODE
+				else 
 					/* XXX Ever executed??? */
 					ahc_setup_target_msgin(ahc, &devinfo);
+#endif
 			}
 		}
 
-		/* Pass a NULL path so that handlers generate their own */
-		ahc_handle_message_phase(ahc, /*path*/NULL);
+		ahc_handle_message_phase(ahc);
 		break;
 	}
 	case PERR_DETECTED:
@@ -2586,77 +715,53 @@ ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat)
 		 */
 		u_int scbindex = ahc_inb(ahc, SCB_TAG);
 		u_int lastphase = ahc_inb(ahc, LASTPHASE);
-		int i;
+		u_int i;
 
 		scb = &ahc->scb_data->scbarray[scbindex];
 		for (i = 0; i < num_phases; i++) {
 			if (lastphase == phase_table[i].phase)
 				break;
 		}
-		xpt_print_path(scb->ccb->ccb_h.path);
+		ahc_print_path(ahc, scb);
 		printf("data overrun detected %s."
 		       "  Tag == 0x%x.\n",
 		       phase_table[i].phasemsg,
   		       scb->hscb->tag);
-		xpt_print_path(scb->ccb->ccb_h.path);		
-		printf("%s seen Data Phase.  Length = %d.  NumSGs = %d.\n",
+		ahc_print_path(ahc, scb);
+		printf("%s seen Data Phase.  Length = %ld.  NumSGs = %d.\n",
 		       ahc_inb(ahc, SEQ_FLAGS) & DPHASE ? "Have" : "Haven't",
-		       scb->ccb->csio.dxfer_len, scb->sg_count);
+		       ahc_get_transfer_length(scb), scb->sg_count);
 		if (scb->sg_count > 0) {
 			for (i = 0; i < scb->sg_count; i++) {
 				printf("sg[%d] - Addr 0x%x : Length %d\n",
 				       i,
 				       scb->sg_list[i].addr,
-				       scb->sg_list[i].len);
+				       scb->sg_list[i].len & AHC_SG_LEN_MASK);
 			}
 		}
 		/*
-		 * Set this and it will take affect when the
+		 * Set this and it will take effect when the
 		 * target does a command complete.
 		 */
-		ahc_freeze_devq(ahc, scb->ccb->ccb_h.path);
-		ahcsetccbstatus(scb->ccb, CAM_DATA_RUN_ERR);
-		ahc_freeze_ccb(scb->ccb);
+		ahc_freeze_devq(ahc, scb);
+		ahc_set_transaction_status(scb, CAM_DATA_RUN_ERR);
+		ahc_freeze_scb(scb);
 		break;
 	}
 	case TRACEPOINT:
 	{
-		printf("TRACEPOINT: RETURN_2 = %d\n", ahc_inb(ahc, RETURN_2));
-#if 0
-		printf("SSTAT1 == 0x%x\n", ahc_inb(ahc, SSTAT1));
-		printf("SSTAT0 == 0x%x\n", ahc_inb(ahc, SSTAT0));
-		printf(", SCSISIGI == 0x%x\n", ahc_inb(ahc, SCSISIGI));
-		printf("TRACEPOINT: CCHCNT = %d, SG_COUNT = %d\n",
-		       ahc_inb(ahc, CCHCNT), ahc_inb(ahc, SG_COUNT));
-		printf("TRACEPOINT: SCB_TAG = %d\n", ahc_inb(ahc, SCB_TAG));
-		printf("TRACEPOINT1: CCHADDR = %d, CCHCNT = %d, SCBPTR = %d\n",
-		       ahc_inb(ahc, CCHADDR)
-		    | (ahc_inb(ahc, CCHADDR+1) << 8)
-		    | (ahc_inb(ahc, CCHADDR+2) << 16)
-		    | (ahc_inb(ahc, CCHADDR+3) << 24),
-		       ahc_inb(ahc, CCHCNT)
-		    | (ahc_inb(ahc, CCHCNT+1) << 8)
-		    | (ahc_inb(ahc, CCHCNT+2) << 16),
-		       ahc_inb(ahc, SCBPTR));
-		printf("TRACEPOINT: WAITING_SCBH = %d\n", ahc_inb(ahc, WAITING_SCBH));
-		printf("TRACEPOINT: SCB_TAG = %d\n", ahc_inb(ahc, SCB_TAG));
-#endif
 		break;
 	}
-#if NOT_YET
-	/* XXX Fill these in later */
-	case MESG_BUFFER_BUSY:
-		break;
-	case MSGIN_PHASEMIS:
+	case TRACEPOINT2:
+	{
 		break;
-#endif
+	}
 	default:
 		printf("ahc_intr: seqint, "
 		       "intstat == 0x%x, scsisigi = 0x%x\n",
 		       intstat, ahc_inb(ahc, SCSISIGI));
 		break;
 	}
-	
 unpause:
 	/*
 	 *  The sequencer is paused immediately on
@@ -2666,7 +771,7 @@ unpause:
 	unpause_sequencer(ahc);
 }
 
-static void
+void
 ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 {
 	u_int	scb_index;
@@ -2693,6 +798,8 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 		}
 		if (status == 0) {
 			printf("%s: Spurious SCSI interrupt\n", ahc_name(ahc));
+			ahc_outb(ahc, CLRINT, CLRSCSIINT);
+			unpause_sequencer(ahc);
 			return;
 		}
 	}
@@ -2725,10 +832,13 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 		u_int curphase;
 		u_int errorphase;
 		u_int lastphase;
-		int   i;
+		u_int scsirate;
+		u_int i;
+		u_int sstat2;
 
 		lastphase = ahc_inb(ahc, LASTPHASE);
 		curphase = ahc_inb(ahc, SCSISIGI) & PHASE_MASK;
+		sstat2 = ahc_inb(ahc, SSTAT2);
 		ahc_outb(ahc, CLRSINT1, CLRSCSIPERR);
 		/*
 		 * For all phases save DATA, the sequencer won't
@@ -2742,7 +852,7 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 		 * curphase and lastphase.
 		 */
 		if ((ahc_inb(ahc, SSTAT1) & SCSIPERR) != 0
-		 || curphase == P_DATAIN)
+		 || curphase == P_DATAIN || curphase == P_DATAIN_DT)
 			errorphase = curphase;
 		else
 			errorphase = lastphase;
@@ -2753,17 +863,30 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 		}
 		mesg_out = phase_table[i].mesg_out;
 		if (scb != NULL)
-			xpt_print_path(scb->ccb->ccb_h.path);
+			ahc_print_path(ahc, scb);
 		else
 			printf("%s:%c:%d: ", ahc_name(ahc),
 			       intr_channel,
-			       TCL_TARGET(ahc_inb(ahc, SAVED_TCL)));
-		
+			       SCSIID_TARGET(ahc, ahc_inb(ahc, SAVED_SCSIID)));
+		scsirate = ahc_inb(ahc, SCSIRATE);
 		printf("parity error detected %s. "
 		       "SEQADDR(0x%x) SCSIRATE(0x%x)\n",
 		       phase_table[i].phasemsg,
 		       ahc_inb(ahc, SEQADDR0) | (ahc_inb(ahc, SEQADDR1) << 8),
-		       ahc_inb(ahc, SCSIRATE));
+		       scsirate);
+
+		if ((ahc->features & AHC_DT) != 0) {
+
+			if ((sstat2 & CRCVALERR) != 0)
+				printf("\tCRC Value Mismatch\n");
+			if ((sstat2 & CRCENDERR) != 0)
+				printf("\tNo terminal CRC packet recevied\n");
+			if ((sstat2 & CRCREQERR) != 0)
+				printf("\tIllegal CRC packet request\n");
+			if ((sstat2 & DUAL_EDGE_ERR) != 0)
+				printf("\tUnexpected %sDT Data Phase\n",
+				       (scsirate & SINGLE_EDGE) ? "" : "non-");
+		}
 
 		/*
 		 * We've set the hardware to assert ATN if we   
@@ -2789,10 +912,11 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 		 * our abort requests.
 		 */
 		u_int lastphase = ahc_inb(ahc, LASTPHASE);
-		u_int saved_tcl = ahc_inb(ahc, SAVED_TCL);
-		u_int target = TCL_TARGET(saved_tcl);
-		u_int initiator_role_id = TCL_SCSI_ID(ahc, saved_tcl);
-		char channel = TCL_CHANNEL(ahc, saved_tcl);
+		u_int saved_scsiid = ahc_inb(ahc, SAVED_SCSIID);
+		u_int saved_lun = ahc_inb(ahc, SAVED_LUN);
+		u_int target = SCSIID_TARGET(ahc, saved_scsiid);
+		u_int initiator_role_id = SCSIID_OUR_ID(saved_scsiid);
+		char channel = SCSIID_CHANNEL(ahc, saved_scsiid);
 		int printerror = 1;
 
 		ahc_outb(ahc, SCSISEQ,
@@ -2808,12 +932,12 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 				tag = scb->hscb->tag;
 				/* FALLTRHOUGH */
 			case MSG_ABORT:
-				xpt_print_path(scb->ccb->ccb_h.path);
+				ahc_print_path(ahc, scb);
 				printf("SCB %d - Abort %s Completed.\n",
 				       scb->hscb->tag, tag == SCB_LIST_NULL ?
 				       "" : "Tag");
 				ahc_abort_scbs(ahc, target, channel,
-					       TCL_LUN(saved_tcl), tag,
+					       saved_lun, tag,
 					       ROLE_INITIATOR,
 					       CAM_REQ_ABORTED);
 				printerror = 0;
@@ -2821,28 +945,29 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 			case MSG_BUS_DEV_RESET:
 			{
 				struct ahc_devinfo devinfo;
-
+#ifdef __FreeBSD__
 				/*
 				 * Don't mark the user's request for this BDR
 				 * as completing with CAM_BDR_SENT.  CAM3
 				 * specifies CAM_REQ_CMP.
 				 */
 				if (scb != NULL
-				 && scb->ccb->ccb_h.func_code == XPT_RESET_DEV
-				 && ahc_match_scb(scb, target, channel,
-						  TCL_LUN(saved_tcl),
+				 && scb->io_ctx->ccb_h.func_code== XPT_RESET_DEV
+				 && ahc_match_scb(ahc, scb, target, channel,
+						  CAM_LUN_WILDCARD,
 						  SCB_LIST_NULL,
 						  ROLE_INITIATOR)) {
-					ahcsetccbstatus(scb->ccb, CAM_REQ_CMP);
+					ahc_set_transaction_status(scb, CAM_REQ_CMP);
 				}
+#endif
 				ahc_compile_devinfo(&devinfo,
 						    initiator_role_id,
 						    target,
-						    TCL_LUN(saved_tcl),
+						    CAM_LUN_WILDCARD,
 						    channel,
 						    ROLE_INITIATOR);
 				ahc_handle_devreset(ahc, &devinfo,
-						    CAM_BDR_SENT, AC_SENT_BDR,
+						    CAM_BDR_SENT,
 						    "Bus Device Reset",
 						    /*verbose_level*/0);
 				printerror = 0;
@@ -2853,7 +978,7 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 			}
 		}
 		if (printerror != 0) {
-			int i;
+			u_int i;
 
 			if (scb != NULL) {
 				u_int tag;
@@ -2863,10 +988,10 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 				else
 					tag = SCB_LIST_NULL;
 				ahc_abort_scbs(ahc, target, channel,
-					       SCB_LUN(scb), tag,
+					       SCB_GET_LUN(scb), tag,
 					       ROLE_INITIATOR,
 					       CAM_UNEXP_BUSFREE);
-				xpt_print_path(scb->ccb->ccb_h.path);
+				ahc_print_path(ahc, scb);
 			} else {
 				/*
 				 * We had not fully identified this connection,
@@ -2907,15 +1032,8 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 			       "valid during SELTO scb(%d, %d)\n",
 			       ahc_name(ahc), scbptr, scb_index);
 		} else {
-			u_int tag;
-
-			tag = SCB_LIST_NULL;
-			if ((scb->hscb->control & MSG_SIMPLE_Q_TAG) != 0)
-				tag = scb->hscb->tag;
-
-			ahc_abort_scbs(ahc, SCB_TARGET(scb), SCB_CHANNEL(scb),
-				       SCB_LUN(scb), tag,
-				       ROLE_INITIATOR, CAM_SEL_TIMEOUT);
+			ahc_set_transaction_status(scb, CAM_SEL_TIMEOUT);
+			ahc_freeze_devq(ahc, scb);
 		}
 		/* Stop the selection */
 		ahc_outb(ahc, SCSISEQ, 0);
@@ -2927,7 +1045,7 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 		 * Although the driver does not care about the
 		 * 'Selection in Progress' status bit, the busy
 		 * LED does.  SELINGO is only cleared by a sucessful
-		 * selection, so we must manually clear it to ensure
+		 * selection, so we must manually clear it to insure
 		 * the LED turns off just incase no future successful
 		 * selections occur (e.g. no devices on the bus).
 		 */
@@ -2938,7 +1056,7 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 		ahc_outb(ahc, CLRINT, CLRSCSIINT);
 		restart_sequencer(ahc);
 	} else {
-		xpt_print_path(scb->ccb->ccb_h.path);
+		ahc_print_path(ahc, scb);
 		printf("Unknown SCSIINT. Status = 0x%x\n", status);
 		ahc_outb(ahc, CLRSINT1, status);
 		ahc_outb(ahc, CLRINT, CLRSCSIINT);
@@ -2946,57 +1064,701 @@ ahc_handle_scsiint(struct ahc_softc *ahc, u_int intstat)
 	}
 }
 
-static void
-ahc_build_transfer_msg(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
+
+/*
+ * Clear any pending interrupt status.
+ */
+void
+ahc_clear_intstat(struct ahc_softc *ahc)
 {
+	/* Clear any interrupt conditions this may have caused */
+	ahc_outb(ahc, CLRSINT0, CLRSELDO|CLRSELDI|CLRSELINGO);
+	ahc_outb(ahc, CLRSINT1, CLRSELTIMEO|CLRATNO|CLRSCSIRSTI
+				|CLRBUSFREE|CLRSCSIPERR|CLRPHASECHG|
+				CLRREQINIT);
+	ahc_outb(ahc, CLRINT, CLRSCSIINT);
+}
+
+/**************************** Debugging Routines ******************************/
+void
+ahc_print_scb(struct scb *scb)
+{
+	int i;
+
+	struct hardware_scb *hscb = scb->hscb;
+
+	printf("scb:%p control:0x%x scsiid:0x%x lun:%d cdb_len:%d\n",
+	       scb,
+	       hscb->control,
+	       hscb->scsiid,
+	       hscb->lun,
+	       hscb->cdb_len);
+	i = 0;
+	printf("Shared Data: %#02x %#02x %#02x %#02x\n",
+	       hscb->shared_data.cdb[i++],
+	       hscb->shared_data.cdb[i++],
+	       hscb->shared_data.cdb[i++],
+	       hscb->shared_data.cdb[i++]);
+	printf("             %#02x %#02x %#02x %#02x\n",
+	       hscb->shared_data.cdb[i++],
+	       hscb->shared_data.cdb[i++],
+	       hscb->shared_data.cdb[i++],
+	       hscb->shared_data.cdb[i++]);
+	printf("             %#02x %#02x %#02x %#02x\n",
+	       hscb->shared_data.cdb[i++],
+	       hscb->shared_data.cdb[i++],
+	       hscb->shared_data.cdb[i++],
+	       hscb->shared_data.cdb[i++]);
+	printf("        dataptr:%#x datacnt:%#x sgptr:%#x tag:%#x\n",
+		hscb->dataptr,
+		hscb->datacnt,
+		hscb->sgptr,
+		hscb->tag);
+	if (scb->sg_count > 0) {
+		for (i = 0; i < scb->sg_count; i++) {
+			printf("sg[%d] - Addr 0x%x : Length %d\n",
+			       i,
+			       scb->sg_list[i].addr,
+			       scb->sg_list[i].len);
+		}
+	}
+}
+
+/************************* Transfer Negotiation *******************************/
+/*
+ * Allocate per target mode instance (ID we respond to as a target)
+ * transfer negotiation data structures.
+ */
+static struct tmode_tstate *
+ahc_alloc_tstate(struct ahc_softc *ahc, u_int scsi_id, char channel)
+{
+	struct tmode_tstate *master_tstate;
+	struct tmode_tstate *tstate;
+	int i;
+
+	master_tstate = ahc->enabled_targets[ahc->our_id];
+	if (channel == 'B') {
+		scsi_id += 8;
+		master_tstate = ahc->enabled_targets[ahc->our_id_b + 8];
+	}
+	if (ahc->enabled_targets[scsi_id] != NULL
+	 && ahc->enabled_targets[scsi_id] != master_tstate)
+		panic("%s: ahc_alloc_tstate - Target already allocated",
+		      ahc_name(ahc));
+	tstate = malloc(sizeof(*tstate), M_DEVBUF, M_NOWAIT);
+	if (tstate == NULL)
+		return (NULL);
+
 	/*
-	 * We need to initiate transfer negotiations.
-	 * If our current and goal settings are identical,
-	 * we want to renegotiate due to a check condition.
+	 * If we have allocated a master tstate, copy user settings from
+	 * the master tstate (taken from SRAM or the EEPROM) for this
+	 * channel, but reset our current and goal settings to async/narrow
+	 * until an initiator talks to us.
 	 */
+	if (master_tstate != NULL) {
+		memcpy(tstate, master_tstate, sizeof(*tstate));
+		memset(tstate->enabled_luns, 0, sizeof(tstate->enabled_luns));
+		tstate->ultraenb = 0;
+		for (i = 0; i < 16; i++) {
+			memset(&tstate->transinfo[i].current, 0,
+			      sizeof(tstate->transinfo[i].current));
+			memset(&tstate->transinfo[i].goal, 0,
+			      sizeof(tstate->transinfo[i].goal));
+		}
+	} else
+		memset(tstate, 0, sizeof(*tstate));
+	ahc->enabled_targets[scsi_id] = tstate;
+	return (tstate);
+}
+
+/*
+ * Free per target mode instance (ID we respond to as a target)
+ * transfer negotiation data structures.
+ */
+static void
+ahc_free_tstate(struct ahc_softc *ahc, u_int scsi_id, char channel, int force)
+{
+	struct tmode_tstate *tstate;
+
+	/* Don't clean up the entry for our initiator role */
+	if ((ahc->flags & AHC_INITIATORMODE) != 0
+	 && ((channel == 'B' && scsi_id == ahc->our_id_b)
+	  || (channel == 'A' && scsi_id == ahc->our_id))
+	 && force == FALSE)
+		return;
+
+	if (channel == 'B')
+		scsi_id += 8;
+	tstate = ahc->enabled_targets[scsi_id];
+	if (tstate != NULL)
+		free(tstate, M_DEVBUF);
+	ahc->enabled_targets[scsi_id] = NULL;
+}
+
+/*
+ * Called when we have an active connection to a target on the bus,
+ * this function finds the nearest syncrate to the input period limited
+ * by the capabilities of the bus connectivity of the target.
+ */
+struct ahc_syncrate *
+ahc_devlimited_syncrate(struct ahc_softc *ahc, u_int *period,
+			u_int *ppr_options) {
+	u_int	maxsync;
+
+	if ((ahc->features & AHC_ULTRA2) != 0) {
+		if ((ahc_inb(ahc, SBLKCTL) & ENAB40) != 0
+		 && (ahc_inb(ahc, SSTAT2) & EXP_ACTIVE) == 0) {
+			maxsync = AHC_SYNCRATE_DT;
+		} else {
+			maxsync = AHC_SYNCRATE_ULTRA;
+			/* Can't do DT on an SE bus */
+			*ppr_options &= ~MSG_EXT_PPR_DT_REQ;
+		}
+	} else if ((ahc->features & AHC_ULTRA) != 0) {
+		maxsync = AHC_SYNCRATE_ULTRA;
+	} else {
+		maxsync = AHC_SYNCRATE_FAST;
+	}
+	return (ahc_find_syncrate(ahc, period, ppr_options, maxsync));
+}
+
+/*
+ * Look up the valid period to SCSIRATE conversion in our table.
+ * Return the period and offset that should be sent to the target
+ * if this was the beginning of an SDTR.
+ */
+struct ahc_syncrate *
+ahc_find_syncrate(struct ahc_softc *ahc, u_int *period,
+		  u_int *ppr_options, u_int maxsync)
+{
+	struct ahc_syncrate *syncrate;
+
+	if ((ahc->features & AHC_DT) == 0)
+		*ppr_options &= ~MSG_EXT_PPR_DT_REQ;
+	
+	for (syncrate = &ahc_syncrates[maxsync];
+	     syncrate->rate != NULL;
+	     syncrate++) {
+
+		/*
+		 * The Ultra2 table doesn't go as low
+		 * as for the Fast/Ultra cards.
+		 */
+		if ((ahc->features & AHC_ULTRA2) != 0
+		 && (syncrate->sxfr_u2 == 0))
+			break;
+
+		/* Skip any DT entries if DT is not available */
+		if ((*ppr_options & MSG_EXT_PPR_DT_REQ) == 0
+		 && (syncrate->sxfr_u2 & DT_SXFR) != 0)
+			continue;
+
+		if (*period <= syncrate->period) {
+			/*
+			 * When responding to a target that requests
+			 * sync, the requested rate may fall between
+			 * two rates that we can output, but still be
+			 * a rate that we can receive.  Because of this,
+			 * we want to respond to the target with
+			 * the same rate that it sent to us even
+			 * if the period we use to send data to it
+			 * is lower.  Only lower the response period
+			 * if we must.
+			 */
+			if (syncrate == &ahc_syncrates[maxsync])
+				*period = syncrate->period;
+
+			/*
+			 * At some speeds, we only support
+			 * ST transfers.
+			 */
+		 	if ((syncrate->sxfr_u2 & ST_SXFR) != 0)
+				*ppr_options &= ~MSG_EXT_PPR_DT_REQ;
+			break;
+		}
+	}
+
+	if ((*period == 0)
+	 || (syncrate->rate == NULL)
+	 || ((ahc->features & AHC_ULTRA2) != 0
+	  && (syncrate->sxfr_u2 == 0))) {
+		/* Use asynchronous transfers. */
+		*period = 0;
+		syncrate = NULL;
+		*ppr_options &= ~MSG_EXT_PPR_DT_REQ;
+	}
+	return (syncrate);
+}
+
+/*
+ * Convert from an entry in our syncrate table to the SCSI equivalent
+ * sync "period" factor.
+ */
+u_int
+ahc_find_period(struct ahc_softc *ahc, u_int scsirate, u_int maxsync)
+{
+	struct ahc_syncrate *syncrate;
+
+	if ((ahc->features & AHC_ULTRA2) != 0)
+		scsirate &= SXFR_ULTRA2;
+	else
+		scsirate &= SXFR;
+
+	syncrate = &ahc_syncrates[maxsync];
+	while (syncrate->rate != NULL) {
+
+		if ((ahc->features & AHC_ULTRA2) != 0) {
+			if (syncrate->sxfr_u2 == 0)
+				break;
+			else if (scsirate == (syncrate->sxfr_u2 & SXFR_ULTRA2))
+				return (syncrate->period);
+		} else if (scsirate == (syncrate->sxfr & SXFR)) {
+				return (syncrate->period);
+		}
+		syncrate++;
+	}
+	return (0); /* async */
+}
+
+/*
+ * Truncate the given synchronous offset to a value the
+ * current adapter type and syncrate are capable of.
+ */
+void
+ahc_validate_offset(struct ahc_softc *ahc, struct ahc_syncrate *syncrate,
+		    u_int *offset, int wide)
+{
+	u_int maxoffset;
+
+	/* Limit offset to what we can do */
+	if (syncrate == NULL) {
+		maxoffset = 0;
+	} else if ((ahc->features & AHC_ULTRA2) != 0) {
+		maxoffset = MAX_OFFSET_ULTRA2;
+	} else {
+		if (wide)
+			maxoffset = MAX_OFFSET_16BIT;
+		else
+			maxoffset = MAX_OFFSET_8BIT;
+	}
+	*offset = MIN(*offset, maxoffset);
+}
+
+/*
+ * Truncate the given transfer width parameter to a value the
+ * current adapter type is capable of.
+ */
+void
+ahc_validate_width(struct ahc_softc *ahc, u_int *bus_width)
+{
+	switch (*bus_width) {
+	default:
+		if (ahc->features & AHC_WIDE) {
+			/* Respond Wide */
+			*bus_width = MSG_EXT_WDTR_BUS_16_BIT;
+			break;
+		}
+		/* FALLTHROUGH */
+	case MSG_EXT_WDTR_BUS_8_BIT:
+		bus_width = MSG_EXT_WDTR_BUS_8_BIT;
+		break;
+	}
+}
+
+/*
+ * Update the bitmask of targets for which the controller should
+ * negotiate with at the next convenient oportunity.  This currently
+ * means the next time we send the initial identify messages for
+ * a new transaction.
+ */
+static void
+ahc_update_target_msg_request(struct ahc_softc *ahc,
+			      struct ahc_devinfo *devinfo,
+			      struct ahc_initiator_tinfo *tinfo,
+			      int force, int paused)
+{
+	u_int targ_msg_req_orig;
+
+	targ_msg_req_orig = ahc->targ_msg_req;
+	if (tinfo->current.period != tinfo->goal.period
+	 || tinfo->current.width != tinfo->goal.width
+	 || tinfo->current.offset != tinfo->goal.offset
+	 || (force
+	  && (tinfo->goal.period != 0
+	   || tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT)))
+		ahc->targ_msg_req |= devinfo->target_mask;
+	else
+		ahc->targ_msg_req &= ~devinfo->target_mask;
+
+	if (ahc->targ_msg_req != targ_msg_req_orig) {
+		/* Update the message request bit for this target */
+		if (!paused)
+			pause_sequencer(ahc);
+
+		ahc_outb(ahc, TARGET_MSG_REQUEST,
+			 ahc->targ_msg_req & 0xFF);
+		ahc_outb(ahc, TARGET_MSG_REQUEST + 1,
+			 (ahc->targ_msg_req >> 8) & 0xFF);
+
+		if (!paused)
+			unpause_sequencer(ahc);
+	}
+}
+
+/*
+ * Update the user/goal/current tables of synchronous negotiation
+ * parameters as well as, in the case of a current or active update,
+ * any data structures on the host controller.  In the case of an
+ * active update, the specified target is currently talking to us on
+ * the bus, so the transfer parameter update must take effect
+ * immediately.
+ */
+void
+ahc_set_syncrate(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
+		 struct ahc_syncrate *syncrate, u_int period,
+		 u_int offset, u_int ppr_options, u_int type, int paused)
+{
 	struct	ahc_initiator_tinfo *tinfo;
 	struct	tmode_tstate *tstate;
-	int	dowide;
-	int	dosync;
+	u_int	old_period;
+	u_int	old_offset;
+	int	active = (type & AHC_TRANS_ACTIVE) == AHC_TRANS_ACTIVE;
+
+	if (syncrate == NULL) {
+		period = 0;
+		offset = 0;
+	}
 
 	tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
 				    devinfo->target, &tstate);
-	dowide = tinfo->current.width != tinfo->goal.width;
-	dosync = tinfo->current.period != tinfo->goal.period;
+	old_period = tinfo->current.period;
+	old_offset = tinfo->current.offset;
 
-	if (!dowide && !dosync) {
-		dowide = tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT;
-		dosync = tinfo->goal.period != 0;
+	if ((type & AHC_TRANS_CUR) != 0
+	 && (old_period != period || old_offset != offset)) {
+		u_int	scsirate;
+
+		scsirate = tinfo->scsirate;
+		if ((ahc->features & AHC_ULTRA2) != 0) {
+
+			scsirate &= ~(SXFR_ULTRA2|SINGLE_EDGE|ENABLE_CRC);
+			if (syncrate != NULL) {
+				scsirate |= syncrate->sxfr_u2;
+				if ((ppr_options & MSG_EXT_PPR_DT_REQ) != 0)
+					scsirate |= ENABLE_CRC;
+				else
+					scsirate |= SINGLE_EDGE;
+			}
+		} else {
+
+			scsirate &= ~(SXFR|SOFS);
+			/*
+			 * Ensure Ultra mode is set properly for
+			 * this target.
+			 */
+			tstate->ultraenb &= ~devinfo->target_mask;
+			if (syncrate != NULL) {
+				if (syncrate->sxfr & ULTRA_SXFR) {
+					tstate->ultraenb |=
+						devinfo->target_mask;
+				}
+				scsirate |= syncrate->sxfr & SXFR;
+				scsirate |= offset & SOFS;
+			}
+			if (active) {
+				u_int sxfrctl0;
+
+				sxfrctl0 = ahc_inb(ahc, SXFRCTL0);
+				sxfrctl0 &= ~FAST20;
+				if (tstate->ultraenb & devinfo->target_mask)
+					sxfrctl0 |= FAST20;
+				ahc_outb(ahc, SXFRCTL0, sxfrctl0);
+			}
+		}
+		if (active) {
+			ahc_outb(ahc, SCSIRATE, scsirate);
+			if ((ahc->features & AHC_ULTRA2) != 0)
+				ahc_outb(ahc, SCSIOFFSET, offset);
+		}
+
+		tinfo->scsirate = scsirate;
+		tinfo->current.period = period;
+		tinfo->current.offset = offset;
+		tinfo->current.ppr_options = ppr_options;
+
+		/* Update the syncrates in any pending scbs */
+		ahc_update_pending_syncrates(ahc);
+
+		ahc_send_async(ahc, devinfo->channel, devinfo->target,
+			       CAM_LUN_WILDCARD, AC_TRANSFER_NEG);
+		if (bootverbose) {
+			if (offset != 0) {
+				printf("%s: target %d synchronous at %sMHz%s, "
+				       "offset = 0x%x\n", ahc_name(ahc),
+				       devinfo->target, syncrate->rate,
+				       (ppr_options & MSG_EXT_PPR_DT_REQ)
+				       ? " DT" : "", offset);
+			} else {
+				printf("%s: target %d using "
+				       "asynchronous transfers\n",
+				       ahc_name(ahc), devinfo->target);
+			}
+		}
 	}
 
-	if (dowide) {
-		ahc_construct_wdtr(ahc, tinfo->goal.width);
-	} else if (dosync) {
-		struct	ahc_syncrate *rate;
-		u_int	period;
-		u_int	offset;
+	if ((type & AHC_TRANS_GOAL) != 0) {
+		tinfo->goal.period = period;
+		tinfo->goal.offset = offset;
+		tinfo->goal.ppr_options = ppr_options;
+	}
 
-		period = tinfo->goal.period;
-		rate = ahc_devlimited_syncrate(ahc, &period);
-		offset = tinfo->goal.offset;
-		ahc_validate_offset(ahc, rate, &offset,
-				    tinfo->current.width);
-		ahc_construct_sdtr(ahc, period, offset);
-	} else {
-		panic("ahc_intr: AWAITING_MSG for negotiation, "
-		      "but no negotiation needed\n");	
+	if ((type & AHC_TRANS_USER) != 0) {
+		tinfo->user.period = period;
+		tinfo->user.offset = offset;
+		tinfo->user.ppr_options = ppr_options;
 	}
+
+	ahc_update_target_msg_request(ahc, devinfo, tinfo,
+				      /*force*/FALSE,
+				      paused);
+}
+
+/*
+ * Update the user/goal/current tables of wide negotiation
+ * parameters as well as, in the case of a current or active update,
+ * any data structures on the host controller.  In the case of an
+ * active update, the specified target is currently talking to us on
+ * the bus, so the transfer parameter update must take effect
+ * immediately.
+ */
+void
+ahc_set_width(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
+	      u_int width, u_int type, int paused)
+{
+	struct ahc_initiator_tinfo *tinfo;
+	struct tmode_tstate *tstate;
+	u_int  oldwidth;
+	int    active = (type & AHC_TRANS_ACTIVE) == AHC_TRANS_ACTIVE;
+
+	tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
+				    devinfo->target, &tstate);
+	oldwidth = tinfo->current.width;
+
+	if ((type & AHC_TRANS_CUR) != 0 && oldwidth != width) {
+		u_int	scsirate;
+
+		scsirate =  tinfo->scsirate;
+		scsirate &= ~WIDEXFER;
+		if (width == MSG_EXT_WDTR_BUS_16_BIT)
+			scsirate |= WIDEXFER;
+
+		tinfo->scsirate = scsirate;
+
+		if (active)
+			ahc_outb(ahc, SCSIRATE, scsirate);
+
+		tinfo->current.width = width;
+
+		ahc_send_async(ahc, devinfo->channel, devinfo->target,
+			       CAM_LUN_WILDCARD, AC_TRANSFER_NEG);
+		if (bootverbose) {
+			printf("%s: target %d using %dbit transfers\n",
+			       ahc_name(ahc), devinfo->target,
+			       8 * (0x01 << width));
+		}
+	}
+	if ((type & AHC_TRANS_GOAL) != 0)
+		tinfo->goal.width = width;
+	if ((type & AHC_TRANS_USER) != 0)
+		tinfo->user.width = width;
+
+	ahc_update_target_msg_request(ahc, devinfo, tinfo,
+				      /*force*/FALSE, paused);
+}
+
+/*
+ * Update the current state of tagged queuing for a given target.
+ */
+void
+ahc_set_tags(struct ahc_softc *ahc, struct ahc_devinfo *devinfo, int enable)
+{
+	struct ahc_initiator_tinfo *tinfo;
+	struct tmode_tstate *tstate;
+	uint16_t orig_tagenable;
+
+	tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
+				    devinfo->target, &tstate);
+
+	orig_tagenable = tstate->tagenable;
+	if (enable)
+		tstate->tagenable |= devinfo->target_mask;
+	else
+		tstate->tagenable &= ~devinfo->target_mask;
+
+	if (orig_tagenable != tstate->tagenable) {
+		ahc_platform_set_tags(ahc, devinfo, enable);
+		ahc_send_async(ahc, devinfo->channel, devinfo->target,
+			       devinfo->lun, AC_TRANSFER_NEG);
+	}
+
 }
 
+/*
+ * When the transfer settings for a connection change, update any
+ * in-transit SCBs to contain the new data so the hardware will
+ * be set correctly during future (re)selections.
+ */
+static void
+ahc_update_pending_syncrates(struct ahc_softc *ahc)
+{
+	struct	scb *pending_scb;
+	int	pending_scb_count;
+	int	i;
+	u_int	saved_scbptr;
+
+	/*
+	 * Traverse the pending SCB list and ensure that all of the
+	 * SCBs there have the proper settings.
+	 */
+	pending_scb = LIST_FIRST(&ahc->pending_scbs);
+	pending_scb_count = 0;
+	while (pending_scb != NULL) {
+		struct ahc_devinfo devinfo;
+		struct hardware_scb *pending_hscb;
+		struct ahc_initiator_tinfo *tinfo;
+		struct tmode_tstate *tstate;
+		
+		ahc_scb_devinfo(ahc, &devinfo, pending_scb);
+		tinfo = ahc_fetch_transinfo(ahc, devinfo.channel,
+					    devinfo.our_scsiid,
+					    devinfo.target, &tstate);
+		pending_hscb = pending_scb->hscb;
+		pending_hscb->control &= ~ULTRAENB;
+		if ((tstate->ultraenb & devinfo.target_mask) != 0)
+			pending_hscb->control |= ULTRAENB;
+		pending_hscb->scsirate = tinfo->scsirate;
+		pending_hscb->scsioffset = tinfo->current.offset;
+		pending_scb_count++;
+		pending_scb = LIST_NEXT(pending_scb, pending_links);
+	}
+
+	if (pending_scb_count == 0)
+		return;
+
+	saved_scbptr = ahc_inb(ahc, SCBPTR);
+	/* Ensure that the hscbs down on the card match the new information */
+	for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
+		u_int scb_tag;
+
+		ahc_outb(ahc, SCBPTR, i);
+		scb_tag = ahc_inb(ahc, SCB_TAG);
+		if (scb_tag != SCB_LIST_NULL) {
+			struct	ahc_devinfo devinfo;
+			struct	scb *pending_scb;
+			struct	hardware_scb *pending_hscb;
+			struct	ahc_initiator_tinfo *tinfo;
+			struct	tmode_tstate *tstate;
+			u_int	control;
+
+			pending_scb = &ahc->scb_data->scbarray[scb_tag];
+			if (pending_scb->flags == SCB_FREE)
+				continue;
+			pending_hscb = pending_scb->hscb;
+			ahc_scb_devinfo(ahc, &devinfo, pending_scb);
+			tinfo = ahc_fetch_transinfo(ahc, devinfo.channel,
+						    devinfo.our_scsiid,
+						    devinfo.target, &tstate);
+			control = ahc_inb(ahc, SCB_CONTROL);
+			control &= ~ULTRAENB;
+			if ((tstate->ultraenb & devinfo.target_mask) != 0)
+				control |= ULTRAENB;
+			ahc_outb(ahc, SCB_CONTROL, control);
+			ahc_outb(ahc, SCB_SCSIRATE, tinfo->scsirate);
+			ahc_outb(ahc, SCB_SCSIOFFSET, tinfo->current.offset);
+		}
+	}
+	ahc_outb(ahc, SCBPTR, saved_scbptr);
+}
+
+/**************************** Pathing Information *****************************/
+static void
+ahc_fetch_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
+{
+	u_int	saved_scsiid;
+	role_t	role;
+	int	our_id;
+
+	if (ahc_inb(ahc, SSTAT0) & TARGET)
+		role = ROLE_TARGET;
+	else
+		role = ROLE_INITIATOR;
+
+	if (role == ROLE_TARGET
+	 && (ahc->features & AHC_MULTI_TID) != 0
+	 && (ahc_inb(ahc, SEQ_FLAGS) & CMDPHASE_PENDING) != 0) {
+		/* We were selected, so pull our id from TARGIDIN */
+		our_id = ahc_inb(ahc, TARGIDIN) & OID;
+	} else if ((ahc->features & AHC_ULTRA2) != 0)
+		our_id = ahc_inb(ahc, SCSIID_ULTRA2) & OID;
+	else
+		our_id = ahc_inb(ahc, SCSIID) & OID;
+
+	saved_scsiid = ahc_inb(ahc, SAVED_SCSIID);
+	ahc_compile_devinfo(devinfo,
+			    our_id,
+			    SCSIID_TARGET(ahc, saved_scsiid),
+			    ahc_inb(ahc, SAVED_LUN),
+			    SCSIID_CHANNEL(ahc, saved_scsiid),
+			    role);
+}
+
+void
+ahc_compile_devinfo(struct ahc_devinfo *devinfo, u_int our_id, u_int target,
+		    u_int lun, char channel, role_t role)
+{
+	devinfo->our_scsiid = our_id;
+	devinfo->target = target;
+	devinfo->lun = lun;
+	devinfo->target_offset = target;
+	devinfo->channel = channel;
+	devinfo->role = role;
+	if (channel == 'B')
+		devinfo->target_offset += 8;
+	devinfo->target_mask = (0x01 << devinfo->target_offset);
+}
+
+static void
+ahc_scb_devinfo(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
+		struct scb *scb)
+{
+	role_t	role;
+	int	our_id;
+
+	our_id = SCSIID_OUR_ID(scb->hscb->scsiid);
+	role = ROLE_INITIATOR;
+	if ((scb->hscb->control & TARGET_SCB) != 0)
+		role = ROLE_TARGET;
+	ahc_compile_devinfo(devinfo, our_id, SCB_GET_TARGET(ahc, scb),
+			    SCB_GET_LUN(scb), SCB_GET_CHANNEL(ahc, scb), role);
+}
+
+
+/************************ Message Phase Processing ****************************/
+/*
+ * When an initiator transaction with the MK_MESSAGE flag either reconnects
+ * or enters the initial message out phase, we are interrupted.  Fill our
+ * outgoing message buffer with the appropriate message and beging handing
+ * the message phase(s) manually.
+ */
 static void
 ahc_setup_initiator_msgout(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
 			   struct scb *scb)
 {
-	/*              
+	/*
 	 * To facilitate adding multiple messages together,
 	 * each routine should increment the index and len
 	 * variables instead of setting them explicitly.
-	 */             
+	 */
 	ahc->msgout_index = 0;
 	ahc->msgout_len = 0;
 
@@ -3004,7 +1766,7 @@ ahc_setup_initiator_msgout(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
 	 && ahc_inb(ahc, MSG_OUT) == MSG_IDENTIFYFLAG) {
 		u_int identify_msg;
 
-		identify_msg = MSG_IDENTIFYFLAG | SCB_LUN(scb);
+		identify_msg = MSG_IDENTIFYFLAG | SCB_GET_LUN(scb);
 		if ((scb->hscb->control & DISCENB) != 0)
 			identify_msg |= MSG_IDENTIFY_DISCFLAG;
 		ahc->msgout_buf[ahc->msgout_index++] = identify_msg;
@@ -3012,7 +1774,7 @@ ahc_setup_initiator_msgout(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
 
 		if ((scb->hscb->control & TAG_ENB) != 0) {
 			ahc->msgout_buf[ahc->msgout_index++] =
-			    scb->ccb->csio.tag_action;
+			    scb->hscb->control & (TAG_ENB|SCB_TAG_TYPE);
 			ahc->msgout_buf[ahc->msgout_index++] = scb->hscb->tag;
 			ahc->msgout_len += 2;
 		}
@@ -3021,21 +1783,24 @@ ahc_setup_initiator_msgout(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
 	if (scb->flags & SCB_DEVICE_RESET) {
 		ahc->msgout_buf[ahc->msgout_index++] = MSG_BUS_DEV_RESET;
 		ahc->msgout_len++;
-		xpt_print_path(scb->ccb->ccb_h.path);
+		ahc_print_path(ahc, scb);
 		printf("Bus Device Reset Message Sent\n");
-	} else if (scb->flags & SCB_ABORT) {
+	} else if ((scb->flags & SCB_ABORT) != 0) {
 		if ((scb->hscb->control & TAG_ENB) != 0)
 			ahc->msgout_buf[ahc->msgout_index++] = MSG_ABORT_TAG;
 		else
 			ahc->msgout_buf[ahc->msgout_index++] = MSG_ABORT;
 		ahc->msgout_len++;
-		xpt_print_path(scb->ccb->ccb_h.path);
+		ahc_print_path(ahc, scb);
 		printf("Abort Message Sent\n");
-	} else if ((ahc->targ_msg_req & devinfo->target_mask) != 0) {
+	} else if ((ahc->targ_msg_req & devinfo->target_mask) != 0
+		|| (scb->flags & SCB_NEGOTIATE) != 0) {
 		ahc_build_transfer_msg(ahc, devinfo);
 	} else {
 		printf("ahc_intr: AWAITING_MSG for an SCB that "
-		       "does not have a waiting message");
+		       "does not have a waiting message\n");
+		printf("SCSIID = %x, target_mask = %x\n", scb->hscb->scsiid,
+		       devinfo->target_mask);
 		panic("SCB = %d, SCB Control = %x, MSG_OUT = %x "
 		      "SCB flags = %x", scb->hscb->tag, scb->hscb->control,
 		      ahc_inb(ahc, MSG_OUT), scb->flags);
@@ -3049,136 +1814,126 @@ ahc_setup_initiator_msgout(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
 	ahc->msgout_index = 0;
 	ahc->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
 }
-
+/*
+ * Build an appropriate transfer negotiation message for the
+ * currently active target.
+ */
 static void
-ahc_setup_target_msgin(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
-{
-	/*              
-	 * To facilitate adding multiple messages together,
-	 * each routine should increment the index and len
-	 * variables instead of setting them explicitly.
-	 */             
-	ahc->msgout_index = 0;
-	ahc->msgout_len = 0;
-
-	if ((ahc->targ_msg_req & devinfo->target_mask) != 0)
-		ahc_build_transfer_msg(ahc, devinfo);
-	else
-		panic("ahc_intr: AWAITING target message with no message");
-
-	ahc->msgout_index = 0;
-	ahc->msg_type = MSG_TYPE_TARGET_MSGIN;
-}
-
-static int
-ahc_handle_msg_reject(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
+ahc_build_transfer_msg(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
 {
 	/*
-	 * What we care about here is if we had an
-	 * outstanding SDTR or WDTR message for this
-	 * target.  If we did, this is a signal that
-	 * the target is refusing negotiation.
+	 * We need to initiate transfer negotiations.
+	 * If our current and goal settings are identical,
+	 * we want to renegotiate due to a check condition.
 	 */
-	struct scb *scb;
-	u_int scb_index;
-	u_int last_msg;
-	int   response = 0;
+	struct	ahc_initiator_tinfo *tinfo;
+	struct	tmode_tstate *tstate;
+	struct	ahc_syncrate *rate;
+	int	dowide;
+	int	dosync;
+	int	doppr;
+	int	use_ppr;
+	u_int	period;
+	u_int	ppr_options;
+	u_int	offset;
 
-	scb_index = ahc_inb(ahc, SCB_TAG);
-	scb = &ahc->scb_data->scbarray[scb_index];
+	tinfo = ahc_fetch_transinfo(ahc, devinfo->channel, devinfo->our_scsiid,
+				    devinfo->target, &tstate);
+	dowide = tinfo->current.width != tinfo->goal.width;
+	dosync = tinfo->current.period != tinfo->goal.period;
+	doppr = tinfo->current.ppr_options != tinfo->goal.ppr_options;
 
-	/* Might be necessary */
-	last_msg = ahc_inb(ahc, LAST_MSG);
+	if (!dowide && !dosync && !doppr) {
+		dowide = tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT;
+		dosync = tinfo->goal.period != 0;
+		doppr = tinfo->goal.ppr_options != 0;
+	}
 
-	if (ahc_sent_msg(ahc, MSG_EXT_WDTR, /*full*/FALSE)) {
-		struct ahc_initiator_tinfo *tinfo;
-		struct tmode_tstate *tstate;
+	if (!dowide && !dosync && !doppr) {
+		panic("ahc_intr: AWAITING_MSG for negotiation, "
+		      "but no negotiation needed\n");	
+	}
 
-		/* note 8bit xfers */
-		printf("%s:%c:%d: refuses WIDE negotiation.  Using "
-		       "8bit transfers\n", ahc_name(ahc),
-		       devinfo->channel, devinfo->target);
-		ahc_set_width(ahc, devinfo, scb->ccb->ccb_h.path,
-			      MSG_EXT_WDTR_BUS_8_BIT,
-			      AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
-			      /*paused*/TRUE);
-		/*
-		 * No need to clear the sync rate.  If the target
-		 * did not accept the command, our syncrate is
-		 * unaffected.  If the target started the negotiation,
-		 * but rejected our response, we already cleared the
-		 * sync rate before sending our WDTR.
-		 */
-		tinfo = ahc_fetch_transinfo(ahc, devinfo->channel,
-					    devinfo->our_scsiid,
-					    devinfo->target, &tstate);
-		if (tinfo->goal.period) {
-			u_int period;
+	use_ppr = (tinfo->current.transport_version >= 3) || doppr;
+	/*
+	 * Both the PPR message and SDTR message require the
+	 * goal syncrate to be limited to what the target device
+	 * is capable of handling (based on whether an LVD->SE
+	 * expander is on the bus), so combine these two cases.
+	 * Regardless, guarantee that if we are using WDTR and SDTR
+	 * messages that WDTR comes first.
+	 */
+	if (use_ppr || (dosync && !dowide)) {
 
-			/* Start the sync negotiation */
-			period = tinfo->goal.period;
-			ahc_devlimited_syncrate(ahc, &period);
-			ahc->msgout_index = 0;
-			ahc->msgout_len = 0;
-			ahc_construct_sdtr(ahc, period, tinfo->goal.offset);
-			ahc->msgout_index = 0;
-			response = 1;
-		}
-	} else if (ahc_sent_msg(ahc, MSG_EXT_SDTR, /*full*/FALSE)) {
-		/* note asynch xfers and clear flag */
-		ahc_set_syncrate(ahc, devinfo, scb->ccb->ccb_h.path,
-				 /*syncrate*/NULL, /*period*/0,
-				 /*offset*/0,
-				 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
-				 /*paused*/TRUE);
-		printf("%s:%c:%d: refuses synchronous negotiation. "
-		       "Using asynchronous transfers\n",
-		       ahc_name(ahc),
-		       devinfo->channel, devinfo->target);
-	} else if ((scb->hscb->control & MSG_SIMPLE_Q_TAG) != 0) {
-		struct	ccb_trans_settings neg;
+		period = tinfo->goal.period;
+		ppr_options = tinfo->goal.ppr_options;
+		if (dosync)
+			ppr_options = 0;
+		rate = ahc_devlimited_syncrate(ahc, &period, &ppr_options);
+		offset = tinfo->goal.offset;
+		ahc_validate_offset(ahc, rate, &offset,
+				    tinfo->current.width);
+		if (use_ppr)
+			ahc_construct_ppr(ahc, period, offset,
+					  tinfo->goal.width, ppr_options);
+		else
+			ahc_construct_sdtr(ahc, period, offset);
+	} else {
+		ahc_construct_wdtr(ahc, tinfo->goal.width);
+	}
+}
 
-		printf("%s:%c:%d: refuses tagged commands.  Performing "
-		       "non-tagged I/O\n", ahc_name(ahc),
-		       devinfo->channel, devinfo->target);
-			
-		ahc_set_tags(ahc, devinfo, FALSE);
-		neg.flags = 0;
-		neg.valid = CCB_TRANS_TQ_VALID;
-		xpt_setup_ccb(&neg.ccb_h, scb->ccb->ccb_h.path, /*priority*/1);
-		xpt_async(AC_TRANSFER_NEG, scb->ccb->ccb_h.path, &neg);
+/*
+ * Build a synchronous negotiation message in our message
+ * buffer based on the input parameters.
+ */
+static void
+ahc_construct_sdtr(struct ahc_softc *ahc, u_int period, u_int offset)
+{
+	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
+	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR_LEN;
+	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR;
+	ahc->msgout_buf[ahc->msgout_index++] = period;
+	ahc->msgout_buf[ahc->msgout_index++] = offset;
+	ahc->msgout_len += 5;
+}
 
-		/*
-		 * Resend the identify for this CCB as the target
-		 * may believe that the selection is invalid otherwise.
-		 */
-		ahc_outb(ahc, SCB_CONTROL, ahc_inb(ahc, SCB_CONTROL)
-					  & ~MSG_SIMPLE_Q_TAG);
-	 	scb->hscb->control &= ~MSG_SIMPLE_Q_TAG;
-		scb->ccb->ccb_h.flags &= ~CAM_TAG_ACTION_VALID;
-		ahc_outb(ahc, MSG_OUT, MSG_IDENTIFYFLAG);
-		ahc_outb(ahc, SCSISIGO, ahc_inb(ahc, SCSISIGO) | ATNO);
+/*
+ * Build a wide negotiateion message in our message
+ * buffer based on the input parameters.
+ */
+static void
+ahc_construct_wdtr(struct ahc_softc *ahc, u_int bus_width)
+{
+	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
+	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_WDTR_LEN;
+	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_WDTR;
+	ahc->msgout_buf[ahc->msgout_index++] = bus_width;
+	ahc->msgout_len += 4;
+}
 
-		/*
-		 * Requeue all tagged commands for this target
-		 * currently in our posession so they can be
-		 * converted to untagged commands.
-		 */
-		ahc_search_qinfifo(ahc, SCB_TARGET(scb), SCB_CHANNEL(scb),
-				   SCB_LUN(scb), /*tag*/SCB_LIST_NULL,
-				   ROLE_INITIATOR, CAM_REQUEUE_REQ,
-				   SEARCH_COMPLETE);
-	} else {
-		/*
-		 * Otherwise, we ignore it.
-		 */
-		printf("%s:%c:%d: Message reject for %x -- ignored\n",
-		       ahc_name(ahc), devinfo->channel, devinfo->target,
-		       last_msg);
-	}
-	return (response);
+/*
+ * Build a parallel protocol request message in our message
+ * buffer based on the input parameters.
+ */
+static void
+ahc_construct_ppr(struct ahc_softc *ahc, u_int period, u_int offset,
+		  u_int bus_width, u_int ppr_options)
+{
+	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
+	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR_LEN;
+	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_PPR;
+	ahc->msgout_buf[ahc->msgout_index++] = period;
+	ahc->msgout_buf[ahc->msgout_index++] = 0;
+	ahc->msgout_buf[ahc->msgout_index++] = offset;
+	ahc->msgout_buf[ahc->msgout_index++] = bus_width;
+	ahc->msgout_buf[ahc->msgout_index++] = ppr_options;
+	ahc->msgout_len += 8;
 }
 
+/*
+ * Clear any active message state.
+ */
 static void
 ahc_clear_msg_state(struct ahc_softc *ahc)
 {
@@ -3188,8 +1943,11 @@ ahc_clear_msg_state(struct ahc_softc *ahc)
 	ahc_outb(ahc, MSG_OUT, MSG_NOOP);
 }
 
+/*
+ * Manual message loop handler.
+ */
 static void
-ahc_handle_message_phase(struct ahc_softc *ahc, struct cam_path *path)
+ahc_handle_message_phase(struct ahc_softc *ahc)
 { 
 	struct	ahc_devinfo devinfo;
 	u_int	bus_phase;
@@ -3208,7 +1966,7 @@ reswitch:
 		int msgdone;
 
 		if (ahc->msgout_len == 0)
-			panic("REQINIT interrupt with no active message");
+			panic("HOST_MSG_LOOP interrupt with no active message");
 
 		phasemis = bus_phase != P_MESGOUT;
 		if (phasemis) {
@@ -3284,7 +2042,7 @@ reswitch:
 		/* Pull the byte in without acking it */
 		ahc->msgin_buf[ahc->msgin_index] = ahc_inb(ahc, SCSIBUSL);
 
-		message_done = ahc_parse_msg(ahc, path, &devinfo);
+		message_done = ahc_parse_msg(ahc, &devinfo);
 
 		if (message_done) {
 			/*
@@ -3380,7 +2138,7 @@ reswitch:
 		 */
 		ahc_outb(ahc, SXFRCTL0, ahc_inb(ahc, SXFRCTL0) & ~SPIOEN);
 		ahc->msgin_buf[ahc->msgin_index] = ahc_inb(ahc, SCSIDATL);
-		msgdone = ahc_parse_msg(ahc, path, &devinfo);
+		msgdone = ahc_parse_msg(ahc, &devinfo);
 		if (msgdone == MSGLOOP_TERMINATED) {
 			/*
 			 * The message is *really* done in that it caused
@@ -3437,15 +2195,15 @@ reswitch:
 
 /*
  * See if we sent a particular extended message to the target.
- * If "full" is true, the target saw the full message.
- * If "full" is false, the target saw at least the first
- * byte of the message.
+ * If "full" is true, return true only if the target saw the full
+ * message.  If "full" is false, return true if the target saw at
+ * least the first byte of the message.
  */
 static int
 ahc_sent_msg(struct ahc_softc *ahc, u_int msgtype, int full)
 {
 	int found;
-	int index;
+	u_int index;
 
 	found = FALSE;
 	index = 0;
@@ -3479,9 +2237,11 @@ ahc_sent_msg(struct ahc_softc *ahc, u_int msgtype, int full)
 	return (found);
 }
 
+/*
+ * Wait for a complete incomming message, parse it, and respond accordingly.
+ */
 static int
-ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
-	      struct ahc_devinfo *devinfo)
+ahc_parse_msg(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
 {
 	struct	ahc_initiator_tinfo *tinfo;
 	struct	tmode_tstate *tstate;
@@ -3515,19 +2275,6 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 	case MSG_NOOP:
 		done = MSGLOOP_MSGCOMPLETE;
 		break;
-	case MSG_IGN_WIDE_RESIDUE:
-	{
-		/* Wait for the whole message */
-		if (ahc->msgin_index >= 1) {
-			if (ahc->msgin_buf[1] != 1
-			 || tinfo->current.width == MSG_EXT_WDTR_BUS_8_BIT) {
-				reject = TRUE;
-				done = MSGLOOP_MSGCOMPLETE;
-			} else
-				ahc_handle_ign_wide_residue(ahc, devinfo);
-		}
-		break;
-	}
 	case MSG_EXTENDED:
 	{
 		/* Wait for enough of the message to begin validation */
@@ -3538,6 +2285,7 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 		{
 			struct	 ahc_syncrate *syncrate;
 			u_int	 period;
+			u_int	 ppr_options;
 			u_int	 offset;
 			u_int	 saved_offset;
 			
@@ -3557,12 +2305,15 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 				break;
 
 			period = ahc->msgin_buf[3];
+			ppr_options = 0;
 			saved_offset = offset = ahc->msgin_buf[4];
-			syncrate = ahc_devlimited_syncrate(ahc, &period);
+			syncrate = ahc_devlimited_syncrate(ahc, &period,
+							   &ppr_options);
 			ahc_validate_offset(ahc, syncrate, &offset,
 					    targ_scsirate & WIDEXFER);
-			ahc_set_syncrate(ahc, devinfo, path,
-					 syncrate, period, offset,
+			ahc_set_syncrate(ahc, devinfo, 
+					 syncrate, period,
+					 offset, ppr_options,
 					 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
 					 /*paused*/TRUE);
 
@@ -3594,8 +2345,9 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 		}
 		case MSG_EXT_WDTR:
 		{
-			u_int	bus_width;
-			u_int	sending_reply;
+			u_int bus_width;
+			u_int saved_width;
+			u_int sending_reply;
 
 			sending_reply = FALSE;
 			if (ahc->msgin_buf[1] != MSG_EXT_WDTR_LEN) {
@@ -3614,29 +2366,23 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 				break;
 
 			bus_width = ahc->msgin_buf[3];
+			saved_width = bus_width;
+			ahc_validate_width(ahc, &bus_width);
+
 			if (ahc_sent_msg(ahc, MSG_EXT_WDTR, /*full*/TRUE)) {
 				/*
 				 * Don't send a WDTR back to the
 				 * target, since we asked first.
+				 * If the width went higher than our
+				 * request, reject it.
 				 */
-				switch (bus_width){
-				default:
-					/*
-					 * How can we do anything greater
-					 * than 16bit transfers on a 16bit
-					 * bus?
-					 */
+				if (saved_width > bus_width) {
 					reject = TRUE;
 					printf("%s: target %d requested %dBit "
 					       "transfers.  Rejecting...\n",
 					       ahc_name(ahc), devinfo->target,
 					       8 * (0x01 << bus_width));
-					/* FALLTHROUGH */
-				case MSG_EXT_WDTR_BUS_8_BIT:
-					bus_width = MSG_EXT_WDTR_BUS_8_BIT;
-					break;
-				case MSG_EXT_WDTR_BUS_16_BIT:
-					break;
+					bus_width = 0;
 				}
 			} else {
 				/*
@@ -3644,19 +2390,6 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 				 */
 				if (bootverbose)
 					printf("Sending WDTR!\n");
-				switch (bus_width) {
-				default:
-					if (ahc->features & AHC_WIDE) {
-						/* Respond Wide */
-						bus_width =
-						    MSG_EXT_WDTR_BUS_16_BIT;
-						break;
-					}
-					/* FALLTHROUGH */
-				case MSG_EXT_WDTR_BUS_8_BIT:
-					bus_width = MSG_EXT_WDTR_BUS_8_BIT;
-					break;
-				}
 				ahc->msgout_index = 0;
 				ahc->msgout_len = 0;
 				ahc_construct_wdtr(ahc, bus_width);
@@ -3664,26 +2397,29 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 				response = TRUE;
 				sending_reply = TRUE;
 			}
-			ahc_set_width(ahc, devinfo, path, bus_width,
+			ahc_set_width(ahc, devinfo, bus_width,
 				      AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
 				      /*paused*/TRUE);
-
 			/* After a wide message, we are async */
-			ahc_set_syncrate(ahc, devinfo, path,
+			ahc_set_syncrate(ahc, devinfo,
 					 /*syncrate*/NULL, /*period*/0,
-					 /*offset*/0, AHC_TRANS_ACTIVE,
-					 /*paused*/TRUE);
+					 /*offset*/0, /*ppr_options*/0,
+					 AHC_TRANS_ACTIVE, /*paused*/TRUE);
 			if (sending_reply == FALSE && reject == FALSE) {
 
+				/* XXX functionalize */
 				if (tinfo->goal.period) {
 					struct	ahc_syncrate *rate;
 					u_int	period;
+					u_int	ppr;
 					u_int	offset;
 
 					/* Start the sync negotiation */
 					period = tinfo->goal.period;
+					ppr = 0;
 					rate = ahc_devlimited_syncrate(ahc,
-								       &period);
+								       &period,
+								       &ppr);
 					offset = tinfo->goal.offset;
 					ahc_validate_offset(ahc, rate, &offset,
 							  tinfo->current.width);
@@ -3697,6 +2433,86 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 			done = MSGLOOP_MSGCOMPLETE;
 			break;
 		}
+		case MSG_EXT_PPR:
+		{
+			struct	ahc_syncrate *syncrate;
+			u_int	period;
+			u_int	offset;
+			u_int	bus_width;
+			u_int	ppr_options;
+			u_int	saved_width;
+			u_int	saved_offset;
+			u_int	saved_ppr_options;
+
+			if (ahc->msgin_buf[1] != MSG_EXT_PPR_LEN) {
+				reject = TRUE;
+				break;
+			}
+
+			/*
+			 * Wait until we have all args before validating
+			 * and acting on this message.
+			 *
+			 * Add one to MSG_EXT_PPR_LEN to account for
+			 * the extended message preamble.
+			 */
+			if (ahc->msgin_index < (MSG_EXT_PPR_LEN + 1))
+				break;
+
+			period = ahc->msgin_buf[3];
+			offset = ahc->msgin_buf[5];
+			bus_width = ahc->msgin_buf[6];
+			saved_width = bus_width;
+			ppr_options = ahc->msgin_buf[7];
+			/*
+			 * According to the spec, a DT only
+			 * period factor with no DT option
+			 * set implies async.
+			 */
+			if ((ppr_options & MSG_EXT_PPR_DT_REQ) == 0
+			 && period == 9)
+				offset = 0;
+			saved_ppr_options = ppr_options;
+			saved_offset = offset;
+
+			/*
+			 * Mask out any options we don't support
+			 * on any controller.  Transfer options are
+			 * only available if we are negotiating wide.
+			 */
+			ppr_options &= MSG_EXT_PPR_DT_REQ;
+			if (bus_width == 0)
+				ppr_options = 0;
+
+			ahc_validate_width(ahc, &bus_width);
+			syncrate = ahc_devlimited_syncrate(ahc, &period,
+							   &ppr_options);
+			ahc_validate_offset(ahc, syncrate, &offset, bus_width);
+
+			if (ahc_sent_msg(ahc, MSG_EXT_PPR, /*full*/TRUE)) {
+				/*
+				 * If we are unable to do any of the
+				 * requested options (we went too low),
+				 * then we'll have to reject the message.
+				 */
+				if (saved_width > bus_width
+				 || saved_offset != offset
+				 || saved_ppr_options != ppr_options)
+					reject = TRUE;
+			} else {
+				printf("Target Initated PPR detected!\n");
+				response = TRUE;
+			}
+			ahc_set_width(ahc, devinfo, bus_width,
+				      AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
+				      /*paused*/TRUE);
+			ahc_set_syncrate(ahc, devinfo,
+					 syncrate, period,
+					 offset, ppr_options,
+					 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
+					 /*paused*/TRUE);
+			break;
+		}
 		default:
 			/* Unknown extended message.  Reject it. */
 			reject = TRUE;
@@ -3706,7 +2522,7 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 	}
 	case MSG_BUS_DEV_RESET:
 		ahc_handle_devreset(ahc, devinfo,
-				    CAM_BDR_SENT, AC_SENT_BDR,
+				    CAM_BDR_SENT,
 				    "Bus Device Reset Received",
 				    /*verbose_level*/0);
 		restart_sequencer(ahc);
@@ -3715,6 +2531,7 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 	case MSG_ABORT_TAG:
 	case MSG_ABORT:
 	case MSG_CLEAR_QUEUE:
+#ifdef AHC_TARGET_MODE
 		/* Target mode messages */
 		if (devinfo->role != ROLE_TARGET) {
 			reject = TRUE;
@@ -3742,6 +2559,7 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 		}
 		done = MSGLOOP_MSGCOMPLETE;
 		break;
+#endif
 	case MSG_TERM_IO_PROC:
 	default:
 		reject = TRUE;
@@ -3766,6 +2584,138 @@ ahc_parse_msg(struct ahc_softc *ahc, struct cam_path *path,
 	return (done);
 }
 
+/*
+ * Process a message reject message.
+ */
+static int
+ahc_handle_msg_reject(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
+{
+	/*
+	 * What we care about here is if we had an
+	 * outstanding SDTR or WDTR message for this
+	 * target.  If we did, this is a signal that
+	 * the target is refusing negotiation.
+	 */
+	struct scb *scb;
+	struct ahc_initiator_tinfo *tinfo;
+	struct tmode_tstate *tstate;
+	u_int scb_index;
+	u_int last_msg;
+	int   response = 0;
+
+	scb_index = ahc_inb(ahc, SCB_TAG);
+	scb = &ahc->scb_data->scbarray[scb_index];
+
+	tinfo = ahc_fetch_transinfo(ahc, devinfo->channel,
+				    devinfo->our_scsiid,
+				    devinfo->target, &tstate);
+	/* Might be necessary */
+	last_msg = ahc_inb(ahc, LAST_MSG);
+
+	if (ahc_sent_msg(ahc, MSG_EXT_PPR, /*full*/FALSE)) {
+		/*
+		 * Target does not support the PPR message.
+		 * Attempt to negotiate SPI-2 style.
+		 */
+		tinfo->goal.ppr_options = 0;
+		tinfo->current.transport_version = 2;
+		tinfo->goal.transport_version = 2;
+		ahc->msgout_index = 0;
+		ahc->msgout_len = 0;
+		ahc_build_transfer_msg(ahc, devinfo);
+		ahc->msgout_index = 0;
+		response = 1;
+	} else if (ahc_sent_msg(ahc, MSG_EXT_WDTR, /*full*/FALSE)) {
+
+		/* note 8bit xfers */
+		printf("%s:%c:%d: refuses WIDE negotiation.  Using "
+		       "8bit transfers\n", ahc_name(ahc),
+		       devinfo->channel, devinfo->target);
+		ahc_set_width(ahc, devinfo, MSG_EXT_WDTR_BUS_8_BIT,
+			      AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
+			      /*paused*/TRUE);
+		/*
+		 * No need to clear the sync rate.  If the target
+		 * did not accept the command, our syncrate is
+		 * unaffected.  If the target started the negotiation,
+		 * but rejected our response, we already cleared the
+		 * sync rate before sending our WDTR.
+		 */
+		if (tinfo->goal.period) {
+
+			/* Start the sync negotiation */
+			ahc->msgout_index = 0;
+			ahc->msgout_len = 0;
+			ahc_build_transfer_msg(ahc, devinfo);
+			ahc->msgout_index = 0;
+			response = 1;
+		}
+	} else if (ahc_sent_msg(ahc, MSG_EXT_SDTR, /*full*/FALSE)) {
+		/* note asynch xfers and clear flag */
+		ahc_set_syncrate(ahc, devinfo, /*syncrate*/NULL, /*period*/0,
+				 /*offset*/0, /*ppr_options*/0,
+				 AHC_TRANS_ACTIVE|AHC_TRANS_GOAL,
+				 /*paused*/TRUE);
+		printf("%s:%c:%d: refuses synchronous negotiation. "
+		       "Using asynchronous transfers\n",
+		       ahc_name(ahc),
+		       devinfo->channel, devinfo->target);
+	} else if ((scb->hscb->control & MSG_SIMPLE_Q_TAG) != 0) {
+
+		printf("%s:%c:%d: refuses tagged commands.  Performing "
+		       "non-tagged I/O\n", ahc_name(ahc),
+		       devinfo->channel, devinfo->target);
+		ahc_set_tags(ahc, devinfo, FALSE);
+
+		/*
+		 * Resend the identify for this CCB as the target
+		 * may believe that the selection is invalid otherwise.
+		 */
+		ahc_outb(ahc, SCB_CONTROL,
+			 ahc_inb(ahc, SCB_CONTROL) & ~MSG_SIMPLE_Q_TAG);
+	 	scb->hscb->control &= ~MSG_SIMPLE_Q_TAG;
+		ahc_set_transaction_tag(scb, /*enabled*/FALSE,
+					/*type*/MSG_SIMPLE_Q_TAG);
+		ahc_outb(ahc, MSG_OUT, MSG_IDENTIFYFLAG);
+		ahc_outb(ahc, SCSISIGO, ahc_inb(ahc, SCSISIGO) | ATNO);
+
+		/*
+		 * This transaction is now at the head of
+		 * the untagged queue for this target.
+		 */
+		if ((ahc->features & AHC_SCB_BTT) == 0) {
+			struct scb_tailq *untagged_q;
+
+			untagged_q = &(ahc->untagged_queues[devinfo->target]);
+			TAILQ_INSERT_HEAD(untagged_q, scb, links.tqe);
+		}
+		ahc_busy_tcl(ahc, BUILD_TCL(scb->hscb->scsiid, devinfo->lun),
+			     scb->hscb->tag);
+
+		/*
+		 * Requeue all tagged commands for this target
+		 * currently in our posession so they can be
+		 * converted to untagged commands.
+		 */
+		ahc_search_qinfifo(ahc, SCB_GET_TARGET(ahc, scb),
+				   SCB_GET_CHANNEL(ahc, scb),
+				   SCB_GET_LUN(scb), /*tag*/SCB_LIST_NULL,
+				   ROLE_INITIATOR, CAM_REQUEUE_REQ,
+				   SEARCH_COMPLETE);
+	} else {
+		/*
+		 * Otherwise, we ignore it.
+		 */
+		printf("%s:%c:%d: Message reject for %x -- ignored\n",
+		       ahc_name(ahc), devinfo->channel, devinfo->target,
+		       last_msg);
+	}
+	return (response);
+}
+
+/*
+ * Process an ingnore wide residue message.
+ */
 static void
 ahc_handle_ign_wide_residue(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
 {
@@ -3774,8 +2724,12 @@ ahc_handle_ign_wide_residue(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
 
 	scb_index = ahc_inb(ahc, SCB_TAG);
 	scb = &ahc->scb_data->scbarray[scb_index];
+	/*
+	 * XXX Actually check data direction in the sequencer?
+	 * Perhaps add datadir to some spare bits in the hscb?
+	 */
 	if ((ahc_inb(ahc, SEQ_FLAGS) & DPHASE) == 0
-	 || (scb->ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_IN) {
+	 || ahc_get_transfer_dir(scb) != CAM_DIR_IN) {
 		/*
 		 * Ignore the message if we haven't
 		 * seen an appropriate data phase yet.
@@ -3788,10 +2742,10 @@ ahc_handle_ign_wide_residue(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
 		 * nothing.  Otherwise, subtract a byte
 		 * and update the residual count accordingly.
 		 */
-		u_int resid_sgcnt;
+		uint32_t sgptr;
 
-		resid_sgcnt = ahc_inb(ahc, SCB_RESID_SGCNT);
-		if (resid_sgcnt == 0
+		sgptr = ahc_inb(ahc, SCB_RESIDUAL_SGPTR);
+		if ((sgptr & SG_LIST_NULL) != 0
 		 && ahc_inb(ahc, DATA_COUNT_ODD) == 1) {
 			/*
 			 * If the residual occurred on the last
@@ -3800,13 +2754,18 @@ ahc_handle_ign_wide_residue(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
 			 * nothing.
 			 */
 		} else {
-			u_int data_cnt;
-			u_int data_addr;
-			u_int sg_index;
+			struct ahc_dma_seg *sg;
+			uint32_t data_cnt;
+			uint32_t data_addr;
 
-			data_cnt = (ahc_inb(ahc, SCB_RESID_DCNT + 2) << 16)
-				 | (ahc_inb(ahc, SCB_RESID_DCNT + 1) << 8)
-				 | (ahc_inb(ahc, SCB_RESID_DCNT));
+			/* Pull in the rest of the sgptr */
+			sgptr |= (ahc_inb(ahc, SCB_RESIDUAL_SGPTR + 3) << 24)
+			      | (ahc_inb(ahc, SCB_RESIDUAL_SGPTR + 2) << 16)
+			      | (ahc_inb(ahc, SCB_RESIDUAL_SGPTR + 1) << 8);
+			sgptr &= SG_PTR_MASK;
+			data_cnt = (ahc_inb(ahc, SCB_RESIDUAL_DATACNT+2) << 16)
+				 | (ahc_inb(ahc, SCB_RESIDUAL_DATACNT+1) << 8)
+				 | (ahc_inb(ahc, SCB_RESIDUAL_DATACNT));
 
 			data_addr = (ahc_inb(ahc, SHADDR + 3) << 24)
 				  | (ahc_inb(ahc, SHADDR + 2) << 16)
@@ -3816,61 +2775,80 @@ ahc_handle_ign_wide_residue(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
 			data_cnt += 1;
 			data_addr -= 1;
 
-			sg_index = scb->sg_count - resid_sgcnt;
+			sg = ahc_sg_bus_to_virt(scb, sgptr);
+			/*
+			 * The residual sg ptr points to the next S/G
+			 * to load so we must go back one.
+			 */
+			sg--;
+			if (sg != scb->sg_list
+			 && (sg->len & AHC_SG_LEN_MASK) < data_cnt) {
 
-			if (sg_index != 0
-			 && (scb->sg_list[sg_index].len < data_cnt)) {
-				u_int sg_addr;
+				sg--;
+				data_cnt = 1 | (sg->len & AHC_DMA_LAST_SEG);
+				data_addr = sg->addr
+					  + (sg->len & AHC_SG_LEN_MASK) - 1;
 
-				sg_index--;
-				data_cnt = 1;
-				data_addr = scb->sg_list[sg_index].addr
-					  + scb->sg_list[sg_index].len - 1;
-				
 				/*
-				 * The physical address base points to the
-				 * second entry as it is always used for
-				 * calculating the "next S/G pointer".
+				 * Increment sg so it points to the
+				 * "next" sg.
 				 */
-				sg_addr = scb->sg_list_phys
-					+ (sg_index* sizeof(*scb->sg_list));
-				ahc_outb(ahc, SG_NEXT + 3, sg_addr >> 24);
-				ahc_outb(ahc, SG_NEXT + 2, sg_addr >> 16);
-				ahc_outb(ahc, SG_NEXT + 1, sg_addr >> 8);
-				ahc_outb(ahc, SG_NEXT, sg_addr);
+				sg++;
+				sgptr = ahc_sg_virt_to_bus(scb, sg);
+				ahc_outb(ahc, SCB_RESIDUAL_SGPTR + 3,
+					 sgptr >> 24);
+				ahc_outb(ahc, SCB_RESIDUAL_SGPTR + 2,
+					 sgptr >> 16);
+				ahc_outb(ahc, SCB_RESIDUAL_SGPTR + 1,
+					 sgptr >> 8);
+				ahc_outb(ahc, SCB_RESIDUAL_SGPTR, sgptr);
 			}
 
-			ahc_outb(ahc, SCB_RESID_DCNT + 2, data_cnt >> 16);
-			ahc_outb(ahc, SCB_RESID_DCNT + 1, data_cnt >> 8);
-			ahc_outb(ahc, SCB_RESID_DCNT, data_cnt);
+/* XXX What about high address byte??? */
+			ahc_outb(ahc, SCB_RESIDUAL_DATACNT + 3, data_cnt >> 24);
+			ahc_outb(ahc, SCB_RESIDUAL_DATACNT + 2, data_cnt >> 16);
+			ahc_outb(ahc, SCB_RESIDUAL_DATACNT + 1, data_cnt >> 8);
+			ahc_outb(ahc, SCB_RESIDUAL_DATACNT, data_cnt);
 
-			ahc_outb(ahc, SHADDR + 3, data_addr >> 24);
-			ahc_outb(ahc, SHADDR + 2, data_addr >> 16);
-			ahc_outb(ahc, SHADDR + 1, data_addr >> 8);
-			ahc_outb(ahc, SHADDR, data_addr);
+/* XXX Perhaps better to just keep the saved address in sram */
+			if ((ahc->features & AHC_ULTRA2) != 0) {
+				ahc_outb(ahc, HADDR + 3, data_addr >> 24);
+				ahc_outb(ahc, HADDR + 2, data_addr >> 16);
+				ahc_outb(ahc, HADDR + 1, data_addr >> 8);
+				ahc_outb(ahc, HADDR, data_addr);
+				ahc_outb(ahc, DFCNTRL, PRELOADEN);
+				ahc_outb(ahc, SXFRCTL0,
+					 ahc_inb(ahc, SXFRCTL0) | CLRCHN);
+			} else {
+				ahc_outb(ahc, SHADDR + 3, data_addr >> 24);
+				ahc_outb(ahc, SHADDR + 2, data_addr >> 16);
+				ahc_outb(ahc, SHADDR + 1, data_addr >> 8);
+				ahc_outb(ahc, SHADDR, data_addr);
+			}
 		}
 	}
 }
 
+/*
+ * Handle the effects of issuing a bus device reset message.
+ */
 static void
 ahc_handle_devreset(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
-		    cam_status status, ac_code acode, char *message,
-		    int verbose_level)
+		    cam_status status, char *message, int verbose_level)
 {
-	struct cam_path *path;
-	int found;
-	int error;
+#ifdef AHC_TARGET_MODE
 	struct tmode_tstate* tstate;
 	u_int lun;
-
-	error = ahc_create_path(ahc, devinfo, &path);
+#endif
+	int found;
 
 	found = ahc_abort_scbs(ahc, devinfo->target, devinfo->channel,
 			       CAM_LUN_WILDCARD, SCB_LIST_NULL, devinfo->role,
 			       status);
 
+#ifdef AHC_TARGET_MODE
 	/*
-	 * Send an immediate notify ccb to all target more peripheral
+	 * Send an immediate notify ccb to all target mord peripheral
 	 * drivers affected by this action.
 	 */
 	tstate = ahc->enabled_targets[devinfo->our_scsiid];
@@ -3887,23 +2865,19 @@ ahc_handle_devreset(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
 			ahc_send_lstate_events(ahc, lstate);
 		}
 	}
+#endif
 
 	/*
 	 * Go back to async/narrow transfers and renegotiate.
-	 * ahc_set_width and ahc_set_syncrate can cope with NULL
-	 * paths.
 	 */
-	ahc_set_width(ahc, devinfo, path, MSG_EXT_WDTR_BUS_8_BIT,
+	ahc_set_width(ahc, devinfo, MSG_EXT_WDTR_BUS_8_BIT,
 		      AHC_TRANS_CUR, /*paused*/TRUE);
-	ahc_set_syncrate(ahc, devinfo, path, /*syncrate*/NULL,
-			 /*period*/0, /*offset*/0, AHC_TRANS_CUR,
-			 /*paused*/TRUE);
+	ahc_set_syncrate(ahc, devinfo, /*syncrate*/NULL,
+			 /*period*/0, /*offset*/0, /*ppr_options*/0,
+			 AHC_TRANS_CUR, /*paused*/TRUE);
 	
-	if (error == CAM_REQ_CMP && acode != 0)
-		xpt_async(AC_SENT_BDR, path, NULL);
-
-	if (error == CAM_REQ_CMP)
-		xpt_free_path(path);
+	ahc_send_async(ahc, devinfo->channel, devinfo->target,
+		       CAM_LUN_WILDCARD, AC_TRANSFER_NEG);
 
 	if (message != NULL
 	 && (verbose_level <= bootverbose))
@@ -3911,114 +2885,297 @@ ahc_handle_devreset(struct ahc_softc *ahc, struct ahc_devinfo *devinfo,
 		       message, devinfo->channel, devinfo->target, found);
 }
 
+#ifdef AHC_TARGET_MODE
+void
+ahc_setup_target_msgin(struct ahc_softc *ahc, struct ahc_devinfo *devinfo)
+{
+	/*              
+	 * To facilitate adding multiple messages together,
+	 * each routine should increment the index and len
+	 * variables instead of setting them explicitly.
+	 */             
+	ahc->msgout_index = 0;
+	ahc->msgout_len = 0;
+
+	if ((ahc->targ_msg_req & devinfo->target_mask) != 0)
+		ahc_build_transfer_msg(ahc, devinfo);
+	else
+		panic("ahc_intr: AWAITING target message with no message");
+
+	ahc->msgout_index = 0;
+	ahc->msg_type = MSG_TYPE_TARGET_MSGIN;
+}
+#endif
+/**************************** Initialization **********************************/
 /*
- * We have an scb which has been processed by the
- * adaptor, now we look to see how the operation
- * went.
+ * Allocate a controller structure for a new device
+ * and perform initial initializion.
  */
-static void
-ahc_done(struct ahc_softc *ahc, struct scb *scb)
+struct ahc_softc *
+ahc_alloc(void *platform_arg, char *name)
 {
-	union ccb *ccb;
+	struct  ahc_softc *ahc;
+	int	i;
 
-	CAM_DEBUG(scb->ccb->ccb_h.path, CAM_DEBUG_TRACE,
-		  ("ahc_done - scb %d\n", scb->hscb->tag));
+	ahc = malloc(sizeof(*ahc), M_DEVBUF, M_NOWAIT);
+	if (!ahc) {
+		printf("aic7xxx: cannot malloc softc!\n");
+		free(name, M_DEVBUF);
+		return NULL;
+	}
+	memset(ahc, 0, sizeof(*ahc));
+	LIST_INIT(&ahc->pending_scbs);
+	/* We don't know or unit number until the OSM sets it */
+	ahc->name = name;
+	for (i = 0; i < 16; i++)
+		TAILQ_INIT(&ahc->untagged_queues[i]);
+	if (ahc_platform_alloc(ahc, platform_arg) != 0) {
+		ahc_free(ahc);
+		ahc = NULL;
+	}
+	return (ahc);
+}
 
-	ccb = scb->ccb;
-	LIST_REMOVE(&ccb->ccb_h, sim_links.le);
+int
+ahc_softc_init(struct ahc_softc *ahc, struct ahc_probe_config *config)
+{
 
-	untimeout(ahc_timeout, (caddr_t)scb, ccb->ccb_h.timeout_ch);
+	ahc->chip = config->chip;
+	ahc->features = config->features;
+	ahc->bugs = config->bugs;
+	ahc->flags = config->flags;
+	ahc->channel = config->channel; 
+	ahc->unpause = (ahc_inb(ahc, HCNTRL) & IRQMS) | INTEN;
+	ahc->description = config->description;
+	/* The IRQMS bit is only valid on VL and EISA chips */
+	if ((ahc->chip & AHC_PCI) != 0)
+		ahc->unpause &= ~IRQMS;
+	ahc->pause = ahc->unpause | PAUSE; 
+	/* XXX The shared scb data stuff should be depricated */
+	if (ahc->scb_data == NULL) {
+		ahc->scb_data = malloc(sizeof(*ahc->scb_data),
+				       M_DEVBUF, M_NOWAIT);
+		if (ahc->scb_data == NULL)
+			return (ENOMEM);
+		memset(ahc->scb_data, 0, sizeof(*ahc->scb_data));
+	}
 
-	if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
-		bus_dmasync_op_t op;
+	return (0);
+}
 
-		if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
-			op = BUS_DMASYNC_POSTREAD;
-		else
-			op = BUS_DMASYNC_POSTWRITE;
-		bus_dmamap_sync(ahc->buffer_dmat, scb->dmamap, op);
-		bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
-	}
+void
+ahc_softc_insert(struct ahc_softc *ahc)
+{
+	struct ahc_softc *list_ahc;
 
+#ifdef AHC_SUPPORT_PCI
 	/*
-	 * Unbusy this target/channel/lun.
-	 * XXX if we are holding two commands per lun, 
-	 *     send the next command.
+	 * Second Function PCI devices need to inherit some
+	 * settings from function 0.  We assume that function 0
+	 * will always be found prior to function 1.
 	 */
-	ahc_index_busy_tcl(ahc, scb->hscb->tcl, /*unbusy*/TRUE);
+	if ((ahc->chip & AHC_BUS_MASK) == AHC_PCI
+	 && ahc_get_pci_function(ahc->dev_softc) == 1) {
+		TAILQ_FOREACH(list_ahc, &ahc_tailq, links) {
+			ahc_dev_softc_t list_pci;
+			ahc_dev_softc_t pci;
 
-	if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
-		if (ahc_ccb_status(ccb) == CAM_REQ_INPROG)
-			ccb->ccb_h.status |= CAM_REQ_CMP;
-		ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
-		ahcfreescb(ahc, scb);
-		xpt_done(ccb);
-		return;
+			list_pci = list_ahc->dev_softc;
+			pci = ahc->dev_softc;
+			if (ahc_get_pci_bus(list_pci) == ahc_get_pci_bus(pci)
+			 && ahc_get_pci_slot(list_pci) == ahc_get_pci_slot(pci)
+			 && ahc_get_pci_function(list_pci) == 0) {
+				ahc->flags &= ~AHC_BIOS_ENABLED; 
+				ahc->flags |=
+				    list_ahc->flags & AHC_BIOS_ENABLED;
+				ahc->flags &= ~AHC_CHANNEL_B_PRIMARY; 
+				ahc->flags |=
+				    list_ahc->flags & AHC_CHANNEL_B_PRIMARY;
+				break;
+			}
+		}
 	}
+#endif
 
 	/*
-	 * If the recovery SCB completes, we have to be
-	 * out of our timeout.
+	 * Insertion sort into our list of softcs.
 	 */
-	if ((scb->flags & SCB_RECOVERY_SCB) != 0) {
+	list_ahc = TAILQ_FIRST(&ahc_tailq);
+	while (list_ahc != NULL
+	    && ahc_softc_comp(list_ahc, ahc) <= 0)
+		list_ahc = TAILQ_NEXT(list_ahc, links);
+	if (list_ahc != NULL)
+		TAILQ_INSERT_BEFORE(list_ahc, ahc, links);
+	else
+		TAILQ_INSERT_TAIL(&ahc_tailq, ahc, links);
+	ahc->init_level++;
+}
 
-		struct	ccb_hdr *ccbh;
+void
+ahc_set_unit(struct ahc_softc *ahc, int unit)
+{
+	ahc->unit = unit;
+}
 
-		/*
-		 * We were able to complete the command successfully,
-		 * so reinstate the timeouts for all other pending
-		 * commands.
-		 */
-		ccbh = ahc->pending_ccbs.lh_first;
-		while (ccbh != NULL) {
-			struct scb *pending_scb;
+void
+ahc_set_name(struct ahc_softc *ahc, char *name)
+{
+	if (ahc->name != NULL)
+		free(ahc->name, M_DEVBUF);
+	ahc->name = name;
+}
 
-			pending_scb = (struct scb *)ccbh->ccb_scb_ptr;
-			ccbh->timeout_ch = 
-			    timeout(ahc_timeout, pending_scb,
-				    (ccbh->timeout * hz)/1000);
-			ccbh = LIST_NEXT(ccbh, sim_links.le);
-		}
+void
+ahc_free(struct ahc_softc *ahc)
+{
+	ahc_fini_scbdata(ahc);
+	switch (ahc->init_level) {
+	case 4:
+		ahc_shutdown(ahc);
+		TAILQ_REMOVE(&ahc_tailq, ahc, links);
+		/* FALLTHROUGH */
+	case 3:
+		ahc_dmamap_unload(ahc, ahc->shared_data_dmat,
+				  ahc->shared_data_dmamap);
+		/* FALLTHROUGH */
+	case 2:
+		ahc_dmamem_free(ahc, ahc->shared_data_dmat, ahc->qoutfifo,
+				ahc->shared_data_dmamap);
+		ahc_dmamap_destroy(ahc, ahc->shared_data_dmat,
+				   ahc->shared_data_dmamap);
+		/* FALLTHROUGH */
+	case 1:
+#ifndef __linux__
+		ahc_dma_tag_destroy(ahc, ahc->buffer_dmat);
+#endif
+		break;
+	}
 
-		/*
-		 * Ensure that we didn't put a second instance of this
-		 * SCB into the QINFIFO.
-		 */
-		ahc_search_qinfifo(ahc, SCB_TARGET(scb), SCB_CHANNEL(scb),
-				   SCB_LUN(scb), scb->hscb->tag,
-				   ROLE_INITIATOR, /*status*/0,
-				   SEARCH_REMOVE);
-		if (ahc_ccb_status(ccb) == CAM_BDR_SENT
-		 || ahc_ccb_status(ccb) == CAM_REQ_ABORTED)
-			ahcsetccbstatus(ccb, CAM_CMD_TIMEOUT);
-		xpt_print_path(ccb->ccb_h.path);
-		printf("no longer in timeout, status = %x\n",
-		       ccb->ccb_h.status);
+	ahc_platform_free(ahc);
+#if XXX
+	for () {
+		ahc_free_tstate(struct ahc_softc *ahc, u_int scsi_id,
+				char channel, int force);
 	}
+#endif
+	if (ahc->name != NULL)
+		free(ahc->name, M_DEVBUF);
+	free(ahc, M_DEVBUF);
+	return;
+}
+
+void
+ahc_shutdown(void *arg)
+{
+	struct	ahc_softc *ahc;
+	int	i;
+
+	ahc = (struct ahc_softc *)arg;
+
+	/* This will reset most registers to 0, but not all */
+	ahc_reset(ahc);
+	ahc_outb(ahc, SCSISEQ, 0);
+	ahc_outb(ahc, SXFRCTL0, 0);
+	ahc_outb(ahc, DSPCISTATUS, 0);
+
+	for (i = TARG_SCSIRATE; i < HA_274_BIOSCTRL; i++)
+		ahc_outb(ahc, i, 0);
+}
+
+/*
+ * Reset the controller and record some information about it
+ * that is only availabel just after a reset.
+ */
+int
+ahc_reset(struct ahc_softc *ahc)
+{
+	u_int	sblkctl;
+	u_int	sxfrctl1_a, sxfrctl1_b;
+	int	wait;
+	
+	/*
+	 * Preserve the value of the SXFRCTL1 register for all channels.
+	 * It contains settings that affect termination and we don't want
+	 * to disturb the integrity of the bus.
+	 */
+	pause_sequencer(ahc);
+	sxfrctl1_b = 0;
+	if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7770) {
+		u_int sblkctl;
 
-	/* Don't clobber any existing error state */
-	if (ahc_ccb_status(ccb) == CAM_REQ_INPROG) {
-		ccb->ccb_h.status |= CAM_REQ_CMP;
-	} else if ((scb->flags & SCB_SENSE) != 0) {
 		/*
-		 * We performed autosense retrieval.
-		 *
-		 * bzero the sense data before having
-		 * the drive fill it.  The SCSI spec mandates
-		 * that any untransfered data should be
-		 * assumed to be zero.  Complete the 'bounce'
-		 * of sense information through buffers accessible
-		 * via bus-space by copying it into the clients
-		 * csio.
+		 * Save channel B's settings in case this chip
+		 * is setup for TWIN channel operation.
 		 */
-		bzero(&ccb->csio.sense_data, sizeof(ccb->csio.sense_data));
-		bcopy(&ahc->scb_data->sense[scb->hscb->tag],
-		      &ccb->csio.sense_data, scb->sg_list->len);
-		scb->ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
+		sblkctl = ahc_inb(ahc, SBLKCTL);
+		ahc_outb(ahc, SBLKCTL, sblkctl | SELBUSB);
+		sxfrctl1_b = ahc_inb(ahc, SXFRCTL1);
+		ahc_outb(ahc, SBLKCTL, sblkctl & ~SELBUSB);
 	}
-	ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
-	ahcfreescb(ahc, scb);
-	xpt_done(ccb);
+	sxfrctl1_a = ahc_inb(ahc, SXFRCTL1);
+
+	ahc_outb(ahc, HCNTRL, CHIPRST | ahc->pause);
+
+	/*
+	 * Ensure that the reset has finished
+	 */
+	wait = 1000;
+	do {
+		ahc_delay(1000);
+	} while (--wait && !(ahc_inb(ahc, HCNTRL) & CHIPRSTACK));
+
+	if (wait == 0) {
+		printf("%s: WARNING - Failed chip reset!  "
+		       "Trying to initialize anyway.\n", ahc_name(ahc));
+		ahc_outb(ahc, HCNTRL, ahc->pause);
+	}
+
+	/* Determine channel configuration */
+	sblkctl = ahc_inb(ahc, SBLKCTL) & (SELBUSB|SELWIDE);
+	/* No Twin Channel PCI cards */
+	if ((ahc->chip & AHC_PCI) != 0)
+		sblkctl &= ~SELBUSB;
+	switch (sblkctl) {
+	case 0:
+		/* Single Narrow Channel */
+		break;
+	case 2:
+		/* Wide Channel */
+		ahc->features |= AHC_WIDE;
+		break;
+	case 8:
+		/* Twin Channel */
+		ahc->features |= AHC_TWIN;
+		break;
+	default:
+		printf(" Unsupported adapter type.  Ignoring\n");
+		return(-1);
+	}
+
+	/*
+	 * Reload sxfrctl1.
+	 *
+	 * We must always initialize STPWEN to 1 before we
+	 * restore the saved values.  STPWEN is initialized
+	 * to a tri-state condition which can only be cleared
+	 * by turning it on.
+	 */
+	if ((ahc->features & AHC_TWIN) != 0) {
+		u_int sblkctl;
+
+		sblkctl = ahc_inb(ahc, SBLKCTL);
+		ahc_outb(ahc, SBLKCTL, sblkctl | SELBUSB);
+		ahc_outb(ahc, SXFRCTL1, sxfrctl1_b);
+		ahc_outb(ahc, SBLKCTL, sblkctl & ~SELBUSB);
+	}
+	ahc_outb(ahc, SXFRCTL1, sxfrctl1_a);
+
+#ifdef AHC_DUMP_SEQ
+	if (ahc->init_level == 0)
+		ahc_dumpseq(ahc);
+#endif
+
+	return (0);
 }
 
 /*
@@ -4030,32 +3187,368 @@ ahc_probe_scbs(struct ahc_softc *ahc) {
 
 	for (i = 0; i < AHC_SCB_MAX; i++) {
 		ahc_outb(ahc, SCBPTR, i);
-		ahc_outb(ahc, SCB_CONTROL, i);
-		if (ahc_inb(ahc, SCB_CONTROL) != i)
+		ahc_outb(ahc, SCB_BASE, i);
+		if (ahc_inb(ahc, SCB_BASE) != i)
 			break;
 		ahc_outb(ahc, SCBPTR, 0);
-		if (ahc_inb(ahc, SCB_CONTROL) != 0)
+		if (ahc_inb(ahc, SCB_BASE) != 0)
 			break;
 	}
 	return (i);
 }
 
+void
+ahc_init_probe_config(struct ahc_probe_config *probe_config)
+{
+	probe_config->description = NULL;
+	probe_config->channel = 'A';
+	probe_config->channel_b = 'B';
+	probe_config->chip = AHC_NONE;
+	probe_config->features = AHC_FENONE;
+	probe_config->bugs = AHC_BUGNONE;
+	probe_config->flags = AHC_FNONE;
+}
+
+static void
+ahc_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 
+{
+	bus_addr_t *baddr;
+
+	baddr = (bus_addr_t *)arg;
+	*baddr = segs->ds_addr;
+}
+
+static int
+ahc_init_scbdata(struct ahc_softc *ahc)
+{
+	struct scb_data *scb_data;
+	int i;
+
+	scb_data = ahc->scb_data;
+	SLIST_INIT(&scb_data->free_scbs);
+	SLIST_INIT(&scb_data->sg_maps);
+
+	/* Allocate SCB resources */
+	scb_data->scbarray =
+	    (struct scb *)malloc(sizeof(struct scb) * AHC_SCB_MAX,
+				 M_DEVBUF, M_NOWAIT);
+	if (scb_data->scbarray == NULL)
+		return (ENOMEM);
+	memset(scb_data->scbarray, 0, sizeof(struct scb) * AHC_SCB_MAX);
+
+	/* Determine the number of hardware SCBs and initialize them */
+
+	scb_data->maxhscbs = ahc_probe_scbs(ahc);
+	/* SCB 0 heads the free list */
+	ahc_outb(ahc, FREE_SCBH, 0);
+	for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
+		ahc_outb(ahc, SCBPTR, i);
+
+		/* Clear the control byte. */
+		ahc_outb(ahc, SCB_CONTROL, 0);
+
+		/* Set the next pointer */
+		ahc_outb(ahc, SCB_NEXT, i+1);
+
+		/* Make the tag number invalid */
+		ahc_outb(ahc, SCB_TAG, SCB_LIST_NULL);
+	}
+
+	/* Make sure that the last SCB terminates the free list */
+	ahc_outb(ahc, SCBPTR, i-1);
+	ahc_outb(ahc, SCB_NEXT, SCB_LIST_NULL);
+
+	/* Ensure we clear the 0 SCB's control byte. */
+	ahc_outb(ahc, SCBPTR, 0);
+	ahc_outb(ahc, SCB_CONTROL, 0);
+
+	scb_data->maxhscbs = i;
+
+	if (ahc->scb_data->maxhscbs == 0)
+		panic("%s: No SCB space found", ahc_name(ahc));
+
+	/*
+	 * Create our DMA tags.  These tags define the kinds of device
+	 * accessible memory allocations and memory mappings we will
+	 * need to perform during normal operation.
+	 *
+	 * Unless we need to further restrict the allocation, we rely
+	 * on the restrictions of the parent dmat, hence the common
+	 * use of MAXADDR and MAXSIZE.
+	 */
+
+	/* DMA tag for our hardware scb structures */
+	if (ahc_dma_tag_create(ahc, ahc->parent_dmat, /*alignment*/1,
+			       /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
+			       /*highaddr*/BUS_SPACE_MAXADDR,
+			       /*filter*/NULL, /*filterarg*/NULL,
+			       AHC_SCB_MAX * sizeof(struct hardware_scb),
+			       /*nsegments*/1,
+			       /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
+			       /*flags*/0, &scb_data->hscb_dmat) != 0) {
+		goto error_exit;
+	}
+
+	scb_data->init_level++;
+
+	/* Allocation for our ccbs */
+	if (ahc_dmamem_alloc(ahc, scb_data->hscb_dmat,
+			     (void **)&scb_data->hscbs,
+			     BUS_DMA_NOWAIT, &scb_data->hscb_dmamap) != 0) {
+		goto error_exit;
+	}
+
+	scb_data->init_level++;
+
+	/* And permanently map them */
+	ahc_dmamap_load(ahc, scb_data->hscb_dmat, scb_data->hscb_dmamap,
+			scb_data->hscbs,
+			AHC_SCB_MAX * sizeof(struct hardware_scb),
+			ahc_dmamap_cb, &scb_data->hscb_busaddr, /*flags*/0);
+
+	scb_data->init_level++;
+
+	/* DMA tag for our sense buffers */
+	if (ahc_dma_tag_create(ahc, ahc->parent_dmat, /*alignment*/1,
+			       /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
+			       /*highaddr*/BUS_SPACE_MAXADDR,
+			       /*filter*/NULL, /*filterarg*/NULL,
+			       AHC_SCB_MAX * sizeof(struct scsi_sense_data),
+			       /*nsegments*/1,
+			       /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
+			       /*flags*/0, &scb_data->sense_dmat) != 0) {
+		goto error_exit;
+	}
+
+	scb_data->init_level++;
+
+	/* Allocate them */
+	if (ahc_dmamem_alloc(ahc, scb_data->sense_dmat,
+			     (void **)&scb_data->sense,
+			     BUS_DMA_NOWAIT, &scb_data->sense_dmamap) != 0) {
+		goto error_exit;
+	}
+
+	scb_data->init_level++;
+
+	/* And permanently map them */
+	ahc_dmamap_load(ahc, scb_data->sense_dmat, scb_data->sense_dmamap,
+			scb_data->sense,
+			AHC_SCB_MAX * sizeof(struct scsi_sense_data),
+			ahc_dmamap_cb, &scb_data->sense_busaddr, /*flags*/0);
+
+	scb_data->init_level++;
+
+	/* DMA tag for our S/G structures.  We allocate in page sized chunks */
+	if (ahc_dma_tag_create(ahc, ahc->parent_dmat, /*alignment*/1,
+			       /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
+			       /*highaddr*/BUS_SPACE_MAXADDR,
+			       /*filter*/NULL, /*filterarg*/NULL,
+			       PAGE_SIZE, /*nsegments*/1,
+			       /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
+			       /*flags*/0, &scb_data->sg_dmat) != 0) {
+		goto error_exit;
+	}
+
+	scb_data->init_level++;
+
+	/* Perform initial CCB allocation */
+	memset(scb_data->hscbs, 0, AHC_SCB_MAX * sizeof(struct hardware_scb));
+	ahc_alloc_scbs(ahc);
+
+	if (scb_data->numscbs == 0) {
+		printf("%s: ahc_init_scbdata - "
+		       "Unable to allocate initial scbs\n",
+		       ahc_name(ahc));
+		goto error_exit;
+	}
+
+	/*
+	 * Note that we were successfull
+	 */
+	return (0); 
+
+error_exit:
+
+	return (ENOMEM);
+}
+
+static void
+ahc_fini_scbdata(struct ahc_softc *ahc)
+{
+	struct scb_data *scb_data;
+
+	scb_data = ahc->scb_data;
+
+	switch (scb_data->init_level) {
+	default:
+	case 7:
+	{
+		struct sg_map_node *sg_map;
+
+		while ((sg_map = SLIST_FIRST(&scb_data->sg_maps))!= NULL) {
+			SLIST_REMOVE_HEAD(&scb_data->sg_maps, links);
+			ahc_dmamap_unload(ahc, scb_data->sg_dmat,
+					  sg_map->sg_dmamap);
+			ahc_dmamem_free(ahc, scb_data->sg_dmat,
+					sg_map->sg_vaddr,
+					sg_map->sg_dmamap);
+			free(sg_map, M_DEVBUF);
+		}
+		ahc_dma_tag_destroy(ahc, scb_data->sg_dmat);
+	}
+	case 6:
+		ahc_dmamap_unload(ahc, scb_data->sense_dmat,
+				  scb_data->sense_dmamap);
+	case 5:
+		ahc_dmamem_free(ahc, scb_data->sense_dmat, scb_data->sense,
+				scb_data->sense_dmamap);
+		ahc_dmamap_destroy(ahc, scb_data->sense_dmat,
+				   scb_data->sense_dmamap);
+	case 4:
+		ahc_dma_tag_destroy(ahc, scb_data->sense_dmat);
+	case 3:
+		ahc_dmamap_unload(ahc, scb_data->hscb_dmat,
+				  scb_data->hscb_dmamap);
+	case 2:
+		ahc_dmamem_free(ahc, scb_data->hscb_dmat, scb_data->hscbs,
+				scb_data->hscb_dmamap);
+		ahc_dmamap_destroy(ahc, scb_data->hscb_dmat,
+				   scb_data->hscb_dmamap);
+	case 1:
+		ahc_dma_tag_destroy(ahc, scb_data->hscb_dmat);
+		break;
+	}
+	if (scb_data->scbarray != NULL)
+		free(scb_data->scbarray, M_DEVBUF);
+}
+
+void
+ahc_alloc_scbs(struct ahc_softc *ahc)
+{
+	struct scb_data *scb_data;
+	struct scb *next_scb;
+	struct sg_map_node *sg_map;
+	bus_addr_t physaddr;
+	struct ahc_dma_seg *segs;
+	int newcount;
+	int i;
+
+	scb_data = ahc->scb_data;
+	if (scb_data->numscbs >= AHC_SCB_MAX)
+		/* Can't allocate any more */
+		return;
+
+	next_scb = &scb_data->scbarray[scb_data->numscbs];
+
+	sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT);
+
+	if (sg_map == NULL)
+		return;
+
+	/* Allocate S/G space for the next batch of SCBS */
+	if (ahc_dmamem_alloc(ahc, scb_data->sg_dmat,
+			     (void **)&sg_map->sg_vaddr,
+			     BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
+		free(sg_map, M_DEVBUF);
+		return;
+	}
+
+	SLIST_INSERT_HEAD(&scb_data->sg_maps, sg_map, links);
+
+	ahc_dmamap_load(ahc, scb_data->sg_dmat, sg_map->sg_dmamap,
+			sg_map->sg_vaddr, PAGE_SIZE, ahc_dmamap_cb,
+			&sg_map->sg_physaddr, /*flags*/0);
+
+	segs = sg_map->sg_vaddr;
+	physaddr = sg_map->sg_physaddr;
+
+	newcount = (PAGE_SIZE / (AHC_NSEG * sizeof(struct ahc_dma_seg)));
+	for (i = 0; scb_data->numscbs < AHC_SCB_MAX && i < newcount; i++) {
+		struct scb_platform_data *pdata;
+#ifndef __linux__
+		int error;
+#endif
+		pdata = (struct scb_platform_data *)malloc(sizeof(*pdata),
+							   M_DEVBUF, M_NOWAIT);
+		if (pdata == NULL)
+			break;
+		next_scb->platform_data = pdata;
+		next_scb->sg_list = segs;
+		/*
+		 * The sequencer always starts with the second entry.
+		 * The first entry is embedded in the scb.
+		 */
+		next_scb->sg_list_phys = physaddr + sizeof(struct ahc_dma_seg);
+		next_scb->flags = SCB_FREE;
+#ifndef __linux__
+		error = ahc_dmamap_create(ahc, ahc->buffer_dmat, /*flags*/0,
+					  &next_scb->dmamap);
+		if (error != 0)
+			break;
+#endif
+		next_scb->hscb = &scb_data->hscbs[scb_data->numscbs];
+		next_scb->hscb->tag = ahc->scb_data->numscbs;
+		next_scb->cdb32_busaddr = 
+		    ahc_hscb_busaddr(ahc, next_scb->hscb->tag)
+		  + offsetof(struct hardware_scb, cdb32);	
+		SLIST_INSERT_HEAD(&ahc->scb_data->free_scbs,
+				  next_scb, links.sle);
+		segs += AHC_NSEG;
+		physaddr += (AHC_NSEG * sizeof(struct ahc_dma_seg));
+		next_scb++;
+		ahc->scb_data->numscbs++;
+	}
+}
+
+void
+ahc_controller_info(struct ahc_softc *ahc, char *buf)
+{
+	int len;
+
+	len = sprintf(buf, "%s: ", ahc_chip_names[ahc->chip & AHC_CHIPID_MASK]);
+	buf += len;
+	if ((ahc->features & AHC_TWIN) != 0)
+ 		len = sprintf(buf, "Twin Channel, A SCSI Id=%d, "
+			      "B SCSI Id=%d, primary %c, ",
+			      ahc->our_id, ahc->our_id_b,
+			      ahc->flags & AHC_CHANNEL_B_PRIMARY ? 'B': 'A');
+	else {
+		const char *type;
+
+		if ((ahc->features & AHC_WIDE) != 0) {
+			type = "Wide";
+		} else {
+			type = "Single";
+		}
+		len = sprintf(buf, "%s Channel %c, SCSI Id=%d, ",
+			      type, ahc->channel, ahc->our_id);
+	}
+	buf += len;
+
+	if (ahc->flags & AHC_PAGESCBS)
+		sprintf(buf, "%d/%d SCBs",
+			ahc->scb_data->maxhscbs, AHC_SCB_MAX);
+	else
+		sprintf(buf, "%d SCBs", ahc->scb_data->maxhscbs);
+}
+
 /*
  * Start the board, ready for normal operation
  */
 int
 ahc_init(struct ahc_softc *ahc)
 {
-	int	  max_targ = 15;
-	int	  i;
-	int	  term;
-	u_int	  scsi_conf;
-	u_int	  scsiseq_template;
-	u_int	  ultraenb;
-	u_int	  discenable;
-	u_int	  tagenable;
-	size_t	  driver_data_size;
-	u_int32_t physaddr;
+	int	 max_targ;
+	int	 i;
+	int	 term;
+	u_int	 scsi_conf;
+	u_int	 scsiseq_template;
+	u_int	 ultraenb;
+	u_int	 discenable;
+	u_int	 tagenable;
+	size_t	 driver_data_size;
+	uint32_t physaddr;
 
 #ifdef AHC_PRINT_SRAM
 	printf("Scratch Ram:");
@@ -4075,6 +3568,7 @@ ahc_init(struct ahc_softc *ahc)
 	}
 	printf ("\n");
 #endif
+	max_targ = 15;
 
 	/*
 	 * Assume we have a board at this stage and it has been reset.
@@ -4087,12 +3581,7 @@ ahc_init(struct ahc_softc *ahc)
 	 */
 	ahc->flags |= AHC_INITIATORMODE;
 
-	/*
-	 * XXX Would be better to use a per device flag, but PCI and EISA
-	 *     devices don't have them yet.
-	 */
-	if ((AHC_TMODE_ENABLE & (0x01 << ahc->unit)) != 0) {
-		ahc->flags |= AHC_TARGETMODE;
+	if ((ahc->flags & AHC_TARGETMODE) != 0) {
 		/*
 		 * Although we have space for both the initiator and
 		 * target roles on ULTRA2 chips, we currently disable
@@ -4105,9 +3594,10 @@ ahc_init(struct ahc_softc *ahc)
 		ahc->flags &= ~AHC_INITIATORMODE;
 	}
 
+#ifndef __linux__
 	/* DMA tag for mapping buffers into device visible space. */
-	if (bus_dma_tag_create(ahc->parent_dmat, /*alignment*/1, /*boundary*/0,
-			       /*lowaddr*/BUS_SPACE_MAXADDR,
+	if (ahc_dma_tag_create(ahc, ahc->parent_dmat, /*alignment*/1,
+			       /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
 			       /*highaddr*/BUS_SPACE_MAXADDR,
 			       /*filter*/NULL, /*filterarg*/NULL,
 			       /*maxsize*/MAXBSIZE, /*nsegments*/AHC_NSEG,
@@ -4116,24 +3606,25 @@ ahc_init(struct ahc_softc *ahc)
 			       &ahc->buffer_dmat) != 0) {
 		return (ENOMEM);
 	}
+#endif
 
 	ahc->init_level++;
 
 	/*
 	 * DMA tag for our command fifos and other data in system memory
 	 * the card's sequencer must be able to access.  For initiator
-	 * roles, we need to allocate space for the qinfifo, qoutfifo,
-	 * and untagged_scb arrays each of which are composed of 256
-	 * 1 byte elements.  When providing for the target mode role,
-	 * we additionally must provide space for the incoming target
-	 * command fifo.
+	 * roles, we need to allocate space for the the qinfifo and qoutfifo.
+	 * The qinfifo and qoutfifo are composed of 256 1 byte elements. 
+	 * When providing for the target mode role, we must additionally
+	 * provide space for the incoming target command fifo and an extra
+	 * byte to deal with a dma bug in some chip versions.
 	 */
-	driver_data_size = 3 * 256 * sizeof(u_int8_t);
+	driver_data_size = 2 * 256 * sizeof(uint8_t);
 	if ((ahc->flags & AHC_TARGETMODE) != 0)
 		driver_data_size += AHC_TMODE_CMDS * sizeof(struct target_cmd)
 				 + /*DMA WideOdd Bug Buffer*/1;
-	if (bus_dma_tag_create(ahc->parent_dmat, /*alignment*/1, /*boundary*/0,
-			       /*lowaddr*/BUS_SPACE_MAXADDR,
+	if (ahc_dma_tag_create(ahc, ahc->parent_dmat, /*alignment*/1,
+			       /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
 			       /*highaddr*/BUS_SPACE_MAXADDR,
 			       /*filter*/NULL, /*filterarg*/NULL,
 			       driver_data_size,
@@ -4146,43 +3637,22 @@ ahc_init(struct ahc_softc *ahc)
 	ahc->init_level++;
 
 	/* Allocation of driver data */
-	if (bus_dmamem_alloc(ahc->shared_data_dmat, (void **)&ahc->qoutfifo,
+	if (ahc_dmamem_alloc(ahc, ahc->shared_data_dmat,
+			     (void **)&ahc->qoutfifo,
 			     BUS_DMA_NOWAIT, &ahc->shared_data_dmamap) != 0) {
 		return (ENOMEM);
 	}
 
 	ahc->init_level++;
 
-        /* And permanently map it in */
-	bus_dmamap_load(ahc->shared_data_dmat, ahc->shared_data_dmamap,
-			ahc->qoutfifo, driver_data_size,
-			ahcdmamapcb, &ahc->shared_data_busaddr, /*flags*/0);
-
-	ahc->init_level++;
-
-	/* Allocate SCB data now that buffer_dmat is initialized */
-	if (ahc->scb_data->maxhscbs == 0)
-		if (ahcinitscbdata(ahc) != 0)
-			return (ENOMEM);
-
-	ahc->qinfifo = &ahc->qoutfifo[256];
-	ahc->untagged_scbs = &ahc->qinfifo[256];
-	/* There are no untagged SCBs active yet. */
-	for (i = 0; i < 256; i++)
-		ahc->untagged_scbs[i] = SCB_LIST_NULL;
-
-	/* All of our queues are empty */
-	for (i = 0; i < 256; i++)
-		ahc->qoutfifo[i] = SCB_LIST_NULL;
-
-	if ((ahc->features & AHC_MULTI_TID) != 0) {
-		ahc_outb(ahc, TARGID, 0);
-		ahc_outb(ahc, TARGID + 1, 0);
-	}
+	/* And permanently map it in */
+	ahc_dmamap_load(ahc, ahc->shared_data_dmat, ahc->shared_data_dmamap,
+			ahc->qoutfifo, driver_data_size, ahc_dmamap_cb,
+			&ahc->shared_data_busaddr, /*flags*/0);
 
 	if ((ahc->flags & AHC_TARGETMODE) != 0) {
-
-		ahc->targetcmds = (struct target_cmd *)&ahc->untagged_scbs[256];
+		ahc->targetcmds = (struct target_cmd *)ahc->qoutfifo;
+		ahc->qoutfifo = (uint8_t *)&ahc->targetcmds[256];
 		ahc->dma_bug_buf = ahc->shared_data_busaddr
 				 + driver_data_size - 1;
 		/* All target command blocks start out invalid. */
@@ -4191,7 +3661,16 @@ ahc_init(struct ahc_softc *ahc)
 		ahc->tqinfifonext = 1;
 		ahc_outb(ahc, KERNEL_TQINPOS, ahc->tqinfifonext - 1);
 		ahc_outb(ahc, TQINPOS, ahc->tqinfifonext);
+		ahc->qoutfifo = (uint8_t *)&ahc->targetcmds[256];
 	}
+	ahc->qinfifo = &ahc->qoutfifo[256];
+
+	ahc->init_level++;
+
+	/* Allocate SCB data now that buffer_dmat is initialized */
+	if (ahc->scb_data->maxhscbs == 0)
+		if (ahc_init_scbdata(ahc) != 0)
+			return (ENOMEM);
 
 	/*
 	 * Allocate a tstate to house information for our
@@ -4210,26 +3689,14 @@ ahc_init(struct ahc_softc *ahc)
 			       "Failing attach\n", ahc_name(ahc));
 			return (-1);
 		}
- 		printf("Twin Channel, A SCSI Id=%d, B SCSI Id=%d, primary %c, ",
-		       ahc->our_id, ahc->our_id_b,
-		       ahc->flags & AHC_CHANNEL_B_PRIMARY? 'B': 'A');
-	} else {
-		if ((ahc->features & AHC_WIDE) != 0) {
-			printf("Wide ");
-		} else {
-			printf("Single ");
-		}
-		printf("Channel %c, SCSI Id=%d, ", ahc->channel, ahc->our_id);
 	}
 
 	ahc_outb(ahc, SEQ_FLAGS, 0);
 
 	if (ahc->scb_data->maxhscbs < AHC_SCB_MAX) {
 		ahc->flags |= AHC_PAGESCBS;
-		printf("%d/%d SCBs\n", ahc->scb_data->maxhscbs, AHC_SCB_MAX);
 	} else {
 		ahc->flags &= ~AHC_PAGESCBS;
-		printf("%d SCBs\n", ahc->scb_data->maxhscbs);
 	}
 
 #ifdef AHC_DEBUG
@@ -4237,7 +3704,7 @@ ahc_init(struct ahc_softc *ahc)
 		printf("%s: hardware scb %d bytes; kernel scb %d bytes; "
 		       "ahc_dma %d bytes\n",
 			ahc_name(ahc),
-		        sizeof(struct hardware_scb),
+			sizeof(struct hardware_scb),
 			sizeof(struct scb),
 			sizeof(struct ahc_dma_seg));
 	}
@@ -4250,11 +3717,9 @@ ahc_init(struct ahc_softc *ahc)
 		 * The device is gated to channel B after a chip reset,
 		 * so set those values first
 		 */
+		ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) | SELBUSB);
 		term = (ahc->flags & AHC_TERM_ENB_B) != 0 ? STPWEN : 0;
-		if ((ahc->features & AHC_ULTRA2) != 0)
-			ahc_outb(ahc, SCSIID_ULTRA2, ahc->our_id_b);
-		else
-			ahc_outb(ahc, SCSIID, ahc->our_id_b);
+		ahc_outb(ahc, SCSIID, ahc->our_id_b);
 		scsi_conf = ahc_inb(ahc, SCSICONF + 1);
 		ahc_outb(ahc, SXFRCTL1, (scsi_conf & (ENSPCHK|STIMESEL))
 					|term|ENSTIMER|ACTNEGEN);
@@ -4329,7 +3794,7 @@ ahc_init(struct ahc_softc *ahc)
 		tinfo = ahc_fetch_transinfo(ahc, channel, our_id,
 					    target_id, &tstate);
 		/* Default to async narrow across the board */
-		bzero(tinfo, sizeof(*tinfo));
+		memset(tinfo, 0, sizeof(*tinfo));
 		if (ahc->flags & AHC_USEDEFAULTS) {
 			if ((ahc->features & AHC_WIDE) != 0)
 				tinfo->user.width = MSG_EXT_WDTR_BUS_16_BIT;
@@ -4342,7 +3807,7 @@ ahc_init(struct ahc_softc *ahc)
 			tinfo->user.offset = ~0;
 		} else {
 			u_int scsirate;
-			u_int16_t mask;
+			uint16_t mask;
 
 			/* Take the settings leftover in scratch RAM. */
 			scsirate = ahc_inb(ahc, TARG_SCSIRATE + i);
@@ -4372,6 +3837,10 @@ ahc_init(struct ahc_softc *ahc)
 					tinfo->user.period = 0;
 				else
 					tinfo->user.offset = ~0;
+				if ((scsirate & SXFR_ULTRA2) <= 8/*10MHz*/
+				 && (ahc->features & AHC_DT) != 0)
+					tinfo->user.ppr_options =
+					    MSG_EXT_PPR_DT_REQ;
 			} else if ((scsirate & SOFS) != 0) {
 				tinfo->user.period = 
 				    ahc_find_period(ahc, scsirate,
@@ -4384,6 +3853,15 @@ ahc_init(struct ahc_softc *ahc)
 			if ((scsirate & WIDEXFER) != 0
 			 && (ahc->features & AHC_WIDE) != 0)
 				tinfo->user.width = MSG_EXT_WDTR_BUS_16_BIT;
+			tinfo->user.protocol_version = 4;
+			if ((ahc->features & AHC_DT) != 0)
+				tinfo->user.transport_version = 3;
+			else
+				tinfo->user.transport_version = 2;
+			tinfo->goal.protocol_version = 2;
+			tinfo->goal.transport_version = 2;
+			tinfo->current.protocol_version = 2;
+			tinfo->current.transport_version = 2;
 		}
 		tstate->ultraenb = ultraenb;
 		tstate->discenable = discenable;
@@ -4392,6 +3870,36 @@ ahc_init(struct ahc_softc *ahc)
 	ahc->user_discenable = discenable;
 	ahc->user_tagenable = tagenable;
 
+	/* There are no untagged SCBs active yet. */
+	for (i = 0; i < 16; i++) {
+		ahc_index_busy_tcl(ahc, BUILD_TCL(i << 4, 0), /*unbusy*/TRUE);
+		if ((ahc->features & AHC_SCB_BTT) != 0) {
+			int lun;
+
+			/*
+			 * The SCB based BTT allows an entry per
+			 * target and lun pair.
+			 */
+			for (lun = 1; lun < AHC_NUM_LUNS; lun++) {
+				ahc_index_busy_tcl(ahc,
+						   BUILD_TCL(i << 4, lun),
+						   /*unbusy*/TRUE);
+			}
+		}
+	}
+
+	/* All of our queues are empty */
+	for (i = 0; i < 256; i++)
+		ahc->qoutfifo[i] = SCB_LIST_NULL;
+
+	for (i = 0; i < 256; i++)
+		ahc->qinfifo[i] = SCB_LIST_NULL;
+
+	if ((ahc->features & AHC_MULTI_TID) != 0) {
+		ahc_outb(ahc, TARGID, 0);
+		ahc_outb(ahc, TARGID + 1, 0);
+	}
+
 	/*
 	 * Tell the sequencer where it can find our arrays in memory.
 	 */
@@ -4402,17 +3910,10 @@ ahc_init(struct ahc_softc *ahc)
 	ahc_outb(ahc, HSCB_ADDR + 3, (physaddr >> 24) & 0xFF);
 
 	physaddr = ahc->shared_data_busaddr;
-	ahc_outb(ahc, SCBID_ADDR, physaddr & 0xFF);
-	ahc_outb(ahc, SCBID_ADDR + 1, (physaddr >> 8) & 0xFF);
-	ahc_outb(ahc, SCBID_ADDR + 2, (physaddr >> 16) & 0xFF);
-	ahc_outb(ahc, SCBID_ADDR + 3, (physaddr >> 24) & 0xFF);
-
-	/* Target mode incomding command fifo */
-	physaddr += 3 * 256 * sizeof(u_int8_t);
-	ahc_outb(ahc, TMODE_CMDADDR, physaddr & 0xFF);
-	ahc_outb(ahc, TMODE_CMDADDR + 1, (physaddr >> 8) & 0xFF);
-	ahc_outb(ahc, TMODE_CMDADDR + 2, (physaddr >> 16) & 0xFF);
-	ahc_outb(ahc, TMODE_CMDADDR + 3, (physaddr >> 24) & 0xFF);
+	ahc_outb(ahc, SHARED_DATA_ADDR, physaddr & 0xFF);
+	ahc_outb(ahc, SHARED_DATA_ADDR + 1, (physaddr >> 8) & 0xFF);
+	ahc_outb(ahc, SHARED_DATA_ADDR + 2, (physaddr >> 16) & 0xFF);
+	ahc_outb(ahc, SHARED_DATA_ADDR + 3, (physaddr >> 24) & 0xFF);
 
 	/*
 	 * Initialize the group code to command length table.
@@ -4471,1465 +3972,163 @@ ahc_init(struct ahc_softc *ahc)
 	/*
 	 * Load the Sequencer program and Enable the adapter
 	 * in "fast" mode.
-         */
+	 */
 	if (bootverbose)
 		printf("%s: Downloading Sequencer Program...",
 		       ahc_name(ahc));
 
 	ahc_loadseq(ahc);
 
-	/* We have to wait until after any system dumps... */
-	EVENTHANDLER_REGISTER(shutdown_final, ahc_shutdown,
-			      ahc, SHUTDOWN_PRI_DEFAULT);
-
-	return (0);
-}
-
-static cam_status
-ahc_find_tmode_devs(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb,
-		    struct tmode_tstate **tstate, struct tmode_lstate **lstate,
-		    int notfound_failure)
-{
-	int our_id;
-
-	/*
-	 * If we are not configured for target mode, someone
-	 * is really confused to be sending this to us.
-	 */
-	if ((ahc->flags & AHC_TARGETMODE) == 0)
-		return (CAM_REQ_INVALID);
-
-	/* Range check target and lun */
-
-	/*
-	 * Handle the 'black hole' device that sucks up
-	 * requests to unattached luns on enabled targets.
-	 */
-	if (ccb->ccb_h.target_id == CAM_TARGET_WILDCARD
-	 && ccb->ccb_h.target_lun == CAM_LUN_WILDCARD) {
-		*tstate = NULL;
-		*lstate = ahc->black_hole;
-	} else {
-		u_int max_id;
-
-		if (cam_sim_bus(sim) == 0)
-			our_id = ahc->our_id;
-		else
-			our_id = ahc->our_id_b;
-
-		max_id = (ahc->features & AHC_WIDE) ? 15 : 7;
-		if (ccb->ccb_h.target_id > max_id)
-			return (CAM_TID_INVALID);
-
-		if (ccb->ccb_h.target_lun > 7)
-			return (CAM_LUN_INVALID);
-
-		if (ccb->ccb_h.target_id != our_id) {
-			if ((ahc->features & AHC_MULTI_TID) != 0) {
-				/*
-				 * Only allow additional targets if
-				 * the initiator role is disabled.
-				 * The hardware cannot handle a re-select-in
-				 * on the initiator id during a re-select-out
-				 * on a different target id.
-				 */
-			   	if ((ahc->flags & AHC_INITIATORMODE) != 0)
-					return (CAM_TID_INVALID);
-			} else {
-				/*
-				 * Only allow our target id to change
-				 * if the initiator role is not configured
-				 * and there are no enabled luns which
-				 * are attached to the currently registered
-				 * scsi id.
-				 */
-			   	if ((ahc->flags & AHC_INITIATORMODE) != 0
-				 || ahc->enabled_luns > 0)
-					return (CAM_TID_INVALID);
-			}
-		}
-
-		*tstate = ahc->enabled_targets[ccb->ccb_h.target_id];
-		*lstate = NULL;
-		if (*tstate != NULL)
-			*lstate =
-			    (*tstate)->enabled_luns[ccb->ccb_h.target_lun];
-	}
-
-	if (notfound_failure != 0 && *lstate == NULL)
-		return (CAM_PATH_INVALID);
-
-	return (CAM_REQ_CMP);
-}
-
-static void
-ahc_action(struct cam_sim *sim, union ccb *ccb)
-{
-	struct	ahc_softc *ahc;
-	struct	tmode_lstate *lstate;
-	u_int	target_id;
-	u_int	our_id;
-	int	s;
-
-	CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahc_action\n"));
-	
-	ahc = (struct ahc_softc *)cam_sim_softc(sim);
-
-	target_id = ccb->ccb_h.target_id;
-	our_id = SIM_SCSI_ID(ahc, sim);
-	
-	switch (ccb->ccb_h.func_code) {
-	/* Common cases first */
-	case XPT_ACCEPT_TARGET_IO:	/* Accept Host Target Mode CDB */
-	case XPT_CONT_TARGET_IO:/* Continue Host Target I/O Connection*/
-	{
-		struct	   tmode_tstate *tstate;
-		cam_status status;
-
-		status = ahc_find_tmode_devs(ahc, sim, ccb, &tstate,
-					     &lstate, TRUE);
-
-		if (status != CAM_REQ_CMP) {
-			if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
-				/* Response from the black hole device */
-				tstate = NULL;
-				lstate = ahc->black_hole;
-			} else {
-				ccb->ccb_h.status = status;
-				xpt_done(ccb);
-				break;
-			}
-		}
-		if (ccb->ccb_h.func_code == XPT_ACCEPT_TARGET_IO) {
-			int s;
-
-			s = splcam();
-			SLIST_INSERT_HEAD(&lstate->accept_tios, &ccb->ccb_h,
-					  sim_links.sle);
-			ccb->ccb_h.status = CAM_REQ_INPROG;
-			if ((ahc->flags & AHC_TQINFIFO_BLOCKED) != 0)
-				ahc_run_tqinfifo(ahc, /*paused*/FALSE);
-			splx(s);
-			break;
-		}
-
-		/*
-		 * The target_id represents the target we attempt to
-		 * select.  In target mode, this is the initiator of
-		 * the original command.
-		 */
-		our_id = target_id;
-		target_id = ccb->csio.init_id;
-		/* FALLTHROUGH */
-	}
-	case XPT_SCSI_IO:	/* Execute the requested I/O operation */
-	case XPT_RESET_DEV:	/* Bus Device Reset the specified SCSI device */
-	{
-		struct	   scb *scb;
-		struct	   hardware_scb *hscb;	
-		struct	   ahc_initiator_tinfo *tinfo;
-		struct	   tmode_tstate *tstate;
-		u_int16_t  mask;
-
-		/*
-		 * get an scb to use.
-		 */
-		if ((scb = ahcgetscb(ahc)) == NULL) {
-			int s;
-	
-			s = splcam();
-			ahc->flags |= AHC_RESOURCE_SHORTAGE;
-			splx(s);
-			xpt_freeze_simq(ahc->sim, /*count*/1);
-			ahcsetccbstatus(ccb, CAM_REQUEUE_REQ);
-			xpt_done(ccb);
-			return;
-		}
-		
-		hscb = scb->hscb;
-		
-		CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_SUBTRACE,
-			  ("start scb(%p)\n", scb));
-		scb->ccb = ccb;
-		/*
-		 * So we can find the SCB when an abort is requested
-		 */
-		ccb->ccb_h.ccb_scb_ptr = scb;
-		ccb->ccb_h.ccb_ahc_ptr = ahc;
-
-		/*
-		 * Put all the arguments for the xfer in the scb
-		 */
-		hscb->tcl = ((target_id << 4) & 0xF0)
-			| (SIM_IS_SCSIBUS_B(ahc, sim) ? SELBUSB : 0)
-			| (ccb->ccb_h.target_lun & 0x07);
-
-		mask = SCB_TARGET_MASK(scb);
-		tinfo = ahc_fetch_transinfo(ahc, SIM_CHANNEL(ahc, sim), our_id,
-					    target_id, &tstate);
-
-		hscb->scsirate = tinfo->scsirate;
-		hscb->scsioffset = tinfo->current.offset;
-		if ((tstate->ultraenb & mask) != 0)
-			hscb->control |= ULTRAENB;
-		
-		if ((tstate->discenable & mask) != 0
-		 && (ccb->ccb_h.flags & CAM_DIS_DISCONNECT) == 0)
-			hscb->control |= DISCENB;
-		
-		if (ccb->ccb_h.func_code == XPT_RESET_DEV) {
-			hscb->cmdpointer = NULL;
-			scb->flags |= SCB_DEVICE_RESET;
-			hscb->control |= MK_MESSAGE;
-			ahc_execute_scb(scb, NULL, 0, 0);
-		} else {
-			if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
-				if (ahc->pending_device == lstate) {
-					scb->flags |= SCB_TARGET_IMMEDIATE;
-					ahc->pending_device = NULL;
-				}
-				hscb->control |= TARGET_SCB;
-				hscb->cmdpointer = IDENTIFY_SEEN;
-				if ((ccb->ccb_h.flags & CAM_SEND_STATUS) != 0) {
-					hscb->cmdpointer |= SPHASE_PENDING;
-					hscb->status = ccb->csio.scsi_status;
-				}
-
-				/* Overloaded with tag ID */
-				hscb->cmdlen = ccb->csio.tag_id;
-				/*
-				 * Overloaded with the value to place
-				 * in SCSIID for reselection.
-				 */
-				hscb->cmdpointer |=
-					(our_id|(hscb->tcl & 0xF0)) << 16;
-			}
-			if (ccb->ccb_h.flags & CAM_TAG_ACTION_VALID)
-				hscb->control |= ccb->csio.tag_action;
-			
-			ahc_setup_data(ahc, &ccb->csio, scb);
-		}
-		break;
-	}
-	case XPT_NOTIFY_ACK:
-	case XPT_IMMED_NOTIFY:
-	{
-		struct	   tmode_tstate *tstate;
-		struct	   tmode_lstate *lstate;
-		cam_status status;
-
-		status = ahc_find_tmode_devs(ahc, sim, ccb, &tstate,
-					     &lstate, TRUE);
-
-		if (status != CAM_REQ_CMP) {
-			ccb->ccb_h.status = status;
-			xpt_done(ccb);
-			break;
-		}
-		SLIST_INSERT_HEAD(&lstate->immed_notifies, &ccb->ccb_h,
-				  sim_links.sle);
-		ccb->ccb_h.status = CAM_REQ_INPROG;
-		ahc_send_lstate_events(ahc, lstate);
-		break;
-	}
-	case XPT_EN_LUN:		/* Enable LUN as a target */
-		ahc_handle_en_lun(ahc, sim, ccb);
-		xpt_done(ccb);
-		break;
-	case XPT_ABORT:			/* Abort the specified CCB */
-	{
-		ahc_abort_ccb(ahc, sim, ccb);
-		break;
-	}
-	case XPT_SET_TRAN_SETTINGS:
-	{
-		struct	ahc_devinfo devinfo;
-		struct	ccb_trans_settings *cts;
-		struct	ahc_initiator_tinfo *tinfo;
-		struct	tmode_tstate *tstate;
-		u_int16_t *discenable;
-		u_int16_t *tagenable;
-		u_int	update_type;
-		int	s;
-
-		cts = &ccb->cts;
-		ahc_compile_devinfo(&devinfo, SIM_SCSI_ID(ahc, sim),
-				    cts->ccb_h.target_id,
-				    cts->ccb_h.target_lun,
-				    SIM_CHANNEL(ahc, sim),
-				    ROLE_UNKNOWN);
-		tinfo = ahc_fetch_transinfo(ahc, devinfo.channel,
-					    devinfo.our_scsiid,
-					    devinfo.target, &tstate);
-		update_type = 0;
-		if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
-			update_type |= AHC_TRANS_GOAL;
-			discenable = &tstate->discenable;
-			tagenable = &tstate->tagenable;
-		} else if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
-			update_type |= AHC_TRANS_USER;
-			discenable = &ahc->user_discenable;
-			tagenable = &ahc->user_tagenable;
-		} else {
-			ccb->ccb_h.status = CAM_REQ_INVALID;
-			xpt_done(ccb);
-			break;
-		}
-		
-		s = splcam();
-
-		if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
-			if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
-				*discenable |= devinfo.target_mask;
-			else
-				*discenable &= ~devinfo.target_mask;
-		}
-		
-		if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
-			if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
-				*tagenable |= devinfo.target_mask;
-			else
-				*tagenable &= ~devinfo.target_mask;
-		}	
-
-		if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0) {
-			switch (cts->bus_width) {
-			case MSG_EXT_WDTR_BUS_16_BIT:
-				if ((ahc->features & AHC_WIDE) != 0)
-					break;
-				/* FALLTHROUGH to 8bit */
-			case MSG_EXT_WDTR_BUS_32_BIT:
-			case MSG_EXT_WDTR_BUS_8_BIT:
-			default:
-				cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
-				break;
-			}
-			ahc_set_width(ahc, &devinfo, cts->ccb_h.path,
-				      cts->bus_width, update_type,
-				      /*paused*/FALSE);
-		}
-
-		if (((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
-		 || ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)) {
-			struct ahc_syncrate *syncrate;
-			u_int maxsync;
-
-			if ((ahc->features & AHC_ULTRA2) != 0)
-				maxsync = AHC_SYNCRATE_ULTRA2;
-			else if ((ahc->features & AHC_ULTRA) != 0)
-				maxsync = AHC_SYNCRATE_ULTRA;
-			else
-				maxsync = AHC_SYNCRATE_FAST;
-
-			if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) == 0) {
-				if (update_type & AHC_TRANS_USER)
-					cts->sync_offset = tinfo->user.offset;
-				else
-					cts->sync_offset = tinfo->goal.offset;
-			}
-
-			if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) == 0) {
-				if (update_type & AHC_TRANS_USER)
-					cts->sync_period = tinfo->user.period;
-				else
-					cts->sync_period = tinfo->goal.period;
-			}
-
-			syncrate = ahc_find_syncrate(ahc, &cts->sync_period,
-						     maxsync);
-			ahc_validate_offset(ahc, syncrate, &cts->sync_offset,
-					    MSG_EXT_WDTR_BUS_8_BIT);
-
-			/* We use a period of 0 to represent async */
-			if (cts->sync_offset == 0)
-				cts->sync_period = 0;
-
-			ahc_set_syncrate(ahc, &devinfo, cts->ccb_h.path,
-					 syncrate, cts->sync_period,
-					 cts->sync_offset, update_type,
-					 /*paused*/FALSE);
-		}
-		splx(s);
-		ccb->ccb_h.status = CAM_REQ_CMP;
-		xpt_done(ccb);
-		break;
-	}
-	case XPT_GET_TRAN_SETTINGS:
-	/* Get default/user set transfer settings for the target */
-	{
-		struct	ahc_devinfo devinfo;
-		struct	ccb_trans_settings *cts;
-		struct	ahc_initiator_tinfo *targ_info;
-		struct	tmode_tstate *tstate;
-		struct	ahc_transinfo *tinfo;
-		int	s;
-
-		cts = &ccb->cts;
-		ahc_compile_devinfo(&devinfo, SIM_SCSI_ID(ahc, sim),
-				    cts->ccb_h.target_id,
-				    cts->ccb_h.target_lun,
-				    SIM_CHANNEL(ahc, sim),
-				    ROLE_UNKNOWN);
-		targ_info = ahc_fetch_transinfo(ahc, devinfo.channel,
-						devinfo.our_scsiid,
-						devinfo.target, &tstate);
-		
-		if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0)
-			tinfo = &targ_info->current;
-		else
-			tinfo = &targ_info->user;
-		
-		s = splcam();
-
-		cts->flags &= ~(CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB);
-		if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
-			if ((ahc->user_discenable & devinfo.target_mask) != 0)
-				cts->flags |= CCB_TRANS_DISC_ENB;
-
-			if ((ahc->user_tagenable & devinfo.target_mask) != 0)
-				cts->flags |= CCB_TRANS_TAG_ENB;
-		} else {
-			if ((tstate->discenable & devinfo.target_mask) != 0)
-				cts->flags |= CCB_TRANS_DISC_ENB;
-
-			if ((tstate->tagenable & devinfo.target_mask) != 0)
-				cts->flags |= CCB_TRANS_TAG_ENB;
-		}
-
-		cts->sync_period = tinfo->period;
-		cts->sync_offset = tinfo->offset;
-		cts->bus_width = tinfo->width;
-		
-		splx(s);
-
-		cts->valid = CCB_TRANS_SYNC_RATE_VALID
-			   | CCB_TRANS_SYNC_OFFSET_VALID
-			   | CCB_TRANS_BUS_WIDTH_VALID
-			   | CCB_TRANS_DISC_VALID
-			   | CCB_TRANS_TQ_VALID;
-
-		ccb->ccb_h.status = CAM_REQ_CMP;
-		xpt_done(ccb);
-		break;
-	}
-	case XPT_CALC_GEOMETRY:
-	{
-		struct	  ccb_calc_geometry *ccg;
-		u_int32_t size_mb;
-		u_int32_t secs_per_cylinder;
-		int	  extended;
-
-		ccg = &ccb->ccg;
-		size_mb = ccg->volume_size
-			/ ((1024L * 1024L) / ccg->block_size);
-		extended = SIM_IS_SCSIBUS_B(ahc, sim)
-			? ahc->flags & AHC_EXTENDED_TRANS_B
-			: ahc->flags & AHC_EXTENDED_TRANS_A;
-		
-		if (size_mb > 1024 && extended) {
-			ccg->heads = 255;
-			ccg->secs_per_track = 63;
-		} else {
-			ccg->heads = 64;
-			ccg->secs_per_track = 32;
-		}
-		secs_per_cylinder = ccg->heads * ccg->secs_per_track;
-		ccg->cylinders = ccg->volume_size / secs_per_cylinder;
-		ccb->ccb_h.status = CAM_REQ_CMP;
-		xpt_done(ccb);
-		break;
-	}
-	case XPT_RESET_BUS:		/* Reset the specified SCSI bus */
-	{
-		int  found;
-		
-		s = splcam();
-		found = ahc_reset_channel(ahc, SIM_CHANNEL(ahc, sim),
-					  /*initiate reset*/TRUE);
-		splx(s);
-		if (bootverbose) {
-			xpt_print_path(SIM_PATH(ahc, sim));
-			printf("SCSI bus reset delivered. "
-			       "%d SCBs aborted.\n", found);
-		}
-		ccb->ccb_h.status = CAM_REQ_CMP;
-		xpt_done(ccb);
-		break;
-	}
-	case XPT_TERM_IO:		/* Terminate the I/O process */
-		/* XXX Implement */
-		ccb->ccb_h.status = CAM_REQ_INVALID;
-		xpt_done(ccb);
-		break;
-	case XPT_PATH_INQ:		/* Path routing inquiry */
-	{
-		struct ccb_pathinq *cpi = &ccb->cpi;
-		
-		cpi->version_num = 1; /* XXX??? */
-		cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
-		if ((ahc->features & AHC_WIDE) != 0)
-			cpi->hba_inquiry |= PI_WIDE_16;
-		if ((ahc->flags & AHC_TARGETMODE) != 0) {
-			cpi->target_sprt = PIT_PROCESSOR
-					 | PIT_DISCONNECT
-					 | PIT_TERM_IO;
-		} else {
-			cpi->target_sprt = 0;
-		}
-		cpi->hba_misc = (ahc->flags & AHC_INITIATORMODE)
-			      ? 0 : PIM_NOINITIATOR;
-		cpi->hba_eng_cnt = 0;
-		cpi->max_target = (ahc->features & AHC_WIDE) ? 15 : 7;
-		cpi->max_lun = 7;
-		if (SIM_IS_SCSIBUS_B(ahc, sim)) {
-			cpi->initiator_id = ahc->our_id_b;
-			if ((ahc->flags & AHC_RESET_BUS_B) == 0)
-				cpi->hba_misc |= PIM_NOBUSRESET;
-		} else {
-			cpi->initiator_id = ahc->our_id;
-			if ((ahc->flags & AHC_RESET_BUS_A) == 0)
-				cpi->hba_misc |= PIM_NOBUSRESET;
-		}
-		cpi->bus_id = cam_sim_bus(sim);
-		cpi->base_transfer_speed = 3300;
-		strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
-		strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
-		strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
-		cpi->unit_number = cam_sim_unit(sim);
-		cpi->ccb_h.status = CAM_REQ_CMP;
-		xpt_done(ccb);
-		break;
-	}
-	default:
-		ccb->ccb_h.status = CAM_REQ_INVALID;
-		xpt_done(ccb);
-		break;
-	}
-}
-
-static void
-ahc_async(void *callback_arg, u_int32_t code, struct cam_path *path, void *arg)
-{
-	struct ahc_softc *ahc;
-	struct cam_sim *sim;
-
-	sim = (struct cam_sim *)callback_arg;
-	ahc = (struct ahc_softc *)cam_sim_softc(sim);
-	switch (code) {
-	case AC_LOST_DEVICE:
-	{
-		struct	ahc_devinfo devinfo;
-		int	s;
-
-		ahc_compile_devinfo(&devinfo, SIM_SCSI_ID(ahc, sim),
-				    xpt_path_target_id(path),
-				    xpt_path_lun_id(path),
-				    SIM_CHANNEL(ahc, sim),
-				    ROLE_UNKNOWN);
+	if ((ahc->features & AHC_ULTRA2) != 0) {
+		int wait;
 
 		/*
-		 * Revert to async/narrow transfers
-		 * for the next device.
+		 * Wait for up to 500ms for our transceivers
+		 * to settle.  If the adapter does not have
+		 * a cable attached, the tranceivers may
+		 * never settle, so don't complain if we
+		 * fail here.
 		 */
-		s = splcam();
-		ahc_set_width(ahc, &devinfo, path, MSG_EXT_WDTR_BUS_8_BIT,
-			      AHC_TRANS_GOAL|AHC_TRANS_CUR,
-			      /*paused*/FALSE);
-		ahc_set_syncrate(ahc, &devinfo, path, /*syncrate*/NULL,
-				 /*period*/0, /*offset*/0,
-				 AHC_TRANS_GOAL|AHC_TRANS_CUR,
-				 /*paused*/FALSE);
-		splx(s);
-		break;
-	}
-	default:
-		break;
+		pause_sequencer(ahc);
+		for (wait = 5000;
+		     (ahc_inb(ahc, SBLKCTL) & (ENAB40|ENAB20)) == 0 && wait;
+		     wait--)
+			ahc_delay(100);
+		unpause_sequencer(ahc);
 	}
+	return (0);
 }
 
-static void
-ahc_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nsegments,
-		int error)
+/************************** Busy Target Table *********************************/
+/*
+ * Return the untagged transaction id for a given target/channel lun.
+ * Optionally, clear the entry.
+ */
+u_int
+ahc_index_busy_tcl(struct ahc_softc *ahc, u_int tcl, int unbusy)
 {
-	struct	 scb *scb;
-	union	 ccb *ccb;
-	struct	 ahc_softc *ahc;
-	int	 s;
-
-	scb = (struct scb *)arg;
-	ccb = scb->ccb;
-	ahc = (struct ahc_softc *)ccb->ccb_h.ccb_ahc_ptr;
-
-	if (error != 0) {
-		if (error == EFBIG)
-			ahcsetccbstatus(scb->ccb, CAM_REQ_TOO_BIG);
-		else
-			ahcsetccbstatus(scb->ccb, CAM_REQ_CMP_ERR);
-		if (nsegments != 0)
-			bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
-		ahcfreescb(ahc, scb);
-		xpt_done(ccb);
-		return;
-	}
-	if (nsegments != 0) {
-		struct	  ahc_dma_seg *sg;
-		bus_dma_segment_t *end_seg;
-		bus_dmasync_op_t op;
-
-		end_seg = dm_segs + nsegments;
-
-		/* Copy the first SG into the data pointer area */
-		scb->hscb->data = dm_segs->ds_addr;
-		scb->hscb->datalen = dm_segs->ds_len;
-
-		/* Copy the segments into our SG list */
-		sg = scb->sg_list;
-		while (dm_segs < end_seg) {
-			sg->addr = dm_segs->ds_addr;
-			sg->len = dm_segs->ds_len;
-			sg++;
-			dm_segs++;
-		}
-
-		/* Note where to find the SG entries in bus space */
-		scb->hscb->SG_pointer = scb->sg_list_phys;
-
-		if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
-			op = BUS_DMASYNC_PREREAD;
-		else
-			op = BUS_DMASYNC_PREWRITE;
-
-		bus_dmamap_sync(ahc->buffer_dmat, scb->dmamap, op);
-
-		if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
-			scb->hscb->cmdpointer |= DPHASE_PENDING;
-			if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
-				scb->hscb->cmdpointer |= (TARGET_DATA_IN << 8);
-
-			/*
-			 * If the transfer is of an odd length and in the
-			 * "in" direction (scsi->HostBus), then it may
-			 * trigger a bug in the 'WideODD' feature of
-			 * non-Ultra2 chips.  Force the total data-length
-			 * to be even by adding an extra, 1 byte, SG,
-			 * element.  We do this even if we are not currently
-			 * negotiated wide as negotiation could occur before
-			 * this command is executed.
-			 */
-			if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN
-			 && (ccb->csio.dxfer_len & 0x1) != 0
-			 && (ahc->features & AHC_TARG_DMABUG) != 0) {
-
-				nsegments++;
-				if (nsegments > AHC_NSEG) {
+	u_int scbid;
+	u_int target_offset;
 
-					ahcsetccbstatus(scb->ccb,
-							CAM_REQ_TOO_BIG);
-					bus_dmamap_unload(ahc->buffer_dmat,
-							  scb->dmamap);
-					ahcfreescb(ahc, scb);
-					xpt_done(ccb);
-					return;
-				}
-				sg->addr = ahc->dma_bug_buf;
-				sg->len = 1;
-			}
-		}
+	if ((ahc->features & AHC_SCB_BTT) != 0) {
+		u_int saved_scbptr;
+		
+		saved_scbptr = ahc_inb(ahc, SCBPTR);
+		ahc_outb(ahc, SCBPTR, TCL_LUN(tcl));
+		scbid = ahc_inb(ahc, SCB_64_BTT + TCL_TARGET_OFFSET(tcl));
+		if (unbusy)
+			ahc_outb(ahc, SCB_64_BTT + TCL_TARGET_OFFSET(tcl),
+				 SCB_LIST_NULL);
+		ahc_outb(ahc, SCBPTR, saved_scbptr);
 	} else {
-		scb->hscb->SG_pointer = 0;
-		scb->hscb->data = 0;
-		scb->hscb->datalen = 0;
+		target_offset = TCL_TARGET_OFFSET(tcl);
+		scbid = ahc_inb(ahc, BUSY_TARGETS + target_offset);
+		if (unbusy)
+			ahc_outb(ahc, BUSY_TARGETS + target_offset,
+				 SCB_LIST_NULL);
 	}
-	
-	scb->sg_count = scb->hscb->SG_count = nsegments;
 
-	s = splcam();
+	return (scbid);
+}
 
-	/*
-	 * Last time we need to check if this SCB needs to
-	 * be aborted.
-	 */
-	if (ahc_ccb_status(ccb) != CAM_REQ_INPROG) {
-		if (nsegments != 0)
-			bus_dmamap_unload(ahc->buffer_dmat, scb->dmamap);
-		ahcfreescb(ahc, scb);
-		xpt_done(ccb);
-		splx(s);
-		return;
-	}
+void
+ahc_busy_tcl(struct ahc_softc *ahc, u_int tcl, u_int scbid)
+{
+	u_int target_offset;
 
-	/* Busy this tcl if we are untagged */
-	if ((scb->hscb->control & TAG_ENB) == 0)
-		ahc_busy_tcl(ahc, scb);
+	if ((ahc->features & AHC_SCB_BTT) != 0) {
+		u_int saved_scbptr;
 		
-	LIST_INSERT_HEAD(&ahc->pending_ccbs, &ccb->ccb_h,
-			 sim_links.le);
-
-	scb->flags |= SCB_ACTIVE;
-	ccb->ccb_h.status |= CAM_SIM_QUEUED;
-
-	if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
-		if (ccb->ccb_h.timeout == CAM_TIME_DEFAULT)
-			ccb->ccb_h.timeout = 5 * 1000;
-		ccb->ccb_h.timeout_ch =
-		    timeout(ahc_timeout, (caddr_t)scb,
-			    (ccb->ccb_h.timeout * hz) / 1000);
-	}
-
-	if ((scb->flags & SCB_TARGET_IMMEDIATE) != 0) {
-#if 0
-		printf("Continueing Immediate Command %d:%d\n",
-		       ccb->ccb_h.target_id, ccb->ccb_h.target_lun);
-#endif
-		pause_sequencer(ahc);
-		if ((ahc->flags & AHC_PAGESCBS) == 0)
-			ahc_outb(ahc, SCBPTR, scb->hscb->tag);
-		ahc_outb(ahc, SCB_TAG, scb->hscb->tag);
-		ahc_outb(ahc, RETURN_1, CONT_MSG_LOOP);
-		unpause_sequencer(ahc);
+		saved_scbptr = ahc_inb(ahc, SCBPTR);
+		ahc_outb(ahc, SCBPTR, TCL_LUN(tcl));
+		ahc_outb(ahc, SCB_64_BTT + TCL_TARGET_OFFSET(tcl), scbid);
+		ahc_outb(ahc, SCBPTR, saved_scbptr);
 	} else {
-
-		ahc->qinfifo[ahc->qinfifonext++] = scb->hscb->tag;
-
-		if ((ahc->features & AHC_QUEUE_REGS) != 0) {
-			ahc_outb(ahc, HNSCB_QOFF, ahc->qinfifonext);
-		} else {
-			pause_sequencer(ahc);
-			ahc_outb(ahc, KERNEL_QINPOS, ahc->qinfifonext);
-			unpause_sequencer(ahc);
-		}
+		target_offset = TCL_TARGET_OFFSET(tcl);
+		ahc_outb(ahc, BUSY_TARGETS + target_offset, scbid);
 	}
-
-	splx(s);
-}
-
-static void
-ahc_poll(struct cam_sim *sim)
-{
-	ahc_intr(cam_sim_softc(sim));
 }
 
-static void
-ahc_setup_data(struct ahc_softc *ahc, struct ccb_scsiio *csio,
-	       struct scb *scb)
+/************************** SCB and SCB queue management **********************/
+int
+ahc_match_scb(struct ahc_softc *ahc, struct scb *scb, int target,
+	      char channel, int lun, u_int tag, role_t role)
 {
-	struct hardware_scb *hscb;
-	struct ccb_hdr *ccb_h;
-	
-	hscb = scb->hscb;
-	ccb_h = &csio->ccb_h;
-	
-	if (ccb_h->func_code == XPT_SCSI_IO) {
-		hscb->cmdlen = csio->cdb_len;
-		if ((ccb_h->flags & CAM_CDB_POINTER) != 0) {
-			if ((ccb_h->flags & CAM_CDB_PHYS) == 0)
-				if (hscb->cmdlen <= 16) {
-					memcpy(hscb->cmdstore, 
-					       csio->cdb_io.cdb_ptr,
-					       hscb->cmdlen);
-					hscb->cmdpointer = 
-					    hscb->cmdstore_busaddr;
-				} else  {
-					ahcsetccbstatus(scb->ccb,
-							CAM_REQ_INVALID);
-					xpt_done(scb->ccb);
-					ahcfreescb(ahc, scb);
-					return;
-				}
-			else
-				hscb->cmdpointer =
-				  ((intptr_t)csio->cdb_io.cdb_ptr) & 0xffffffff;
-		} else {
-			/*
-			 * CCB CDB Data Storage area is only 16 bytes
-			 * so no additional testing is required
-			 */
-			memcpy(hscb->cmdstore, csio->cdb_io.cdb_bytes,
-			       hscb->cmdlen);
-			hscb->cmdpointer = hscb->cmdstore_busaddr;
-		}
-	}
-		
-	/* Only use S/G if there is a transfer */
-	if ((ccb_h->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
-		if ((ccb_h->flags & CAM_SCATTER_VALID) == 0) {
-			/* We've been given a pointer to a single buffer */
-			if ((ccb_h->flags & CAM_DATA_PHYS) == 0) {
-				int s;
-				int error;
-
-				s = splsoftvm();
-				error = bus_dmamap_load(ahc->buffer_dmat,
-							scb->dmamap,
-							csio->data_ptr,
-							csio->dxfer_len,
-							ahc_execute_scb,
-							scb, /*flags*/0);
-				if (error == EINPROGRESS) {
-					/*
-					 * So as to maintain ordering,
-					 * freeze the controller queue
-					 * until our mapping is
-					 * returned.
-					 */
-					xpt_freeze_simq(ahc->sim,
-							/*count*/1);
-					scb->ccb->ccb_h.status |=
-					    CAM_RELEASE_SIMQ;
-				}
-				splx(s);
-			} else {
-				struct bus_dma_segment seg;
-
-				/* Pointer to physical buffer */
-				if (csio->dxfer_len > AHC_MAXTRANSFER_SIZE)
-					panic("ahc_setup_data - Transfer size "
-					      "larger than can device max");
-
-				seg.ds_addr = (bus_addr_t)csio->data_ptr;
-				seg.ds_len = csio->dxfer_len;
-				ahc_execute_scb(scb, &seg, 1, 0);
-			}
-		} else {
-			struct bus_dma_segment *segs;
-
-			if ((ccb_h->flags & CAM_DATA_PHYS) != 0)
-				panic("ahc_setup_data - Physical segment "
-				      "pointers unsupported");
+	int targ = SCB_GET_TARGET(ahc, scb);
+	char chan = SCB_GET_CHANNEL(ahc, scb);
+	int slun = SCB_GET_LUN(scb);
+	int match;
 
-			if ((ccb_h->flags & CAM_SG_LIST_PHYS) == 0)
-				panic("ahc_setup_data - Virtual segment "
-				      "addresses unsupported");
+	match = ((chan == channel) || (channel == ALL_CHANNELS));
+	if (match != 0)
+		match = ((targ == target) || (target == CAM_TARGET_WILDCARD));
+	if (match != 0)
+		match = ((lun == slun) || (lun == CAM_LUN_WILDCARD));
+	if (match != 0) {
+#if AHC_TARGET_MODE
+		int group;
 
-			/* Just use the segments provided */
-			segs = (struct bus_dma_segment *)csio->data_ptr;
-			ahc_execute_scb(scb, segs, csio->sglist_cnt, 0);
+		group = XPT_FC_GROUP(scb->io_ctx->ccb_h.func_code);
+		if (role == ROLE_INITIATOR) {
+			match = (group == XPT_FC_GROUP_COMMON)
+			      && ((tag == scb->hscb->tag)
+			       || (tag == SCB_LIST_NULL));
+		} else if (role == ROLE_TARGET) {
+			match = (group == XPT_FC_GROUP_TMODE)
+			      && ((tag == scb->io_ctx->csio.tag_id)
+			       || (tag == SCB_LIST_NULL));
 		}
-	} else {
-		ahc_execute_scb(scb, NULL, 0, 0);
+#else /* !AHC_TARGET_MODE */
+		match = ((tag == scb->hscb->tag) || (tag == SCB_LIST_NULL));
+#endif /* AHC_TARGET_MODE */
 	}
+
+	return match;
 }
 
-static void
-ahc_freeze_devq(struct ahc_softc *ahc, struct cam_path *path)
+void
+ahc_freeze_devq(struct ahc_softc *ahc, struct scb *scb)
 {
 	int	target;
 	char	channel;
 	int	lun;
 
-	target = xpt_path_target_id(path);
-	lun = xpt_path_lun_id(path);
-	channel = xpt_path_sim(path)->bus_id == 0 ? 'A' : 'B';
+	target = SCB_GET_TARGET(ahc, scb);
+	lun = SCB_GET_LUN(scb);
+	channel = SCB_GET_CHANNEL(ahc, scb);
 	
 	ahc_search_qinfifo(ahc, target, channel, lun,
 			   /*tag*/SCB_LIST_NULL, ROLE_UNKNOWN,
 			   CAM_REQUEUE_REQ, SEARCH_COMPLETE);
-}
-
-static void
-ahcallocscbs(struct ahc_softc *ahc)
-{
-	struct scb_data *scb_data;
-	struct scb *next_scb;
-	struct sg_map_node *sg_map;
-	bus_addr_t physaddr;
-	struct ahc_dma_seg *segs;
-	int newcount;
-	int i;
-
-	scb_data = ahc->scb_data;
-	if (scb_data->numscbs >= AHC_SCB_MAX)
-		/* Can't allocate any more */
-		return;
-
-	next_scb = &scb_data->scbarray[scb_data->numscbs];
-
-	sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT);
-
-	if (sg_map == NULL)
-		return;
-
-	/* Allocate S/G space for the next batch of SCBS */
-	if (bus_dmamem_alloc(scb_data->sg_dmat, (void **)&sg_map->sg_vaddr,
-			     BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
-		free(sg_map, M_DEVBUF);
-		return;
-	}
-
-	SLIST_INSERT_HEAD(&scb_data->sg_maps, sg_map, links);
-
-	bus_dmamap_load(scb_data->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr,
-			PAGE_SIZE, ahcdmamapcb, &sg_map->sg_physaddr,
-			/*flags*/0);
-
-	segs = sg_map->sg_vaddr;
-	physaddr = sg_map->sg_physaddr;
-
-	newcount = (PAGE_SIZE / (AHC_NSEG * sizeof(struct ahc_dma_seg)));
-	for (i = 0; scb_data->numscbs < AHC_SCB_MAX && i < newcount; i++) {
-		int error;
-
-		next_scb->sg_list = segs;
-		/*
-		 * The sequencer always starts with the second entry.
-		 * The first entry is embedded in the scb.
-		 */
-		next_scb->sg_list_phys = physaddr + sizeof(struct ahc_dma_seg);
-		next_scb->flags = SCB_FREE;
-		error = bus_dmamap_create(ahc->buffer_dmat, /*flags*/0,
-					  &next_scb->dmamap);
-		if (error != 0)
-			break;
-		next_scb->hscb = &scb_data->hscbs[scb_data->numscbs];
-		next_scb->hscb->tag = ahc->scb_data->numscbs;
-		next_scb->hscb->cmdstore_busaddr = 
-		    ahc_hscb_busaddr(ahc, next_scb->hscb->tag)
-		  + offsetof(struct hardware_scb, cmdstore);	
-		SLIST_INSERT_HEAD(&ahc->scb_data->free_scbs, next_scb, links);
-		segs += AHC_NSEG;
-		physaddr += (AHC_NSEG * sizeof(struct ahc_dma_seg));
-		next_scb++;
-		ahc->scb_data->numscbs++;
-	}
-}
-
-#ifdef AHC_DUMP_SEQ
-static void
-ahc_dumpseq(struct ahc_softc* ahc)
-{
-	int i;
-	int max_prog;
-
-	if ((ahc->chip & AHC_BUS_MASK) < AHC_PCI)
-		max_prog = 448;
-	else if ((ahc->features & AHC_ULTRA2) != 0)
-		max_prog = 768;
-	else
-		max_prog = 512;
-
-	ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE|LOADRAM);
-	ahc_outb(ahc, SEQADDR0, 0);
-	ahc_outb(ahc, SEQADDR1, 0);
-	for (i = 0; i < max_prog; i++) {
-		u_int8_t ins_bytes[4];
-
-		ahc_insb(ahc, SEQRAM, ins_bytes, 4);
-		printf("0x%08x\n", ins_bytes[0] << 24
-				 | ins_bytes[1] << 16
-				 | ins_bytes[2] << 8
-				 | ins_bytes[3]);
-	}
-}
-#endif
-
-static void
-ahc_loadseq(struct ahc_softc *ahc)
-{
-	struct patch *cur_patch;
-	int i;
-	int downloaded;
-	int skip_addr;
-	u_int8_t download_consts[4];
-
-	/* Setup downloadable constant table */
-#if 0
-	/* No downloaded constants are currently defined. */
-	download_consts[TMODE_NUMCMDS] = ahc->num_targetcmds;
-#endif
-
-	cur_patch = patches;
-	downloaded = 0;
-	skip_addr = 0;
-	ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE|LOADRAM);
-	ahc_outb(ahc, SEQADDR0, 0);
-	ahc_outb(ahc, SEQADDR1, 0);
-
-	for (i = 0; i < sizeof(seqprog)/4; i++) {
-		if (ahc_check_patch(ahc, &cur_patch, i, &skip_addr) == 0) {
-			/*
-			 * Don't download this instruction as it
-			 * is in a patch that was removed.
-			 */
-                        continue;
-		}
-		ahc_download_instr(ahc, i, download_consts);
-		downloaded++;
-	}
-	ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE);
-	restart_sequencer(ahc);
-
-	if (bootverbose)
-		printf(" %d instructions downloaded\n", downloaded);
-}
-
-static int
-ahc_check_patch(struct ahc_softc *ahc, struct patch **start_patch,
-		int start_instr, int *skip_addr)
-{
-	struct	patch *cur_patch;
-	struct	patch *last_patch;
-	int	num_patches;
-
-	num_patches = sizeof(patches)/sizeof(struct patch);
-	last_patch = &patches[num_patches];
-	cur_patch = *start_patch;
-
-	while (cur_patch < last_patch && start_instr == cur_patch->begin) {
-
-		if (cur_patch->patch_func(ahc) == 0) {
-
-			/* Start rejecting code */
-			*skip_addr = start_instr + cur_patch->skip_instr;
-			cur_patch += cur_patch->skip_patch;
-		} else {
-			/* Accepted this patch.  Advance to the next
-			 * one and wait for our intruction pointer to
-			 * hit this point.
-			 */
-			cur_patch++;
-		}
-	}
 
-	*start_patch = cur_patch;
-	if (start_instr < *skip_addr)
-		/* Still skipping */
-		return (0);
-
-	return (1);
+	ahc_platform_freeze_devq(ahc, scb);
 }
 
-static void
-ahc_download_instr(struct ahc_softc *ahc, int instrptr, u_int8_t *dconsts)
-{
-	union	ins_formats instr;
-	struct	ins_format1 *fmt1_ins;
-	struct	ins_format3 *fmt3_ins;
-	u_int	opcode;
-
-	/* Structure copy */
-	instr = *(union ins_formats*)&seqprog[instrptr * 4];
-
-	fmt1_ins = &instr.format1;
-	fmt3_ins = NULL;
-
-	/* Pull the opcode */
-	opcode = instr.format1.opcode;
-	switch (opcode) {
-	case AIC_OP_JMP:
-	case AIC_OP_JC:
-	case AIC_OP_JNC:
-	case AIC_OP_CALL:
-	case AIC_OP_JNE:
-	case AIC_OP_JNZ:
-	case AIC_OP_JE:
-	case AIC_OP_JZ:
-	{
-		struct patch *cur_patch;
-		int address_offset;
-		u_int address;
-		int skip_addr;
-		int i;
-
-		fmt3_ins = &instr.format3;
-		address_offset = 0;
-		address = fmt3_ins->address;
-		cur_patch = patches;
-		skip_addr = 0;
-
-		for (i = 0; i < address;) {
-
-			ahc_check_patch(ahc, &cur_patch, i, &skip_addr);
-
-			if (skip_addr > i) {
-				int end_addr;
-
-				end_addr = MIN(address, skip_addr);
-				address_offset += end_addr - i;
-				i = skip_addr;
-			} else {
-				i++;
-			}
-		}
-		address -= address_offset;
-		fmt3_ins->address = address;
-		/* FALLTHROUGH */
-	}
-	case AIC_OP_OR:
-	case AIC_OP_AND:
-	case AIC_OP_XOR:
-	case AIC_OP_ADD:
-	case AIC_OP_ADC:
-	case AIC_OP_BMOV:
-		if (fmt1_ins->parity != 0) {
-			fmt1_ins->immediate = dconsts[fmt1_ins->immediate];
-		}
-		fmt1_ins->parity = 0;
-		/* FALLTHROUGH */
-	case AIC_OP_ROL:
-		if ((ahc->features & AHC_ULTRA2) != 0) {
-			int i, count;
-
-			/* Calculate odd parity for the instruction */
-			for (i = 0, count = 0; i < 31; i++) {
-				u_int32_t mask;
-
-				mask = 0x01 << i;
-				if ((instr.integer & mask) != 0)
-					count++;
-			}
-			if ((count & 0x01) == 0)
-				instr.format1.parity = 1;
-		} else {
-			/* Compress the instruction for older sequencers */
-			if (fmt3_ins != NULL) {
-				instr.integer =
-					fmt3_ins->immediate
-				      | (fmt3_ins->source << 8)
-				      | (fmt3_ins->address << 16)
-				      |	(fmt3_ins->opcode << 25);
-			} else {
-				instr.integer =
-					fmt1_ins->immediate
-				      | (fmt1_ins->source << 8)
-				      | (fmt1_ins->destination << 16)
-				      |	(fmt1_ins->ret << 24)
-				      |	(fmt1_ins->opcode << 25);
-			}
-		}
-		ahc_outsb(ahc, SEQRAM, instr.bytes, 4);
-		break;
-	default:
-		panic("Unknown opcode encountered in seq program");
-		break;
-	}
-}
-
-static void
-ahc_set_recoveryscb(struct ahc_softc *ahc, struct scb *scb) {
-
-	if ((scb->flags & SCB_RECOVERY_SCB) == 0) {
-		struct ccb_hdr *ccbh;
-
-		scb->flags |= SCB_RECOVERY_SCB;
-
-		/*
-		 * Take all queued, but not sent SCBs out of the equation.
-		 * Also ensure that no new CCBs are queued to us while we
-		 * try to fix this problem.
-		 */
-		if ((scb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) {
-			xpt_freeze_simq(ahc->sim, /*count*/1);
-			scb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
-		}
-
-		/*
-		 * Go through all of our pending SCBs and remove
-		 * any scheduled timeouts for them.  We will reschedule
-		 * them after we've successfully fixed this problem.
-		 */
-		ccbh = ahc->pending_ccbs.lh_first;
-		while (ccbh != NULL) {
-			struct scb *pending_scb;
-
-			pending_scb = (struct scb *)ccbh->ccb_scb_ptr;
-			untimeout(ahc_timeout, pending_scb, ccbh->timeout_ch);
-			ccbh = ccbh->sim_links.le.le_next;
-		}
-	}
-}
-
-static void
-ahc_timeout(void *arg)
+int
+ahc_search_qinfifo(struct ahc_softc *ahc, int target, char channel,
+		   int lun, u_int tag, role_t role, uint32_t status,
+		   ahc_search_action action)
 {
 	struct	scb *scb;
-	struct	ahc_softc *ahc;
-	int	s, found;
-	u_int	last_phase;
-	int	target;
-	int	lun;
+	uint8_t qinpos;
+	uint8_t qintail;
+	uint8_t next, prev;
+	uint8_t curscbptr;
+	int	found;
+	int	maxtarget;
 	int	i;
-	char	channel;
-
-	scb = (struct scb *)arg; 
-	ahc = (struct ahc_softc *)scb->ccb->ccb_h.ccb_ahc_ptr;
-
-	s = splcam();
-
-	/*
-	 * Ensure that the card doesn't do anything
-	 * behind our back.  Also make sure that we
-	 * didn't "just" miss an interrupt that would
-	 * affect this timeout.
-	 */
-	do {
-		ahc_intr(ahc);
-		pause_sequencer(ahc);
-	} while (ahc_inb(ahc, INTSTAT) & INT_PEND);
 
-	if ((scb->flags & SCB_ACTIVE) == 0) {
-		/* Previous timeout took care of me already */
-		printf("Timedout SCB handled by another timeout\n");
-		unpause_sequencer(ahc);
-		splx(s);
-		return;
-	}
-
-	target = SCB_TARGET(scb);
-	channel = SCB_CHANNEL(scb);
-	lun = SCB_LUN(scb);
-
-	xpt_print_path(scb->ccb->ccb_h.path);
-	printf("SCB 0x%x - timed out ", scb->hscb->tag);
-	/*
-	 * Take a snapshot of the bus state and print out
-	 * some information so we can track down driver bugs.
-	 */
-	last_phase = ahc_inb(ahc, LASTPHASE);
-
-	for (i = 0; i < num_phases; i++) {
-		if (last_phase == phase_table[i].phase)
-			break;
-	}
-	printf("%s", phase_table[i].phasemsg);
-
-	printf(", SEQADDR == 0x%x\n",
-	       ahc_inb(ahc, SEQADDR0) | (ahc_inb(ahc, SEQADDR1) << 8));
+	qinpos = ahc_inb(ahc, QINPOS);
+	qintail = ahc->qinfifonext;
+	found = 0;
 
-#if 0
-	printf("SSTAT1 == 0x%x\n", ahc_inb(ahc, SSTAT1));
-	printf("SSTAT3 == 0x%x\n", ahc_inb(ahc, SSTAT3));
-	printf("SCSIPHASE == 0x%x\n", ahc_inb(ahc, SCSIPHASE));
-	printf("SCSIRATE == 0x%x\n", ahc_inb(ahc, SCSIRATE));
-	printf("SCSIOFFSET == 0x%x\n", ahc_inb(ahc, SCSIOFFSET));
-	printf("SEQ_FLAGS == 0x%x\n", ahc_inb(ahc, SEQ_FLAGS));
-	printf("SCB_DATAPTR == 0x%x\n", ahc_inb(ahc, SCB_DATAPTR)
-				      | ahc_inb(ahc, SCB_DATAPTR + 1) << 8
-				      | ahc_inb(ahc, SCB_DATAPTR + 2) << 16
-				      | ahc_inb(ahc, SCB_DATAPTR + 3) << 24);
-	printf("SCB_DATACNT == 0x%x\n", ahc_inb(ahc, SCB_DATACNT)
-				      | ahc_inb(ahc, SCB_DATACNT + 1) << 8
-				      | ahc_inb(ahc, SCB_DATACNT + 2) << 16);
-	printf("SCB_SGCOUNT == 0x%x\n", ahc_inb(ahc, SCB_SGCOUNT));
-	printf("CCSCBCTL == 0x%x\n", ahc_inb(ahc, CCSCBCTL));
-	printf("CCSCBCNT == 0x%x\n", ahc_inb(ahc, CCSCBCNT));
-	printf("DFCNTRL == 0x%x\n", ahc_inb(ahc, DFCNTRL));
-	printf("DFSTATUS == 0x%x\n", ahc_inb(ahc, DFSTATUS));
-	printf("CCHCNT == 0x%x\n", ahc_inb(ahc, CCHCNT));
-	if (scb->sg_count > 0) {
-		for (i = 0; i < scb->sg_count; i++) {
-			printf("sg[%d] - Addr 0x%x : Length %d\n",
-			       i,
-			       scb->sg_list[i].addr,
-			       scb->sg_list[i].len);
-		}
-	}
-#endif
-	if (scb->flags & (SCB_DEVICE_RESET|SCB_ABORT)) {
-		/*
-		 * Been down this road before.
-		 * Do a full bus reset.
-		 */
-bus_reset:
-		ahcsetccbstatus(scb->ccb, CAM_CMD_TIMEOUT);
-		found = ahc_reset_channel(ahc, channel, /*Initiate Reset*/TRUE);
-		printf("%s: Issued Channel %c Bus Reset. "
-		       "%d SCBs aborted\n", ahc_name(ahc), channel, found);
-	} else {
+	if (action == SEARCH_COMPLETE) {
 		/*
-		 * If we are a target, transition to bus free and report
-		 * the timeout.
-		 * 
-		 * The target/initiator that is holding up the bus may not
-		 * be the same as the one that triggered this timeout
-		 * (different commands have different timeout lengths).
-		 * If the bus is idle and we are actiing as the initiator
-		 * for this request, queue a BDR message to the timed out
-		 * target.  Otherwise, if the timed out transaction is
-		 * active:
-		 *   Initiator transaction:
-		 *	Stuff the message buffer with a BDR message and assert
-		 *	ATN in the hopes that the target will let go of the bus
-		 *	and go to the mesgout phase.  If this fails, we'll
-		 *	get another timeout 2 seconds later which will attempt
-		 *	a bus reset.
-		 *
-		 *   Target transaction:
-		 *	Transition to BUS FREE and report the error.
-		 *	It's good to be the target!
+		 * Don't attempt to run any queued untagged transactions
+		 * until we are done with the abort process.
 		 */
-		u_int active_scb_index;
-
-		active_scb_index = ahc_inb(ahc, SCB_TAG);
-
-		if (last_phase != P_BUSFREE 
-		  && (active_scb_index < ahc->scb_data->numscbs)) {
-			struct scb *active_scb;
-
-			/*
-			 * If the active SCB is not from our device,
-			 * assume that another device is hogging the bus
-			 * and wait for it's timeout to expire before
-			 * taking additional action.
-			 */ 
-			active_scb = &ahc->scb_data->scbarray[active_scb_index];
-			if (active_scb->hscb->tcl != scb->hscb->tcl) {
-				struct	ccb_hdr *ccbh;
-				u_int	newtimeout;
-
-				xpt_print_path(scb->ccb->ccb_h.path);
-				printf("Other SCB Timeout%s",
-			 	       (scb->flags & SCB_OTHERTCL_TIMEOUT) != 0
-				       ? " again\n" : "\n");
-				scb->flags |= SCB_OTHERTCL_TIMEOUT;
-				newtimeout = MAX(active_scb->ccb->ccb_h.timeout,
-						 scb->ccb->ccb_h.timeout);
-				ccbh = &scb->ccb->ccb_h;
-				scb->ccb->ccb_h.timeout_ch =
-				    timeout(ahc_timeout, scb,
-					    (newtimeout * hz) / 1000);
-				splx(s);
-				return;
-			} 
-
-			/* It's us */
-			if ((scb->hscb->control & TARGET_SCB) != 0) {
-
-				/*
-				 * Send back any queued up transactions
-				 * and properly record the error condition.
-				 */
-				ahc_freeze_devq(ahc, scb->ccb->ccb_h.path);
-				ahcsetccbstatus(scb->ccb, CAM_CMD_TIMEOUT);
-				ahc_freeze_ccb(scb->ccb);
-				ahc_done(ahc, scb);
-
-				/* Will clear us from the bus */
-				restart_sequencer(ahc);
-				return;
-			}
-
-			ahc_set_recoveryscb(ahc, active_scb);
-			ahc_outb(ahc, MSG_OUT, MSG_BUS_DEV_RESET);
-			ahc_outb(ahc, SCSISIGO, last_phase|ATNO);
-			xpt_print_path(active_scb->ccb->ccb_h.path);
-			printf("BDR message in message buffer\n");
-			active_scb->flags |=  SCB_DEVICE_RESET;
-			active_scb->ccb->ccb_h.timeout_ch =
-			    timeout(ahc_timeout, (caddr_t)active_scb, 2 * hz);
-			unpause_sequencer(ahc);
-		} else {
-			int	 disconnected;
-
-			/* XXX Shouldn't panic.  Just punt instead */
-			if ((scb->hscb->control & TARGET_SCB) != 0)
-				panic("Timed-out target SCB but bus idle");
-
-			if (last_phase != P_BUSFREE
-			 && (ahc_inb(ahc, SSTAT0) & TARGET) != 0) {
-				/* XXX What happened to the SCB? */
-				/* Hung target selection.  Goto busfree */
-				printf("%s: Hung target selection\n",
-				       ahc_name(ahc));
-				restart_sequencer(ahc);
-				return;
-			}
-
-			if (ahc_search_qinfifo(ahc, target, channel, lun,
-					       scb->hscb->tag, ROLE_INITIATOR,
-					       /*status*/0, SEARCH_COUNT) > 0) {
-				disconnected = FALSE;
-			} else {
-				disconnected = TRUE;
-			}
-
-			if (disconnected) {
-				u_int active_scb;
-
-				ahc_set_recoveryscb(ahc, scb);
-				/*
-				 * Simply set the MK_MESSAGE control bit.
-				 */
-				scb->hscb->control |= MK_MESSAGE;
-				scb->flags |= SCB_QUEUED_MSG
-					   |  SCB_DEVICE_RESET;
-
-				/*
-				 * Mark the cached copy of this SCB in the
-				 * disconnected list too, so that a reconnect
-				 * at this point causes a BDR or abort.
-				 */
-				active_scb = ahc_inb(ahc, SCBPTR);
-				if (ahc_search_disc_list(ahc, target,
-							 channel, lun,
-							 scb->hscb->tag,
-							 /*stop_on_first*/TRUE,
-							 /*remove*/FALSE,
-							 /*save_state*/FALSE)) {
-					u_int scb_control;
-
-					scb_control = ahc_inb(ahc, SCB_CONTROL);
-					scb_control |= MK_MESSAGE;
-					ahc_outb(ahc, SCB_CONTROL, scb_control);
-				}
-				ahc_outb(ahc, SCBPTR, active_scb);
-				ahc_index_busy_tcl(ahc, scb->hscb->tcl,
-						   /*unbusy*/TRUE);
-
-				/*
-				 * Actually re-queue this SCB in case we can
-				 * select the device before it reconnects.
-				 * Clear out any entries in the QINFIFO first
-				 * so we are the next SCB for this target
-				 * to run.
-				 */
-				ahc_search_qinfifo(ahc, SCB_TARGET(scb),
-						   channel, SCB_LUN(scb),
-						   SCB_LIST_NULL,
-						   ROLE_INITIATOR,
-						   CAM_REQUEUE_REQ,
-						   SEARCH_COMPLETE);
-				xpt_print_path(scb->ccb->ccb_h.path);
-				printf("Queuing a BDR SCB\n");
-				ahc->qinfifo[ahc->qinfifonext++] =
-				    scb->hscb->tag;
-				if ((ahc->features & AHC_QUEUE_REGS) != 0) {
-					ahc_outb(ahc, HNSCB_QOFF,
-						 ahc->qinfifonext);
-				} else {
-					ahc_outb(ahc, KERNEL_QINPOS,
-						 ahc->qinfifonext);
-				}
-				scb->ccb->ccb_h.timeout_ch =
-				    timeout(ahc_timeout, (caddr_t)scb, 2 * hz);
-				unpause_sequencer(ahc);
-			} else {
-				/* Go "immediatly" to the bus reset */
-				/* This shouldn't happen */
-				ahc_set_recoveryscb(ahc, scb);
-				xpt_print_path(scb->ccb->ccb_h.path);
-				printf("SCB %d: Immediate reset.  "
-					"Flags = 0x%x\n", scb->hscb->tag,
-					scb->flags);
-				goto bus_reset;
-			}
-		}
+		ahc_freeze_untagged_queues(ahc);
 	}
-	splx(s);
-}
-
-static int
-ahc_search_qinfifo(struct ahc_softc *ahc, int target, char channel,
-		   int lun, u_int tag, role_t role, u_int32_t status,
-		   ahc_search_action action)
-{
-	struct	 scb *scbp;
-	u_int8_t qinpos;
-	u_int8_t qintail;
-	int	 found;
-
-	qinpos = ahc_inb(ahc, QINPOS);
-	qintail = ahc->qinfifonext;
-	found = 0;
 
 	/*
 	 * Start with an empty queue.  Entries that are not chosen
@@ -5938,28 +4137,36 @@ ahc_search_qinfifo(struct ahc_softc *ahc, int target, char channel,
 	ahc->qinfifonext = qinpos;
 
 	while (qinpos != qintail) {
-		scbp = &ahc->scb_data->scbarray[ahc->qinfifo[qinpos]];
-		if (ahc_match_scb(scbp, target, channel, lun, tag, role)) {
+		scb = &ahc->scb_data->scbarray[ahc->qinfifo[qinpos]];
+		if (ahc_match_scb(ahc, scb, target, channel, lun, tag, role)) {
 			/*
-			 * We found an scb that needs to be removed.
+			 * We found an scb that needs to be acted on.
 			 */
+			found++;
 			switch (action) {
 			case SEARCH_COMPLETE:
-				if (ahc_ccb_status(scbp->ccb) == CAM_REQ_INPROG)
-					ahcsetccbstatus(scbp->ccb, status);
-				ahc_freeze_ccb(scbp->ccb);
-				ahc_done(ahc, scbp);
+			{
+				cam_status ostat;
+
+				ostat = ahc_get_transaction_status(scb);
+				if (ostat == CAM_REQ_INPROG)
+					ahc_set_transaction_status(scb,
+								   status);
+				ahc_freeze_scb(scb);
+				if ((scb->flags & SCB_ACTIVE) == 0)
+					printf("Inactive SCB in qinfifo\n");
+				ahc_done(ahc, scb);
 				break;
+			}
 			case SEARCH_COUNT:
 				ahc->qinfifo[ahc->qinfifonext++] =
-				    scbp->hscb->tag;
+				    scb->hscb->tag;
 				break;
 			case SEARCH_REMOVE:
 				break;
 			}
-			found++;
 		} else {
-			ahc->qinfifo[ahc->qinfifonext++] = scbp->hscb->tag;
+			ahc->qinfifo[ahc->qinfifonext++] = scb->hscb->tag;
 		}
 		qinpos++;
 	}
@@ -5970,197 +4177,141 @@ ahc_search_qinfifo(struct ahc_softc *ahc, int target, char channel,
 		ahc_outb(ahc, KERNEL_QINPOS, ahc->qinfifonext);
 	}
 
-	return (found);
-}
-
-
-static void
-ahc_abort_ccb(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb)
-{
-	union ccb *abort_ccb;
-
-	abort_ccb = ccb->cab.abort_ccb;
-	switch (abort_ccb->ccb_h.func_code) {
-	case XPT_ACCEPT_TARGET_IO:
-	case XPT_IMMED_NOTIFY:
-	case XPT_CONT_TARGET_IO:
-	{
-		struct tmode_tstate *tstate;
-		struct tmode_lstate *lstate;
-		struct ccb_hdr_slist *list;
-		cam_status status;
-
-		status = ahc_find_tmode_devs(ahc, sim, abort_ccb, &tstate,
-					     &lstate, TRUE);
-
-		if (status != CAM_REQ_CMP) {
-			ccb->ccb_h.status = status;
-			break;
-		}
-
-		if (abort_ccb->ccb_h.func_code == XPT_ACCEPT_TARGET_IO)
-			list = &lstate->accept_tios;
-		else if (abort_ccb->ccb_h.func_code == XPT_IMMED_NOTIFY)
-			list = &lstate->immed_notifies;
-		else
-			list = NULL;
-
-		if (list != NULL) {
-			struct ccb_hdr *curelm;
-			int found;
-
-			curelm = SLIST_FIRST(list);
-			found = 0;
-			if (curelm == &abort_ccb->ccb_h) {
-				found = 1;
-				SLIST_REMOVE_HEAD(list, sim_links.sle);
-			} else {
-				while(curelm != NULL) {
-					struct ccb_hdr *nextelm;
-
-					nextelm =
-					    SLIST_NEXT(curelm, sim_links.sle);
-
-					if (nextelm == &abort_ccb->ccb_h) {
-						found = 1;
-						SLIST_NEXT(curelm,
-							   sim_links.sle) =
-						    SLIST_NEXT(nextelm,
-							       sim_links.sle);
-						break;
-					}
-					curelm = nextelm;
-				}
-			}
-
-			if (found) {
-				abort_ccb->ccb_h.status = CAM_REQ_ABORTED;
-				xpt_done(abort_ccb);
-				ccb->ccb_h.status = CAM_REQ_CMP;
-			} else {
-				printf("Not found\n");
-				ccb->ccb_h.status = CAM_PATH_INVALID;
-			}
-			break;
-		}
-		/* FALLTHROUGH */
-	}
-	case XPT_SCSI_IO:
-		/* XXX Fully implement the hard ones */
-		ccb->ccb_h.status = CAM_UA_ABORT;
-		break;
-	default:
-		ccb->ccb_h.status = CAM_REQ_INVALID;
-		break;
-	}
-	xpt_done(ccb);
-}
-
-/*
- * Abort all SCBs that match the given description (target/channel/lun/tag),
- * setting their status to the passed in status if the status has not already
- * been modified from CAM_REQ_INPROG.  This routine assumes that the sequencer
- * is paused before it is called.
- */
-static int
-ahc_abort_scbs(struct ahc_softc *ahc, int target, char channel,
-	       int lun, u_int tag, role_t role, u_int32_t status)
-{
-	struct	scb *scbp;
-	u_int	active_scb;
-	int	i;
-	int	found;
-
-	/* restore this when we're done */
-	active_scb = ahc_inb(ahc, SCBPTR);
-
-	found = ahc_search_qinfifo(ahc, target, channel, lun, SCB_LIST_NULL,
-				   role, CAM_REQUEUE_REQ, SEARCH_COMPLETE);
-
 	/*
 	 * Search waiting for selection list.
 	 */
-	{
-		u_int8_t next, prev;
+	curscbptr = ahc_inb(ahc, SCBPTR);
+	next = ahc_inb(ahc, WAITING_SCBH);  /* Start at head of list. */
+	prev = SCB_LIST_NULL;
 
-		next = ahc_inb(ahc, WAITING_SCBH);  /* Start at head of list. */
-		prev = SCB_LIST_NULL;
+	while (next != SCB_LIST_NULL) {
+		uint8_t scb_index;
 
-		while (next != SCB_LIST_NULL) {
-			u_int8_t scb_index;
+		ahc_outb(ahc, SCBPTR, next);
+		scb_index = ahc_inb(ahc, SCB_TAG);
+		if (scb_index >= ahc->scb_data->numscbs) {
+			panic("Waiting List inconsistency. "
+			      "SCB index == %d, yet numscbs == %d.",
+			      scb_index, ahc->scb_data->numscbs);
+		}
+		scb = &ahc->scb_data->scbarray[scb_index];
+		if (ahc_match_scb(ahc, scb, target, channel,
+				  lun, SCB_LIST_NULL, role)) {
+			/*
+			 * We found an scb that needs to be acted on.
+			 */
+			found++;
+			switch (action) {
+			case SEARCH_COMPLETE:
+			{
+				cam_status ostat;
 
-			ahc_outb(ahc, SCBPTR, next);
-			scb_index = ahc_inb(ahc, SCB_TAG);
-			if (scb_index >= ahc->scb_data->numscbs) {
-				panic("Waiting List inconsistency. "
-				      "SCB index == %d, yet numscbs == %d.",
-				      scb_index, ahc->scb_data->numscbs);
+				next = ahc_rem_wscb(ahc, next, prev);
+				ostat = ahc_get_transaction_status(scb);
+				if (ostat == CAM_REQ_INPROG)
+					ahc_set_transaction_status(scb,
+								   status);
+				ahc_freeze_scb(scb);
+				if ((scb->flags & SCB_ACTIVE) == 0)
+					printf("Inactive SCB in Waiting List\n");
+				ahc_done(ahc, scb);
+				break;
 			}
-			scbp = &ahc->scb_data->scbarray[scb_index];
-			if (ahc_match_scb(scbp, target, channel,
-					  lun, SCB_LIST_NULL, role)) {
-
-				next = ahc_abort_wscb(ahc, next, prev);
-			} else {
-				
+			case SEARCH_COUNT:
 				prev = next;
 				next = ahc_inb(ahc, SCB_NEXT);
+				break;
+			case SEARCH_REMOVE:
+				next = ahc_rem_wscb(ahc, next, prev);
+				break;
 			}
+		} else {
+			
+			prev = next;
+			next = ahc_inb(ahc, SCB_NEXT);
 		}
 	}
-	/*
-	 * Go through the disconnected list and remove any entries we
-	 * have queued for completion, 0'ing their control byte too.
-	 * We save the active SCB and restore it ourselves, so there
-	 * is no reason for this search to restore it too.
-	 */
-	ahc_search_disc_list(ahc, target, channel, lun, tag,
-			     /*stop_on_first*/FALSE, /*remove*/TRUE,
-			     /*save_state*/FALSE);
+	ahc_outb(ahc, SCBPTR, curscbptr);
 
 	/*
-	 * Go through the hardware SCB array looking for commands that
-	 * were active but not on any list.
+	 * And lastly, the untagged holding queues.
 	 */
-	for(i = 0; i < ahc->scb_data->maxhscbs; i++) {
-		u_int scbid;
+	i = 0;
+	if ((ahc->flags & AHC_SCB_BTT) == 0) {
 
-		ahc_outb(ahc, SCBPTR, i);
-		scbid = ahc_inb(ahc, SCB_TAG);
-		scbp = &ahc->scb_data->scbarray[scbid];
-		if (scbid < ahc->scb_data->numscbs
-		 && ahc_match_scb(scbp, target, channel, lun, tag, role))
-			ahc_add_curscb_to_free_list(ahc);
+		maxtarget = 16;
+		if (target != CAM_TARGET_WILDCARD) {
+
+			i = target;
+			if (channel == 'B')
+				i += 8;
+			maxtarget = i + 1;
+		}
+	} else {
+		maxtarget = 0;
 	}
 
-	/*
-	 * Go through the pending CCB list and look for
-	 * commands for this target that are still active.
-	 * These are other tagged commands that were
-	 * disconnected when the reset occured.
-	 */
-	{
-		struct ccb_hdr *ccb_h;
+	for (; i < maxtarget; i++) {
+		struct scb_tailq *untagged_q;
+		struct scb *next_scb;
+
+		untagged_q = &(ahc->untagged_queues[i]);
+		next_scb = TAILQ_FIRST(untagged_q);
+		while (next_scb != NULL) {
+
+			scb = next_scb;
+			next_scb = TAILQ_NEXT(scb, links.tqe);
 
-		ccb_h = ahc->pending_ccbs.lh_first;
-		while (ccb_h != NULL) {
-			scbp = (struct scb *)ccb_h->ccb_scb_ptr;
-			ccb_h = ccb_h->sim_links.le.le_next;
-			if (ahc_match_scb(scbp, target, channel,
-					  lun, tag, role)) {
-				if (ahc_ccb_status(scbp->ccb) == CAM_REQ_INPROG)
-					ahcsetccbstatus(scbp->ccb, status);
-				ahc_freeze_ccb(scbp->ccb);
-				ahc_done(ahc, scbp);
+			/*
+			 * The head of the list may be the currently
+			 * active untagged command for a device.
+			 * We're only searching for commands that
+			 * have not been started.  A transaction
+			 * marked active but still in the qinfifo
+			 * is removed by the qinfifo scanning code
+			 * above.
+			 */
+			if ((scb->flags & SCB_ACTIVE) != 0)
+				continue;
+
+			if (ahc_match_scb(ahc, scb, target, channel,
+					  lun, SCB_LIST_NULL, role)) {
+				/*
+				 * We found an scb that needs to be acted on.
+				 */
 				found++;
+				switch (action) {
+				case SEARCH_COMPLETE:
+				{
+					cam_status ostat;
+
+					ostat = ahc_get_transaction_status(scb);
+					if (ostat == CAM_REQ_INPROG)
+						ahc_set_transaction_status(scb,
+								   status);
+					ahc_freeze_scb(scb);
+					if ((scb->flags & SCB_ACTIVE) == 0)
+						printf("Inactive SCB in untaggedQ\n");
+					ahc_done(ahc, scb);
+					break;
+				}
+				case SEARCH_REMOVE:
+					TAILQ_REMOVE(untagged_q, scb,
+						     links.tqe);
+					break;
+				case SEARCH_COUNT:
+					break;
+				}
 			}
 		}
 	}
-	ahc_outb(ahc, SCBPTR, active_scb);
-	return found;
+
+	if (action == SEARCH_COMPLETE)
+		ahc_release_untagged_queues(ahc);
+	return (found);
 }
 
-static int
+int
 ahc_search_disc_list(struct ahc_softc *ahc, int target, char channel,
 		     int lun, u_int tag, int stop_on_first, int remove,
 		     int save_state)
@@ -6192,8 +4343,14 @@ ahc_search_disc_list(struct ahc_softc *ahc, int target, char channel,
 			      "SCB index == %d, yet numscbs == %d.",
 			      scb_index, ahc->scb_data->numscbs);
 		}
+
+		if (next == prev) {
+			panic("Disconnected List Loop. "
+			      "cur SCBPTR == %x, prev SCBPTR == %x.",
+			      next, prev);
+		}
 		scbp = &ahc->scb_data->scbarray[scb_index];
-		if (ahc_match_scb(scbp, target, channel, lun,
+		if (ahc_match_scb(ahc, scbp, target, channel, lun,
 				  tag, ROLE_INITIATOR)) {
 			count++;
 			if (remove) {
@@ -6215,6 +4372,10 @@ ahc_search_disc_list(struct ahc_softc *ahc, int target, char channel,
 	return (count);
 }
 
+/*
+ * Remove an SCB from the on chip list of disconnected transactions.
+ * This is empty/unused if we are not performing SCB paging.
+ */
 static u_int
 ahc_rem_scb_from_disc_list(struct ahc_softc *ahc, u_int prev, u_int scbptr)
 {
@@ -6236,10 +4397,18 @@ ahc_rem_scb_from_disc_list(struct ahc_softc *ahc, u_int prev, u_int scbptr)
 	return (next);
 }
 
+/*
+ * Add the SCB as selected by SCBPTR onto the on chip list of
+ * free hardware SCBs.  This list is empty/unused if we are not
+ * performing SCB paging.
+ */
 static void
 ahc_add_curscb_to_free_list(struct ahc_softc *ahc)
 {
-	/* Invalidate the tag so that ahc_find_scb doesn't think it's active */
+	/*
+	 * Invalidate the tag so that our abort
+	 * routines don't think it's active.
+	 */
 	ahc_outb(ahc, SCB_TAG, SCB_LIST_NULL);
 
 	ahc_outb(ahc, SCB_NEXT, ahc_inb(ahc, FREE_SCBH));
@@ -6251,7 +4420,7 @@ ahc_add_curscb_to_free_list(struct ahc_softc *ahc)
  * scb that follows the one that we remove.
  */
 static u_int
-ahc_abort_wscb(struct ahc_softc *ahc, u_int scbpos, u_int prev)
+ahc_rem_wscb(struct ahc_softc *ahc, u_int scbpos, u_int prev)
 {       
 	u_int curscb, next;
 
@@ -6294,26 +4463,146 @@ ahc_abort_wscb(struct ahc_softc *ahc, u_int scbpos, u_int prev)
 	return next;
 }
 
-static void
-ahc_clear_intstat(struct ahc_softc *ahc)
+/******************************** Error Handling ******************************/
+/*
+ * Abort all SCBs that match the given description (target/channel/lun/tag),
+ * setting their status to the passed in status if the status has not already
+ * been modified from CAM_REQ_INPROG.  This routine assumes that the sequencer
+ * is paused before it is called.
+ */
+int
+ahc_abort_scbs(struct ahc_softc *ahc, int target, char channel,
+	       int lun, u_int tag, role_t role, uint32_t status)
 {
-	/* Clear any interrupt conditions this may have caused */
-	ahc_outb(ahc, CLRSINT0, CLRSELDO|CLRSELDI|CLRSELINGO);
-	ahc_outb(ahc, CLRSINT1, CLRSELTIMEO|CLRATNO|CLRSCSIRSTI
-				|CLRBUSFREE|CLRSCSIPERR|CLRPHASECHG|
-				CLRREQINIT);
-	ahc_outb(ahc, CLRINT, CLRSCSIINT);
+	struct	scb *scbp;
+	struct	scb *scbp_next;
+	u_int	active_scb;
+	int	i;
+	int	maxtarget;
+	int	found;
+
+	/*
+	 * Don't attempt to run any queued untagged transactions
+	 * until we are done with the abort process.
+	 */
+	ahc_freeze_untagged_queues(ahc);
+
+	/* restore this when we're done */
+	active_scb = ahc_inb(ahc, SCBPTR);
+
+	found = ahc_search_qinfifo(ahc, target, channel, lun, SCB_LIST_NULL,
+				   role, CAM_REQUEUE_REQ, SEARCH_COMPLETE);
+
+	/*
+	 * Clean out the busy target table for any untagged commands.
+	 */
+	i = 0;
+	maxtarget = 16;
+	if (target != CAM_TARGET_WILDCARD) {
+		i = target;
+		if (channel == 'B')
+			i += 8;
+		maxtarget = i + 1;
+	}
+
+	for (;i < maxtarget; i++) {
+		u_int scbid;
+
+		scbid = ahc_index_busy_tcl(ahc, BUILD_TCL(i << 4, 0),
+					   /*unbusy*/FALSE);
+		scbp = &ahc->scb_data->scbarray[scbid];
+		if (scbid < ahc->scb_data->numscbs
+		 && ahc_match_scb(ahc, scbp, target, channel, lun, tag, role)) {
+			u_int minlun;
+			u_int maxlun;
+
+			if (lun == CAM_LUN_WILDCARD) {
+
+				/*
+				 * Unless we are using an SCB based
+				 * busy targets table, there is only
+				 * one table entry for all luns of
+				 * a target.
+				 */
+				minlun = 0;
+				maxlun = 1;
+				if ((ahc->flags & AHC_SCB_BTT) != 0)
+					maxlun = AHC_NUM_LUNS;
+			} else {
+				minlun = lun;
+				maxlun = lun + 1;
+			}
+			while (minlun < maxlun) {
+				ahc_index_busy_tcl(ahc, BUILD_TCL(i << 4,
+						   minlun), /*unbusy*/TRUE);
+				minlun++;
+			}
+		}
+	}
+
+	/*
+	 * Go through the disconnected list and remove any entries we
+	 * have queued for completion, 0'ing their control byte too.
+	 * We save the active SCB and restore it ourselves, so there
+	 * is no reason for this search to restore it too.
+	 */
+	ahc_search_disc_list(ahc, target, channel, lun, tag,
+			     /*stop_on_first*/FALSE, /*remove*/TRUE,
+			     /*save_state*/FALSE);
+
+	/*
+	 * Go through the hardware SCB array looking for commands that
+	 * were active but not on any list.
+	 */
+	for(i = 0; i < ahc->scb_data->maxhscbs; i++) {
+		u_int scbid;
+
+		ahc_outb(ahc, SCBPTR, i);
+		scbid = ahc_inb(ahc, SCB_TAG);
+		scbp = &ahc->scb_data->scbarray[scbid];
+		if (scbid < ahc->scb_data->numscbs
+		 && ahc_match_scb(ahc, scbp, target, channel, lun, tag, role))
+			ahc_add_curscb_to_free_list(ahc);
+	}
+
+	/*
+	 * Go through the pending CCB list and look for
+	 * commands for this target that are still active.
+	 * These are other tagged commands that were
+	 * disconnected when the reset occured.
+	 */
+	scbp_next = LIST_FIRST(&ahc->pending_scbs);
+	while (scbp_next != NULL) {
+		scbp = scbp_next;
+		scbp_next = LIST_NEXT(scbp, pending_links);
+		if (ahc_match_scb(ahc, scbp, target, channel, lun, tag, role)) {
+			cam_status ostat;
+
+			ostat = ahc_get_transaction_status(scbp);
+			if (ostat == CAM_REQ_INPROG)
+				ahc_set_transaction_status(scbp, status);
+			ahc_freeze_scb(scbp);
+			if ((scbp->flags & SCB_ACTIVE) == 0)
+				printf("Inactive SCB on pending list\n");
+			ahc_done(ahc, scbp);
+			found++;
+		}
+	}
+	ahc_outb(ahc, SCBPTR, active_scb);
+	ahc_platform_abort_scbs(ahc, target, channel, lun, tag, role, status);
+	ahc_release_untagged_queues(ahc);
+	return found;
 }
 
 static void
 ahc_reset_current_bus(struct ahc_softc *ahc)
 {
-	u_int8_t scsiseq;
+	uint8_t scsiseq;
 
 	ahc_outb(ahc, SIMODE1, ahc_inb(ahc, SIMODE1) & ~ENSCSIRST);
 	scsiseq = ahc_inb(ahc, SCSISEQ);
 	ahc_outb(ahc, SCSISEQ, scsiseq | SCSIRSTO);
-	DELAY(AHC_BUSRESET_DELAY);
+	ahc_delay(AHC_BUSRESET_DELAY);
 	/* Turn off the bus reset */
 	ahc_outb(ahc, SCSISEQ, scsiseq & ~SCSIRSTO);
 
@@ -6323,19 +4612,23 @@ ahc_reset_current_bus(struct ahc_softc *ahc)
 	ahc_outb(ahc, SIMODE1, ahc_inb(ahc, SIMODE1) | ENSCSIRST);
 }
 
-static int
+int
 ahc_reset_channel(struct ahc_softc *ahc, char channel, int initiate_reset)
 {
-	struct	cam_path *path;
+	struct	ahc_devinfo devinfo;
 	u_int	initiator, target, max_scsiid;
 	u_int	sblkctl;
-	u_int	our_id;
 	int	found;
 	int	restart_needed;
 	char	cur_channel;
 
 	ahc->pending_device = NULL;
 
+	ahc_compile_devinfo(&devinfo,
+			    CAM_TARGET_WILDCARD,
+			    CAM_TARGET_WILDCARD,
+			    CAM_LUN_WILDCARD,
+			    channel, ROLE_UNKNOWN);
 	pause_sequencer(ahc);
 
 	/*
@@ -6344,9 +4637,11 @@ ahc_reset_channel(struct ahc_softc *ahc, char channel, int initiate_reset)
 	 * before the reset occurred.
 	 */
 	ahc_run_qoutfifo(ahc);
+#if AHC_TARGET_MODE
 	if ((ahc->flags & AHC_TARGETMODE) != 0) {
 		ahc_run_tqinfifo(ahc, /*paused*/TRUE);
 	}
+#endif
 
 	/*
 	 * Reset the bus if we are initiating this reset
@@ -6385,6 +4680,8 @@ ahc_reset_channel(struct ahc_softc *ahc, char channel, int initiate_reset)
 		 * a race in the sequencer that could cause corruption
 		 * of our Q pointers by starting over from index 1.
 		 */
+		*((uint32_t *)(&ahc->qoutfifo[ahc->qoutfifonext & ~0x3]))
+		    = 0xFFFFFFFF;
 		ahc->qoutfifonext = 0;
 		if ((ahc->features & AHC_QUEUE_REGS) != 0)
 			ahc_outb(ahc, SDSCB_QOFF, 0);
@@ -6412,16 +4709,10 @@ ahc_reset_channel(struct ahc_softc *ahc, char channel, int initiate_reset)
 	found = ahc_abort_scbs(ahc, CAM_TARGET_WILDCARD, channel,
 			       CAM_LUN_WILDCARD, SCB_LIST_NULL,
 			       ROLE_UNKNOWN, CAM_SCSI_BUS_RESET);
-	if (channel == 'B') {
-		path = ahc->path_b;
-		our_id = ahc->our_id_b;
-	} else {
-		path = ahc->path;
-		our_id = ahc->our_id;
-	}
 
 	max_scsiid = (ahc->features & AHC_WIDE) ? 15 : 7;
 
+#ifdef AHC_TARGET_MODE
 	/*
 	 * Send an immediate notify ccb to all target more peripheral
 	 * drivers affected by this action.
@@ -6445,9 +4736,10 @@ ahc_reset_channel(struct ahc_softc *ahc, char channel, int initiate_reset)
 			ahc_send_lstate_events(ahc, lstate);
 		}
 	}
-
+#endif
 	/* Notify the XPT that a bus reset occurred */
-	xpt_async(AC_BUS_RESET, path, NULL);
+	ahc_send_async(ahc, devinfo.channel, CAM_TARGET_WILDCARD,
+		       CAM_LUN_WILDCARD, AC_TRANSFER_NEG);
 
 	/*
 	 * Revert to async/narrow transfers until we renegotiate.
@@ -6462,12 +4754,11 @@ ahc_reset_channel(struct ahc_softc *ahc, char channel, int initiate_reset)
 			ahc_compile_devinfo(&devinfo, target, initiator,
 					    CAM_LUN_WILDCARD,
 					    channel, ROLE_UNKNOWN);
-			ahc_set_width(ahc, &devinfo, path,
-				      MSG_EXT_WDTR_BUS_8_BIT,
+			ahc_set_width(ahc, &devinfo, MSG_EXT_WDTR_BUS_8_BIT,
 				      AHC_TRANS_CUR, /*paused*/TRUE);
-			ahc_set_syncrate(ahc, &devinfo, path,
-					 /*syncrate*/NULL, /*period*/0,
-					 /*offset*/0, AHC_TRANS_CUR,
+			ahc_set_syncrate(ahc, &devinfo, /*syncrate*/NULL,
+					 /*period*/0, /*offset*/0,
+					 /*ppr_options*/0, AHC_TRANS_CUR,
 					 /*paused*/TRUE);
 		}
 	}
@@ -6479,298 +4770,92 @@ ahc_reset_channel(struct ahc_softc *ahc, char channel, int initiate_reset)
 	return found;
 }
 
-static int
-ahc_match_scb(struct scb *scb, int target, char channel,
-	      int lun, u_int tag, role_t role)
-{
-	int targ = SCB_TARGET(scb);
-	char chan = SCB_CHANNEL(scb);
-	int slun = SCB_LUN(scb);
-	int match;
-
-	match = ((chan == channel) || (channel == ALL_CHANNELS));
-	if (match != 0)
-		match = ((targ == target) || (target == CAM_TARGET_WILDCARD));
-	if (match != 0)
-		match = ((lun == slun) || (lun == CAM_LUN_WILDCARD));
-	if (match != 0) {
-		int group;
-
-		group = XPT_FC_GROUP(scb->ccb->ccb_h.func_code);
-		if (role == ROLE_INITIATOR) {
-			match = (group == XPT_FC_GROUP_COMMON)
-			      && ((tag == scb->hscb->tag)
-			       || (tag == SCB_LIST_NULL));
-		} else if (role == ROLE_TARGET) {
-			match = (group == XPT_FC_GROUP_TMODE)
-			      && ((tag == scb->ccb->csio.tag_id)
-			       || (tag == SCB_LIST_NULL));
-		}
-	}
-
-	return match;
-}
-
-static void
-ahc_construct_sdtr(struct ahc_softc *ahc, u_int period, u_int offset)
-{
-	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
-	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR_LEN;
-	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_SDTR;
-	ahc->msgout_buf[ahc->msgout_index++] = period;
-	ahc->msgout_buf[ahc->msgout_index++] = offset;
-	ahc->msgout_len += 5;
-}
-
-static void
-ahc_construct_wdtr(struct ahc_softc *ahc, u_int bus_width)
-{
-	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXTENDED;
-	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_WDTR_LEN;
-	ahc->msgout_buf[ahc->msgout_index++] = MSG_EXT_WDTR;
-	ahc->msgout_buf[ahc->msgout_index++] = bus_width;
-	ahc->msgout_len += 4;
-}
 
+/***************************** Residual Processing ****************************/
+/*
+ * Calculate the residual for a just completed SCB.
+ */
 static void
 ahc_calc_residual(struct scb *scb)
 {
-	struct	hardware_scb *hscb;
-
-	hscb = scb->hscb;
+	struct hardware_scb *hscb;
+	struct status_pkt *spkt;
+	uint32_t resid;
 
 	/*
-	 * If the disconnected flag is still set, this is bogus
-	 * residual information left over from a sequencer
-	 * pagin/pageout, so ignore this case.
+	 * 5 cases.
+	 * 1) No residual.
+	 *    SG_RESID_VALID clear in sgptr.
+	 * 2) Transferless command
+	 * 3) Never performed any transfers.
+	 *    sgptr has SG_FULL_RESID set.
+	 * 4) No residual but target did not
+	 *    save data pointers after the
+	 *    last transfer, so sgptr was
+	 *    never updated.
+	 * 5) We have a partial residual.
+	 *    Use residual_sgptr to determine
+	 *    where we are.
 	 */
-	if ((scb->hscb->control & DISCONNECTED) == 0) {
-		u_int32_t resid;
-		int	  resid_sgs;
-		int	  sg;
-		
+
+	hscb = scb->hscb;
+	if ((hscb->sgptr & SG_RESID_VALID) == 0)
+		/* Case 1 */
+		return;
+	hscb->sgptr &= ~SG_RESID_VALID;
+
+	if ((hscb->sgptr & SG_LIST_NULL) != 0)
+		/* Case 2 */
+		return;
+
+	spkt = &hscb->shared_data.status;
+	if ((hscb->sgptr & SG_FULL_RESID) != 0) {
+		/* Case 3 */
+		resid = ahc_get_transfer_length(scb);
+	} else if ((spkt->residual_sg_ptr & SG_LIST_NULL) != 0) {
+		/* Case 4 */
+		return;
+	} else if ((spkt->residual_sg_ptr & ~SG_PTR_MASK) != 0) {
+		panic("Bogus resid sgptr value 0x%x\n", spkt->residual_sg_ptr);
+	} else {
+		struct ahc_dma_seg *sg;
+
 		/*
 		 * Remainder of the SG where the transfer
-		 * stopped.
+		 * stopped.  
 		 */
-		resid = (hscb->residual_data_count[2] << 16)
-		      |	(hscb->residual_data_count[1] <<8)
-		      |	(hscb->residual_data_count[0]);
+		resid = spkt->residual_datacnt & AHC_SG_LEN_MASK;
+		sg = ahc_sg_bus_to_virt(scb,
+					spkt->residual_sg_ptr & SG_PTR_MASK);
+
+		/* The residual sg_ptr always points to the next sg */
+		sg--;
 
 		/*
 		 * Add up the contents of all residual
 		 * SG segments that are after the SG where
 		 * the transfer stopped.
 		 */
-		resid_sgs = scb->hscb->residual_SG_count - 1/*current*/;
-		sg = scb->sg_count - resid_sgs;
-		while (resid_sgs > 0) {
-
-			resid += scb->sg_list[sg].len;
+		while ((sg->len & AHC_DMA_LAST_SEG) == 0) {
 			sg++;
-			resid_sgs--;
-		}
-		if ((scb->flags & SCB_SENSE) == 0) {
-
-			scb->ccb->csio.resid = resid;
-		} else {
-
-			scb->ccb->csio.sense_resid = resid;
-		}
-
-#ifdef AHC_DEBUG
-		if (ahc_debug & AHC_SHOWMISC) {
-			xpt_print_path(scb->ccb->ccb_h.path);
-			printf("Handled Residual of %d bytes\n", resid);
-		}
-#endif
-	}
-
-	/*
-	 * Clean out the residual information in this SCB for its
-	 * next consumer.
-	 */
-	hscb->residual_SG_count = 0;
-}
-
-static void
-ahc_update_pending_syncrates(struct ahc_softc *ahc)
-{
-	struct	ccb_hdr *ccbh;
-	int	pending_ccb_count;
-	int	i;
-	u_int	saved_scbptr;
-
-	/*
-	 * Traverse the pending SCB list and ensure that all of the
-	 * SCBs there have the proper settings.
-	 */
-	ccbh = LIST_FIRST(&ahc->pending_ccbs);
-	pending_ccb_count = 0;
-	while (ccbh != NULL) {
-		struct ahc_devinfo devinfo;
-		union  ccb *ccb;
-		struct scb *pending_scb;
-		struct hardware_scb *pending_hscb;
-		struct ahc_initiator_tinfo *tinfo;
-		struct tmode_tstate *tstate;
-		u_int  our_id, remote_id;
-		
-		ccb = (union ccb*)ccbh;
-		pending_scb = (struct scb *)ccbh->ccb_scb_ptr;
-		pending_hscb = pending_scb->hscb;
-		if (ccbh->func_code == XPT_CONT_TARGET_IO) {
-			our_id = ccb->ccb_h.target_id;
-			remote_id = ccb->ctio.init_id;
-		} else {
-			our_id = SCB_IS_SCSIBUS_B(pending_scb)
-			       ? ahc->our_id_b : ahc->our_id;
-			remote_id = ccb->ccb_h.target_id;
-		}
-		ahc_compile_devinfo(&devinfo, our_id, remote_id,
-				    SCB_LUN(pending_scb),
-				    SCB_CHANNEL(pending_scb),
-				    ROLE_UNKNOWN);
-		tinfo = ahc_fetch_transinfo(ahc, devinfo.channel,
-					    our_id, remote_id, &tstate);
-		pending_hscb->control &= ~ULTRAENB;
-		if ((tstate->ultraenb & devinfo.target_mask) != 0)
-			pending_hscb->control |= ULTRAENB;
-		pending_hscb->scsirate = tinfo->scsirate;
-		pending_hscb->scsioffset = tinfo->current.offset;
-		pending_ccb_count++;
-		ccbh = LIST_NEXT(ccbh, sim_links.le);
-	}
-
-	if (pending_ccb_count == 0)
-		return;
-
-	saved_scbptr = ahc_inb(ahc, SCBPTR);
-	/* Ensure that the hscbs down on the card match the new information */
-	for (i = 0; i < ahc->scb_data->maxhscbs; i++) {
-		u_int scb_tag;
-
-		ahc_outb(ahc, SCBPTR, i);
-		scb_tag = ahc_inb(ahc, SCB_TAG);
-		if (scb_tag != SCB_LIST_NULL) {
-			struct	ahc_devinfo devinfo;
-			union  ccb *ccb;
-			struct	scb *pending_scb;
-			struct	hardware_scb *pending_hscb;
-			struct	ahc_initiator_tinfo *tinfo;
-			struct	tmode_tstate *tstate;
-			u_int	our_id, remote_id;
-			u_int	control;
-
-			pending_scb = &ahc->scb_data->scbarray[scb_tag];
-			if (pending_scb->flags == SCB_FREE)
-				continue;
-			pending_hscb = pending_scb->hscb;
-			ccb = pending_scb->ccb;
-			if (ccb->ccb_h.func_code == XPT_CONT_TARGET_IO) {
-				our_id = ccb->ccb_h.target_id;
-				remote_id = ccb->ctio.init_id;
-			} else {
-				our_id = SCB_IS_SCSIBUS_B(pending_scb)
-				       ? ahc->our_id_b : ahc->our_id;
-				remote_id = ccb->ccb_h.target_id;
-			}
-			ahc_compile_devinfo(&devinfo, our_id, remote_id,
-					    SCB_LUN(pending_scb),
-					    SCB_CHANNEL(pending_scb),
-					    ROLE_UNKNOWN);
-			tinfo = ahc_fetch_transinfo(ahc, devinfo.channel,
-						    our_id, remote_id, &tstate);
-			control = ahc_inb(ahc, SCB_CONTROL);
-			control &= ~ULTRAENB;
-			if ((tstate->ultraenb & devinfo.target_mask) != 0)
-				control |= ULTRAENB;
-			ahc_outb(ahc, SCB_CONTROL, control);
-			ahc_outb(ahc, SCB_SCSIRATE, tinfo->scsirate);
-			ahc_outb(ahc, SCB_SCSIOFFSET, tinfo->current.offset);
+			resid += sg->len & AHC_SG_LEN_MASK;
 		}
 	}
-	ahc_outb(ahc, SCBPTR, saved_scbptr);
-}
-
-#if UNUSED
-static void
-ahc_dump_targcmd(struct target_cmd *cmd)
-{
-	u_int8_t *byte;
-	u_int8_t *last_byte;
-	int i;
-
-	byte = &cmd->initiator_channel;
-	/* Debugging info for received commands */
-	last_byte = &cmd[1].initiator_channel;
+	if ((scb->flags & SCB_SENSE) == 0)
+		ahc_set_residual(scb, resid);
+	else
+		ahc_set_sense_residual(scb, resid);
 
-	i = 0;
-	while (byte < last_byte) {
-		if (i == 0)
-			printf("\t");
-		printf("%#x", *byte++);
-		i++;
-		if (i == 8) {
-			printf("\n");
-			i = 0;
-		} else {
-			printf(", ");
-		}
+#ifdef AHC_DEBUG
+	if (ahc_debug & AHC_SHOWMISC) {
+		ahc_print_path(ahc, scb);
+		printf("Handled Residual of %d bytes\n", resid);
 	}
-}
 #endif
-
-static void
-ahc_shutdown(void *arg, int howto)
-{
-	struct	ahc_softc *ahc;
-	int	i;
-	u_int	sxfrctl1_a, sxfrctl1_b;
-
-	ahc = (struct ahc_softc *)arg;
-
-	pause_sequencer(ahc);
-
-	/*
-	 * Preserve the value of the SXFRCTL1 register for all channels.
-	 * It contains settings that affect termination and we don't want
-	 * to disturb the integrity of the bus during shutdown in case
-	 * we are in a multi-initiator setup.
-	 */
-	sxfrctl1_b = 0;
-	if ((ahc->features & AHC_TWIN) != 0) {
-		u_int sblkctl;
-
-		sblkctl = ahc_inb(ahc, SBLKCTL);
-		ahc_outb(ahc, SBLKCTL, sblkctl | SELBUSB);
-		sxfrctl1_b = ahc_inb(ahc, SXFRCTL1);
-		ahc_outb(ahc, SBLKCTL, sblkctl & ~SELBUSB);
-	}
-
-	sxfrctl1_a = ahc_inb(ahc, SXFRCTL1);
-
-	/* This will reset most registers to 0, but not all */
-	ahc_reset(ahc);
-
-	if ((ahc->features & AHC_TWIN) != 0) {
-		u_int sblkctl;
-
-		sblkctl = ahc_inb(ahc, SBLKCTL);
-		ahc_outb(ahc, SBLKCTL, sblkctl | SELBUSB);
-		ahc_outb(ahc, SXFRCTL1, sxfrctl1_b);
-		ahc_outb(ahc, SBLKCTL, sblkctl & ~SELBUSB);
-	}
-	ahc_outb(ahc, SXFRCTL1, sxfrctl1_a);
-
-	ahc_outb(ahc, SCSISEQ, 0);
-	ahc_outb(ahc, SXFRCTL0, 0);
-	ahc_outb(ahc, DSPCISTATUS, 0);
-
-	for (i = TARG_SCSIRATE; i < HA_274_BIOSCTRL; i++)
-		ahc_outb(ahc, i, 0);
 }
 
+/******************************* Target Mode **********************************/
+#ifdef AHC_TARGET_MODE
 /*
  * Add a target mode event to this lun's queue
  */
@@ -6825,7 +4910,7 @@ ahc_queue_lstate_event(struct ahc_softc *ahc, struct tmode_lstate *lstate,
  * Send any target mode events queued up waiting
  * for immediate notify resources.
  */
-static void
+void
 ahc_send_lstate_events(struct ahc_softc *ahc, struct tmode_lstate *lstate)
 {
 	struct ccb_hdr *ccbh;
@@ -6856,3 +4941,872 @@ ahc_send_lstate_events(struct ahc_softc *ahc, struct tmode_lstate *lstate)
 			lstate->event_r_idx = 0;
 	}
 }
+#endif
+
+/******************** Sequencer Program Patching/Download *********************/
+
+#ifdef AHC_DUMP_SEQ
+void
+ahc_dumpseq(struct ahc_softc* ahc)
+{
+	int i;
+	int max_prog;
+
+	if ((ahc->chip & AHC_BUS_MASK) < AHC_PCI)
+		max_prog = 448;
+	else if ((ahc->features & AHC_ULTRA2) != 0)
+		max_prog = 768;
+	else
+		max_prog = 512;
+
+	ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE|LOADRAM);
+	ahc_outb(ahc, SEQADDR0, 0);
+	ahc_outb(ahc, SEQADDR1, 0);
+	for (i = 0; i < max_prog; i++) {
+		uint8_t ins_bytes[4];
+
+		ahc_insb(ahc, SEQRAM, ins_bytes, 4);
+		printf("0x%08x\n", ins_bytes[0] << 24
+				 | ins_bytes[1] << 16
+				 | ins_bytes[2] << 8
+				 | ins_bytes[3]);
+	}
+}
+#endif
+
+static void
+ahc_loadseq(struct ahc_softc *ahc)
+{
+	struct patch *cur_patch;
+	u_int i;
+	int downloaded;
+	u_int skip_addr;
+	uint8_t download_consts[4];
+
+	/* Setup downloadable constant table */
+	download_consts[QOUTFIFO_OFFSET] = 0;
+	if (ahc->targetcmds != NULL)
+		download_consts[QOUTFIFO_OFFSET] += 32;
+	download_consts[QINFIFO_OFFSET] = download_consts[QOUTFIFO_OFFSET] + 1;
+	download_consts[CACHESIZE_MASK] = ahc->pci_cachesize - 1;
+	download_consts[INVERTED_CACHESIZE_MASK] = ~(ahc->pci_cachesize - 1);
+
+	cur_patch = patches;
+	downloaded = 0;
+	skip_addr = 0;
+	ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE|LOADRAM);
+	ahc_outb(ahc, SEQADDR0, 0);
+	ahc_outb(ahc, SEQADDR1, 0);
+
+	for (i = 0; i < sizeof(seqprog)/4; i++) {
+		if (ahc_check_patch(ahc, &cur_patch, i, &skip_addr) == 0) {
+			/*
+			 * Don't download this instruction as it
+			 * is in a patch that was removed.
+			 */
+			continue;
+		}
+		ahc_download_instr(ahc, i, download_consts);
+		downloaded++;
+	}
+	ahc_outb(ahc, SEQCTL, PERRORDIS|FAILDIS|FASTMODE);
+	restart_sequencer(ahc);
+
+	if (bootverbose)
+		printf(" %d instructions downloaded\n", downloaded);
+}
+
+static int
+ahc_check_patch(struct ahc_softc *ahc, struct patch **start_patch,
+		u_int start_instr, u_int *skip_addr)
+{
+	struct	patch *cur_patch;
+	struct	patch *last_patch;
+	u_int	num_patches;
+
+	num_patches = sizeof(patches)/sizeof(struct patch);
+	last_patch = &patches[num_patches];
+	cur_patch = *start_patch;
+
+	while (cur_patch < last_patch && start_instr == cur_patch->begin) {
+
+		if (cur_patch->patch_func(ahc) == 0) {
+
+			/* Start rejecting code */
+			*skip_addr = start_instr + cur_patch->skip_instr;
+			cur_patch += cur_patch->skip_patch;
+		} else {
+			/* Accepted this patch.  Advance to the next
+			 * one and wait for our intruction pointer to
+			 * hit this point.
+			 */
+			cur_patch++;
+		}
+	}
+
+	*start_patch = cur_patch;
+	if (start_instr < *skip_addr)
+		/* Still skipping */
+		return (0);
+
+	return (1);
+}
+
+static void
+ahc_download_instr(struct ahc_softc *ahc, u_int instrptr, uint8_t *dconsts)
+{
+	union	ins_formats instr;
+	struct	ins_format1 *fmt1_ins;
+	struct	ins_format3 *fmt3_ins;
+	u_int	opcode;
+
+	/* Structure copy */
+	instr = *(union ins_formats*)&seqprog[instrptr * 4];
+
+#if BYTE_ORDER == BIG_ENDIAN
+	opcode = instr.format.bytes[0];
+	instr.format.bytes[0] = instr.format.bytes[3];
+	instr.format.bytes[3] = opcode;
+	opcode = instr.format.bytes[1];
+	instr.format.bytes[1] = instr.format.bytes[2];
+	instr.format.bytes[2] = opcode;
+#endif
+
+	fmt1_ins = &instr.format1;
+	fmt3_ins = NULL;
+
+	/* Pull the opcode */
+	opcode = instr.format1.opcode;
+	switch (opcode) {
+	case AIC_OP_JMP:
+	case AIC_OP_JC:
+	case AIC_OP_JNC:
+	case AIC_OP_CALL:
+	case AIC_OP_JNE:
+	case AIC_OP_JNZ:
+	case AIC_OP_JE:
+	case AIC_OP_JZ:
+	{
+		struct patch *cur_patch;
+		int address_offset;
+		u_int address;
+		u_int skip_addr;
+		u_int i;
+
+		fmt3_ins = &instr.format3;
+		address_offset = 0;
+		address = fmt3_ins->address;
+		cur_patch = patches;
+		skip_addr = 0;
+
+		for (i = 0; i < address;) {
+
+			ahc_check_patch(ahc, &cur_patch, i, &skip_addr);
+
+			if (skip_addr > i) {
+				int end_addr;
+
+				end_addr = MIN(address, skip_addr);
+				address_offset += end_addr - i;
+				i = skip_addr;
+			} else {
+				i++;
+			}
+		}
+		address -= address_offset;
+		fmt3_ins->address = address;
+		/* FALLTHROUGH */
+	}
+	case AIC_OP_OR:
+	case AIC_OP_AND:
+	case AIC_OP_XOR:
+	case AIC_OP_ADD:
+	case AIC_OP_ADC:
+	case AIC_OP_BMOV:
+		if (fmt1_ins->parity != 0) {
+			fmt1_ins->immediate = dconsts[fmt1_ins->immediate];
+		}
+		fmt1_ins->parity = 0;
+		/* FALLTHROUGH */
+	case AIC_OP_ROL:
+		if ((ahc->features & AHC_ULTRA2) != 0) {
+			int i, count;
+
+			/* Calculate odd parity for the instruction */
+			for (i = 0, count = 0; i < 31; i++) {
+				uint32_t mask;
+
+				mask = 0x01 << i;
+				if ((instr.integer & mask) != 0)
+					count++;
+			}
+			if ((count & 0x01) == 0)
+				instr.format1.parity = 1;
+		} else {
+			/* Compress the instruction for older sequencers */
+			if (fmt3_ins != NULL) {
+				instr.integer =
+					fmt3_ins->immediate
+				      | (fmt3_ins->source << 8)
+				      | (fmt3_ins->address << 16)
+				      |	(fmt3_ins->opcode << 25);
+			} else {
+				instr.integer =
+					fmt1_ins->immediate
+				      | (fmt1_ins->source << 8)
+				      | (fmt1_ins->destination << 16)
+				      |	(fmt1_ins->ret << 24)
+				      |	(fmt1_ins->opcode << 25);
+			}
+		}
+#if BYTE_ORDER == BIG_ENDIAN
+		opcode = instr.format.bytes[0];
+		instr.format.bytes[0] = instr.format.bytes[3];
+		instr.format.bytes[3] = opcode;
+		opcode = instr.format.bytes[1];
+		instr.format.bytes[1] = instr.format.bytes[2];
+		instr.format.bytes[2] = opcode;
+#endif
+		ahc_outsb(ahc, SEQRAM, instr.bytes, 4);
+		break;
+	default:
+		panic("Unknown opcode encountered in seq program");
+		break;
+	}
+}
+
+void
+ahc_dump_card_state(struct ahc_softc *ahc)
+{
+	struct scb *scb;
+	struct scb_tailq *untagged_q;
+	int target;
+	int maxtarget;
+	int i;
+	uint8_t qinpos;
+	uint8_t qintail;
+	uint8_t qoutpos;
+	uint8_t scb_index;
+	uint8_t saved_scbptr;
+
+	saved_scbptr = ahc_inb(ahc, SCBPTR);
+
+	printf("SCB count = %d\n", ahc->scb_data->numscbs);
+	/* QINFIFO */
+	printf("QINFIFO entries: ");
+	qinpos = ahc_inb(ahc, QINPOS);
+	qintail = ahc->qinfifonext;
+	while (qinpos != qintail) {
+		printf("%d ", ahc->qinfifo[qinpos]);
+		qinpos++;
+	}
+	printf("\n");
+
+	printf("Waiting Queue entries: ");
+	scb_index = ahc_inb(ahc, WAITING_SCBH);
+	i = 0;
+	while (scb_index != SCB_LIST_NULL && i++ < 256) {
+		ahc_outb(ahc, SCBPTR, scb_index);
+		printf("%d:%d ", scb_index, ahc_inb(ahc, SCB_TAG));
+		scb_index = ahc_inb(ahc, SCB_NEXT);
+	}
+	printf("\n");
+
+	printf("Disconnected Queue entries: ");
+	scb_index = ahc_inb(ahc, DISCONNECTED_SCBH);
+	i = 0;
+	while (scb_index != SCB_LIST_NULL && i++ < 256) {
+		ahc_outb(ahc, SCBPTR, scb_index);
+		printf("%d:%d ", scb_index, ahc_inb(ahc, SCB_TAG));
+		scb_index = ahc_inb(ahc, SCB_NEXT);
+	}
+	printf("\n");
+		
+	printf("QOUTFIFO entries: ");
+	qoutpos = ahc->qoutfifonext;
+	i = 0;
+	while (ahc->qoutfifo[qoutpos] != SCB_LIST_NULL && i++ < 256) {
+		printf("%d ", ahc->qoutfifo[qoutpos]);
+		qoutpos++;
+	}
+	printf("\n");
+
+	printf("Sequencer Free SCB List: ");
+	scb_index = ahc_inb(ahc, FREE_SCBH);
+	i = 0;
+	while (scb_index != SCB_LIST_NULL && i++ < 256) {
+		ahc_outb(ahc, SCBPTR, scb_index);
+		printf("%d ", scb_index);
+		scb_index = ahc_inb(ahc, SCB_NEXT);
+	}
+	printf("\n");
+
+	printf("Pending list: ");
+	i = 0;
+	LIST_FOREACH(scb, &ahc->pending_scbs, pending_links) {
+		if (i++ > 256)
+			break;
+		printf("%d ", scb->hscb->tag);
+	}
+	printf("\n");
+
+	printf("Kernel Free SCB list: ");
+	i = 0;
+	SLIST_FOREACH(scb, &ahc->scb_data->free_scbs, links.sle) {
+		if (i++ > 256)
+			break;
+		printf("%d ", scb->hscb->tag);
+	}
+	printf("\n");
+
+	maxtarget = (ahc->features & (AHC_WIDE|AHC_TWIN)) ? 15 : 7;
+	for (target = 0; target <= maxtarget; target++) {
+		untagged_q = &ahc->untagged_queues[0];
+		if (TAILQ_FIRST(untagged_q) == NULL)
+			continue;
+		printf("Untagged Q(%d): ", target);
+		i = 0;
+		TAILQ_FOREACH(scb, untagged_q, links.tqe) {
+			if (i++ > 256)
+				break;
+			printf("%d ", scb->hscb->tag);
+		}
+		printf("\n");
+	}
+
+	ahc_platform_dump_card_state(ahc);
+	ahc_outb(ahc, SCBPTR, saved_scbptr);
+}
+
+/************************* Target Mode ****************************************/
+#ifdef AHC_TARGET_MODE
+cam_status
+ahc_find_tmode_devs(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb,
+		    struct tmode_tstate **tstate, struct tmode_lstate **lstate,
+		    int notfound_failure)
+{
+	u_int our_id;
+
+	/*
+	 * If we are not configured for target mode, someone
+	 * is really confused to be sending this to us.
+	 */
+	if ((ahc->flags & AHC_TARGETMODE) == 0)
+		return (CAM_REQ_INVALID);
+
+	/* Range check target and lun */
+
+	/*
+	 * Handle the 'black hole' device that sucks up
+	 * requests to unattached luns on enabled targets.
+	 */
+	if (ccb->ccb_h.target_id == CAM_TARGET_WILDCARD
+	 && ccb->ccb_h.target_lun == CAM_LUN_WILDCARD) {
+		*tstate = NULL;
+		*lstate = ahc->black_hole;
+	} else {
+		u_int max_id;
+
+		if (cam_sim_bus(sim) == 0)
+			our_id = ahc->our_id;
+		else
+			our_id = ahc->our_id_b;
+
+		max_id = (ahc->features & AHC_WIDE) ? 15 : 7;
+		if (ccb->ccb_h.target_id > max_id)
+			return (CAM_TID_INVALID);
+
+		if (ccb->ccb_h.target_lun > 7)
+			return (CAM_LUN_INVALID);
+
+		if (ccb->ccb_h.target_id != our_id) {
+			if ((ahc->features & AHC_MULTI_TID) != 0) {
+				/*
+				 * Only allow additional targets if
+				 * the initiator role is disabled.
+				 * The hardware cannot handle a re-select-in
+				 * on the initiator id during a re-select-out
+				 * on a different target id.
+				 */
+			   	if ((ahc->flags & AHC_INITIATORMODE) != 0)
+					return (CAM_TID_INVALID);
+			} else {
+				/*
+				 * Only allow our target id to change
+				 * if the initiator role is not configured
+				 * and there are no enabled luns which
+				 * are attached to the currently registered
+				 * scsi id.
+				 */
+			   	if ((ahc->flags & AHC_INITIATORMODE) != 0
+				 || ahc->enabled_luns > 0)
+					return (CAM_TID_INVALID);
+			}
+		}
+
+		*tstate = ahc->enabled_targets[ccb->ccb_h.target_id];
+		*lstate = NULL;
+		if (*tstate != NULL)
+			*lstate =
+			    (*tstate)->enabled_luns[ccb->ccb_h.target_lun];
+	}
+
+	if (notfound_failure != 0 && *lstate == NULL)
+		return (CAM_PATH_INVALID);
+
+	return (CAM_REQ_CMP);
+}
+
+void
+ahc_handle_en_lun(struct ahc_softc *ahc, struct cam_sim *sim, union ccb *ccb)
+{
+	struct	   tmode_tstate *tstate;
+	struct	   tmode_lstate *lstate;
+	struct	   ccb_en_lun *cel;
+	cam_status status;
+	u_int	   target;
+	u_int	   lun;
+	u_int	   target_mask;
+	u_long	   s;
+	char	   channel;
+
+	status = ahc_find_tmode_devs(ahc, sim, ccb, &tstate, &lstate,
+				     /* notfound_failure*/FALSE);
+
+	if (status != CAM_REQ_CMP) {
+		ccb->ccb_h.status = status;
+		return;
+	}
+			
+	cel = &ccb->cel;
+	target = ccb->ccb_h.target_id;
+	lun = ccb->ccb_h.target_lun;
+	channel = SIM_CHANNEL(ahc, sim);
+	target_mask = 0x01 << target;
+	if (channel == 'B')
+		target_mask <<= 8;
+
+	if (cel->enable != 0) {
+		u_int scsiseq;
+
+		/* Are we already enabled?? */
+		if (lstate != NULL) {
+			xpt_print_path(ccb->ccb_h.path);
+			printf("Lun already enabled\n");
+			ccb->ccb_h.status = CAM_LUN_ALRDY_ENA;
+			return;
+		}
+
+		if (cel->grp6_len != 0
+		 || cel->grp7_len != 0) {
+			/*
+			 * Don't (yet?) support vendor
+			 * specific commands.
+			 */
+			ccb->ccb_h.status = CAM_REQ_INVALID;
+			printf("Non-zero Group Codes\n");
+			return;
+		}
+
+		/*
+		 * Seems to be okay.
+		 * Setup our data structures.
+		 */
+		if (target != CAM_TARGET_WILDCARD && tstate == NULL) {
+			tstate = ahc_alloc_tstate(ahc, target, channel);
+			if (tstate == NULL) {
+				xpt_print_path(ccb->ccb_h.path);
+				printf("Couldn't allocate tstate\n");
+				ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
+				return;
+			}
+		}
+		lstate = malloc(sizeof(*lstate), M_DEVBUF, M_NOWAIT);
+		if (lstate == NULL) {
+			xpt_print_path(ccb->ccb_h.path);
+			printf("Couldn't allocate lstate\n");
+			ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
+			return;
+		}
+		memset(lstate, 0, sizeof(*lstate));
+		status = xpt_create_path(&lstate->path, /*periph*/NULL,
+					 xpt_path_path_id(ccb->ccb_h.path),
+					 xpt_path_target_id(ccb->ccb_h.path),
+					 xpt_path_lun_id(ccb->ccb_h.path));
+		if (status != CAM_REQ_CMP) {
+			free(lstate, M_DEVBUF);
+			xpt_print_path(ccb->ccb_h.path);
+			printf("Couldn't allocate path\n");
+			ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
+			return;
+		}
+		SLIST_INIT(&lstate->accept_tios);
+		SLIST_INIT(&lstate->immed_notifies);
+		ahc_lock(ahc, &s);
+		pause_sequencer(ahc);
+		if (target != CAM_TARGET_WILDCARD) {
+			tstate->enabled_luns[lun] = lstate;
+			ahc->enabled_luns++;
+
+			if ((ahc->features & AHC_MULTI_TID) != 0) {
+				u_int targid_mask;
+
+				targid_mask = ahc_inb(ahc, TARGID)
+					    | (ahc_inb(ahc, TARGID + 1) << 8);
+
+				targid_mask |= target_mask;
+				ahc_outb(ahc, TARGID, targid_mask);
+				ahc_outb(ahc, TARGID+1, (targid_mask >> 8));
+				
+				ahc_update_scsiid(ahc, targid_mask);
+			} else {
+				u_int our_id;
+				char  channel;
+
+				channel = SIM_CHANNEL(ahc, sim);
+				our_id = SIM_SCSI_ID(ahc, sim);
+
+				/*
+				 * This can only happen if selections
+				 * are not enabled
+				 */
+				if (target != our_id) {
+					u_int sblkctl;
+					char  cur_channel;
+					int   swap;
+
+					sblkctl = ahc_inb(ahc, SBLKCTL);
+					cur_channel = (sblkctl & SELBUSB)
+						    ? 'B' : 'A';
+					if ((ahc->features & AHC_TWIN) == 0)
+						cur_channel = 'A';
+					swap = cur_channel != channel;
+					if (channel == 'A')
+						ahc->our_id = target;
+					else
+						ahc->our_id_b = target;
+
+					if (swap)
+						ahc_outb(ahc, SBLKCTL,
+							 sblkctl ^ SELBUSB);
+
+					ahc_outb(ahc, SCSIID, target);
+
+					if (swap)
+						ahc_outb(ahc, SBLKCTL, sblkctl);
+				}
+			}
+		} else
+			ahc->black_hole = lstate;
+		/* Allow select-in operations */
+		if (ahc->black_hole != NULL && ahc->enabled_luns > 0) {
+			scsiseq = ahc_inb(ahc, SCSISEQ_TEMPLATE);
+			scsiseq |= ENSELI;
+			ahc_outb(ahc, SCSISEQ_TEMPLATE, scsiseq);
+			scsiseq = ahc_inb(ahc, SCSISEQ);
+			scsiseq |= ENSELI;
+			ahc_outb(ahc, SCSISEQ, scsiseq);
+		}
+		unpause_sequencer(ahc);
+		ahc_unlock(ahc, &s);
+		ccb->ccb_h.status = CAM_REQ_CMP;
+		xpt_print_path(ccb->ccb_h.path);
+		printf("Lun now enabled for target mode\n");
+	} else {
+		struct scb *scb;
+		int i, empty;
+
+		if (lstate == NULL) {
+			ccb->ccb_h.status = CAM_LUN_INVALID;
+			return;
+		}
+
+		ahc_lock(ahc, &s);
+		
+		ccb->ccb_h.status = CAM_REQ_CMP;
+		LIST_FOREACH(scb, &ahc->pending_scbs, pending_links) {
+			struct ccb_hdr *ccbh;
+
+			ccbh = &scb->io_ctx->ccb_h;
+			if (ccbh->func_code == XPT_CONT_TARGET_IO
+			 && !xpt_path_comp(ccbh->path, ccb->ccb_h.path)){
+				printf("CTIO pending\n");
+				ccb->ccb_h.status = CAM_REQ_INVALID;
+				ahc_unlock(ahc, &s);
+				return;
+			}
+		}
+
+		if (SLIST_FIRST(&lstate->accept_tios) != NULL) {
+			printf("ATIOs pending\n");
+			ccb->ccb_h.status = CAM_REQ_INVALID;
+		}
+
+		if (SLIST_FIRST(&lstate->immed_notifies) != NULL) {
+			printf("INOTs pending\n");
+			ccb->ccb_h.status = CAM_REQ_INVALID;
+		}
+
+		if (ccb->ccb_h.status != CAM_REQ_CMP) {
+			ahc_unlock(ahc, &s);
+			return;
+		}
+
+		xpt_print_path(ccb->ccb_h.path);
+		printf("Target mode disabled\n");
+		xpt_free_path(lstate->path);
+		free(lstate, M_DEVBUF);
+
+		pause_sequencer(ahc);
+		/* Can we clean up the target too? */
+		if (target != CAM_TARGET_WILDCARD) {
+			tstate->enabled_luns[lun] = NULL;
+			ahc->enabled_luns--;
+			for (empty = 1, i = 0; i < 8; i++)
+				if (tstate->enabled_luns[i] != NULL) {
+					empty = 0;
+					break;
+				}
+
+			if (empty) {
+				ahc_free_tstate(ahc, target, channel,
+						/*force*/FALSE);
+				if (ahc->features & AHC_MULTI_TID) {
+					u_int targid_mask;
+
+					targid_mask = ahc_inb(ahc, TARGID)
+						    | (ahc_inb(ahc, TARGID + 1)
+						       << 8);
+
+					targid_mask &= ~target_mask;
+					ahc_outb(ahc, TARGID, targid_mask);
+					ahc_outb(ahc, TARGID+1,
+					 	 (targid_mask >> 8));
+					ahc_update_scsiid(ahc, targid_mask);
+				}
+			}
+		} else {
+
+			ahc->black_hole = NULL;
+
+			/*
+			 * We can't allow selections without
+			 * our black hole device.
+			 */
+			empty = TRUE;
+		}
+		if (ahc->enabled_luns == 0) {
+			/* Disallow select-in */
+			u_int scsiseq;
+
+			scsiseq = ahc_inb(ahc, SCSISEQ_TEMPLATE);
+			scsiseq &= ~ENSELI;
+			ahc_outb(ahc, SCSISEQ_TEMPLATE, scsiseq);
+			scsiseq = ahc_inb(ahc, SCSISEQ);
+			scsiseq &= ~ENSELI;
+			ahc_outb(ahc, SCSISEQ, scsiseq);
+		}
+		unpause_sequencer(ahc);
+		ahc_unlock(ahc, &s);
+	}
+}
+
+static void
+ahc_update_scsiid(struct ahc_softc *ahc, u_int targid_mask)
+{
+	u_int scsiid_mask;
+	u_int scsiid;
+
+	if ((ahc->features & AHC_MULTI_TID) == 0)
+		panic("ahc_update_scsiid called on non-multitid unit\n");
+
+	/*
+	 * Since we will rely on the the TARGID mask
+	 * for selection enables, ensure that OID
+	 * in SCSIID is not set to some other ID
+	 * that we don't want to allow selections on.
+	 */
+	if ((ahc->features & AHC_ULTRA2) != 0)
+		scsiid = ahc_inb(ahc, SCSIID_ULTRA2);
+	else
+		scsiid = ahc_inb(ahc, SCSIID);
+	scsiid_mask = 0x1 << (scsiid & OID);
+	if ((targid_mask & scsiid_mask) == 0) {
+		u_int our_id;
+
+		/* ffs counts from 1 */
+		our_id = ffs(targid_mask);
+		if (our_id == 0)
+			our_id = ahc->our_id;
+		else
+			our_id--;
+		scsiid &= TID;
+		scsiid |= our_id;
+	}
+	if ((ahc->features & AHC_ULTRA2) != 0)
+		ahc_outb(ahc, SCSIID_ULTRA2, scsiid);
+	else
+		ahc_outb(ahc, SCSIID, scsiid);
+}
+
+void
+ahc_run_tqinfifo(struct ahc_softc *ahc, int paused)
+{
+	struct target_cmd *cmd;
+
+	/*
+	 * If the card supports auto-access pause,
+	 * we can access the card directly regardless
+	 * of whether it is paused or not.
+	 */
+	if ((ahc->features & AHC_AUTOPAUSE) != 0)
+		paused = TRUE;
+
+	while ((cmd = &ahc->targetcmds[ahc->tqinfifonext])->cmd_valid != 0) {
+
+		/*
+		 * Only advance through the queue if we
+		 * have the resources to process the command.
+		 */
+		if (ahc_handle_target_cmd(ahc, cmd) != 0)
+			break;
+
+		ahc->tqinfifonext++;
+		cmd->cmd_valid = 0;
+
+		/*
+		 * Lazily update our position in the target mode incomming
+		 * command queue as seen by the sequencer.
+		 */
+		if ((ahc->tqinfifonext & (HOST_TQINPOS - 1)) == 1) {
+			if ((ahc->features & AHC_HS_MAILBOX) != 0) {
+				u_int hs_mailbox;
+
+				hs_mailbox = ahc_inb(ahc, HS_MAILBOX);
+				hs_mailbox &= ~HOST_TQINPOS;
+				hs_mailbox |= ahc->tqinfifonext & HOST_TQINPOS;
+				ahc_outb(ahc, HS_MAILBOX, hs_mailbox);
+			} else {
+				if (!paused)
+					pause_sequencer(ahc);	
+				ahc_outb(ahc, KERNEL_TQINPOS,
+					 ahc->tqinfifonext & HOST_TQINPOS);
+				if (!paused)
+					unpause_sequencer(ahc);
+			}
+		}
+	}
+}
+
+static int
+ahc_handle_target_cmd(struct ahc_softc *ahc, struct target_cmd *cmd)
+{
+	struct	  tmode_tstate *tstate;
+	struct	  tmode_lstate *lstate;
+	struct	  ccb_accept_tio *atio;
+	uint8_t *byte;
+	int	  initiator;
+	int	  target;
+	int	  lun;
+
+	initiator = SCSIID_TARGET(ahc, cmd->scsiid);
+	target = SCSIID_OUR_ID(cmd->scsiid);
+	lun    = (cmd->identify & MSG_IDENTIFY_LUNMASK);
+
+	byte = cmd->bytes;
+	tstate = ahc->enabled_targets[target];
+	lstate = NULL;
+	if (tstate != NULL)
+		lstate = tstate->enabled_luns[lun];
+
+	/*
+	 * Commands for disabled luns go to the black hole driver.
+	 */
+	if (lstate == NULL)
+		lstate = ahc->black_hole;
+
+	atio = (struct ccb_accept_tio*)SLIST_FIRST(&lstate->accept_tios);
+	if (atio == NULL) {
+		ahc->flags |= AHC_TQINFIFO_BLOCKED;
+		/*
+		 * Wait for more ATIOs from the peripheral driver for this lun.
+		 */
+		return (1);
+	} else
+		ahc->flags &= ~AHC_TQINFIFO_BLOCKED;
+#if 0
+	printf("Incoming command from %d for %d:%d%s\n",
+	       initiator, target, lun,
+	       lstate == ahc->black_hole ? "(Black Holed)" : "");
+#endif
+	SLIST_REMOVE_HEAD(&lstate->accept_tios, sim_links.sle);
+
+	if (lstate == ahc->black_hole) {
+		/* Fill in the wildcards */
+		atio->ccb_h.target_id = target;
+		atio->ccb_h.target_lun = lun;
+	}
+
+	/*
+	 * Package it up and send it off to
+	 * whomever has this lun enabled.
+	 */
+	atio->sense_len = 0;
+	atio->init_id = initiator;
+	if (byte[0] != 0xFF) {
+		/* Tag was included */
+		atio->tag_action = *byte++;
+		atio->tag_id = *byte++;
+		atio->ccb_h.flags = CAM_TAG_ACTION_VALID;
+	} else {
+		atio->ccb_h.flags = 0;
+	}
+	byte++;
+
+	/* Okay.  Now determine the cdb size based on the command code */
+	switch (*byte >> CMD_GROUP_CODE_SHIFT) {
+	case 0:
+		atio->cdb_len = 6;
+		break;
+	case 1:
+	case 2:
+		atio->cdb_len = 10;
+		break;
+	case 4:
+		atio->cdb_len = 16;
+		break;
+	case 5:
+		atio->cdb_len = 12;
+		break;
+	case 3:
+	default:
+		/* Only copy the opcode. */
+		atio->cdb_len = 1;
+		printf("Reserved or VU command code type encountered\n");
+		break;
+	}
+	
+	memcpy(atio->cdb_io.cdb_bytes, byte, atio->cdb_len);
+
+	atio->ccb_h.status |= CAM_CDB_RECVD;
+
+	if ((cmd->identify & MSG_IDENTIFY_DISCFLAG) == 0) {
+		/*
+		 * We weren't allowed to disconnect.
+		 * We're hanging on the bus until a
+		 * continue target I/O comes in response
+		 * to this accept tio.
+		 */
+#if 0
+		printf("Received Immediate Command %d:%d:%d - %p\n",
+		       initiator, target, lun, ahc->pending_device);
+#endif
+		ahc->pending_device = lstate;
+		ahc_freeze_ccb((union ccb *)atio);
+		atio->ccb_h.flags |= CAM_DIS_DISCONNECT;
+	}
+	xpt_done((union ccb*)atio);
+	return (0);
+}
+
+#endif
diff --git a/sys/dev/aic7xxx/aic7xxx.h b/sys/dev/aic7xxx/aic7xxx.h
index 534f2e4381d3..b0b07a8a481a 100644
--- a/sys/dev/aic7xxx/aic7xxx.h
+++ b/sys/dev/aic7xxx/aic7xxx.h
@@ -1,7 +1,5 @@
 /*
- * Interface to the generic driver for the aic7xxx based adaptec
- * SCSI controllers.  This is used to implement product specific
- * probe and attach routines.
+ * Core definitions and data structures shareable across OS platforms.
  *
  * Copyright (c) 1994, 1995, 1996, 1997, 1998, 1999, 2000 Justin T. Gibbs.
  * All rights reserved.
@@ -16,7 +14,7 @@
  *    derived from this software without specific prior written permission.
  *
  * Alternatively, this software may be distributed under the terms of the
- * the GNU Public License ("GPL").
+ * GNU Public License ("GPL").
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
@@ -30,17 +28,22 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
+ * $Id: //depot/src/aic7xxx/aic7xxx.h#4 $
+ *
  * $FreeBSD$
  */
 
 #ifndef _AIC7XXX_H_
 #define _AIC7XXX_H_
 
-#include "ahc.h"                /* for NAHC from config */
-#include "opt_aic7xxx.h"	/* for config options */
+/* Register Definitions */
+#include "aic7xxx_reg.h"
 
-#include <sys/bus.h>		/* For device_t */
+/************************* Forward Declarations *******************************/
+struct ahc_platform_data;
+struct scb_platform_data;
 
+/****************************** Useful Macros *********************************/
 #ifndef MAX
 #define MAX(a,b) (((a) > (b)) ? (a) : (b))
 #endif
@@ -49,42 +52,94 @@
 #define MIN(a,b) (((a) < (b)) ? (a) : (b))
 #endif
 
+#ifndef TRUE
+#define TRUE 1
+#endif
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+#define NUM_ELEMENTS(array) (sizeof(array) / sizeof(*array))
+
+#define ALL_CHANNELS '\0'
+#define ALL_TARGETS_MASK 0xFFFF
+#define INITIATOR_WILDCARD	(~0)
+
+#define SCSIID_TARGET(ahc, scsiid) \
+	(((scsiid) & ((((ahc)->features & AHC_TWIN) != 0) ? TWIN_TID : TID)) \
+	>> TID_SHIFT)
+#define SCSIID_OUR_ID(scsiid) \
+	((scsiid) & OID)
+#define SCSIID_CHANNEL(ahc, scsiid) \
+	((((ahc)->features & AHC_TWIN) != 0) \
+        ? ((((scsiid) & TWIN_CHNLB) != 0) ? 'B' : 'A') \
+       : 'A')
+#define	SCB_IS_SCSIBUS_B(ahc, scb) \
+	(SCSIID_CHANNEL(ahc, (scb)->hscb->scsiid) == 'B')
+#define	SCB_GET_OUR_ID(scb) \
+	SCSIID_OUR_ID((scb)->hscb->scsiid)
+#define	SCB_GET_TARGET(ahc, scb) \
+	SCSIID_TARGET((ahc), (scb)->hscb->scsiid)
+#define	SCB_GET_CHANNEL(ahc, scb) \
+	SCSIID_CHANNEL(ahc, (scb)->hscb->scsiid)
+#define	SCB_GET_LUN(scb) \
+	((scb)->hscb->lun)
+#define SCB_GET_TARGET_OFFSET(ahc, scb)	\
+	(SCB_GET_TARGET(ahc, scb) + (SCB_IS_SCSIBUS_B(ahc, scb) ? 8 : 0))
+#define SCB_GET_TARGET_MASK(ahc, scb) \
+	(0x01 << (SCB_GET_TARGET_OFFSET(ahc, scb)))
+#define TCL_TARGET_OFFSET(tcl) \
+	((((tcl) >> 4) & TID) >> 4)
+#define TCL_LUN(tcl) \
+	(tcl & (AHC_NUM_LUNS - 1))
+#define BUILD_TCL(scsiid, lun) \
+	((lun) | (((scsiid) & TID) << 4))
+
+/**************************** Driver Constants ********************************/
+/*
+ * The maximum number of supported targets.
+ */
+#define AHC_NUM_TARGETS 16
+
+/*
+ * The maximum number of supported luns.
+ * Although the identify message only supports 64 luns in SPI3, you
+ * can have 2^64 luns when information unit transfers are enabled.
+ * The max we can do sanely given the 8bit nature of the RISC engine
+ * on these chips is 256.
+ */
+#define AHC_NUM_LUNS 256
+
 /*
  * The maximum transfer per S/G segment.
  */
 #define AHC_MAXTRANSFER_SIZE	 0x00ffffff	/* limited by 24bit counter */
 
 /*
- * The number of dma segments supported.  The current implementation limits
- * us to 255 S/G entries (this may change to be unlimited at some point).
- * To reduce the driver's memory consumption, we further limit the number
- * supported to be sufficient to handle the largest mapping supported by
- * the kernel, MAXPHYS.  Assuming the transfer is as fragmented as possible
- * and unaligned, this turns out to be the number of paged sized transfers
- * in MAXPHYS plus an extra element to handle any unaligned residual.
+ * The maximum number of concurrent transactions supported per driver instance.
+ * Sequencer Control Blocks (SCBs) store per-transaction information.  Although
+ * the space for SCBs on the host adapter varies by model, the driver will
+ * page the SCBs between host and controller memory as needed.  We are limited
+ * to 255 because of the 8bit nature of the RISC engine and the need to
+ * reserve the value of 255 as a "No Transaction" value.
  */
-#define AHC_NSEG (MIN(btoc(MAXPHYS) + 1, 255))
-
-#define AHC_SCB_MAX	255	/*
-				 * Up to 255 SCBs on some types of aic7xxx
-				 * based boards.  The aic7870 have 16 internal
-				 * SCBs, but external SRAM bumps this to 255.
-				 * The aic7770 family have only 4, and the 
-				 * aic7850 has only 3.
-				 */
+#define AHC_SCB_MAX	255
 
-#define AHC_TMODE_CMDS	256    /*
-				* Ring Buffer of incoming target commands.
-				* We allocate 256 to simplify the logic
-				* in the sequencer by using the natural
-				* wrap point of an 8bit counter.
-				*/
+/*
+ * Ring Buffer of incoming target commands.
+ * We allocate 256 to simplify the logic in the sequencer
+ * by using the natural wrap point of an 8bit counter.
+ */
+#define AHC_TMODE_CMDS	256
 
-struct ahc_dma_seg {
-	u_int32_t	addr;
-	u_int32_t	len;
-};
+/* Reset line assertion time in us */
+#define AHC_BUSRESET_DELAY	250
 
+/******************* Chip Characteristics/Operating Settings  *****************/
+/*
+ * Chip Type
+ * The chip order is from least sophisticated to most sophisticated.
+ */
 typedef enum {
 	AHC_NONE	= 0x0000,
 	AHC_CHIPID_MASK	= 0x00FF,
@@ -95,54 +150,107 @@ typedef enum {
 	AHC_AIC7860	= 0x0005,
 	AHC_AIC7870	= 0x0006,
 	AHC_AIC7880	= 0x0007,
-	AHC_AIC7890	= 0x0008,
-	AHC_AIC7892	= 0x0009,
-	AHC_AIC7895	= 0x000a,
+	AHC_AIC7895	= 0x0008,
+	AHC_AIC7895C	= 0x0009,
+	AHC_AIC7890	= 0x000a,
 	AHC_AIC7896	= 0x000b,
-	AHC_AIC7899	= 0x000c,
+	AHC_AIC7892	= 0x000c,
+	AHC_AIC7899	= 0x000d,
 	AHC_VL		= 0x0100,	/* Bus type VL */
 	AHC_EISA	= 0x0200,	/* Bus type EISA */
 	AHC_PCI		= 0x0400,	/* Bus type PCI */
 	AHC_BUS_MASK	= 0x0F00
 } ahc_chip;
 
-extern char *ahc_chip_names[];
-
+/*
+ * Features available in each chip type.
+ */
 typedef enum {
-	AHC_FENONE	= 0x0000,
-	AHC_ULTRA	= 0x0001,	/* Supports 20MHz Transfers */
-	AHC_ULTRA2	= 0x0002,	/* Supports 40MHz Transfers */
-	AHC_WIDE  	= 0x0004,	/* Wide Channel */
-	AHC_TWIN	= 0x0008,	/* Twin Channel */
-	AHC_MORE_SRAM	= 0x0010,	/* 80 bytes instead of 64 */
-	AHC_CMD_CHAN	= 0x0020,	/* Has a Command DMA Channel */
-	AHC_QUEUE_REGS	= 0x0040,	/* Has Queue management registers */
-	AHC_SG_PRELOAD	= 0x0080,	/* Can perform auto-SG preload */
-	AHC_SPIOCAP	= 0x0100,	/* Has a Serial Port I/O Cap Register */
-	AHC_MULTI_TID	= 0x0200,	/* Has bitmask of TIDs for select-in */
-	AHC_HS_MAILBOX	= 0x0400,	/* Has HS_MAILBOX register */
-	AHC_DT		= 0x0800,	/* Double Transition transfers */
-	AHC_NEW_TERMCTL	= 0x1000,
-	AHC_MULTI_FUNC	= 0x2000,	/* Multi-Function Twin Channel Device */
-	AHC_TARG_DMABUG	= 0x4000,	/* WideOdd Data-In bug in TMODE */
-	AHC_AIC7770_FE	= AHC_TARG_DMABUG,
-	AHC_AIC7850_FE	= AHC_TARG_DMABUG|AHC_SPIOCAP,
+	AHC_FENONE	= 0x00000,
+	AHC_ULTRA	= 0x00001,	/* Supports 20MHz Transfers */
+	AHC_ULTRA2	= 0x00002,	/* Supports 40MHz Transfers */
+	AHC_WIDE  	= 0x00004,	/* Wide Channel */
+	AHC_TWIN	= 0x00008,	/* Twin Channel */
+	AHC_MORE_SRAM	= 0x00010,	/* 80 bytes instead of 64 */
+	AHC_CMD_CHAN	= 0x00020,	/* Has a Command DMA Channel */
+	AHC_QUEUE_REGS	= 0x00040,	/* Has Queue management registers */
+	AHC_SG_PRELOAD	= 0x00080,	/* Can perform auto-SG preload */
+	AHC_SPIOCAP	= 0x00100,	/* Has a Serial Port I/O Cap Register */
+	AHC_MULTI_TID	= 0x00200,	/* Has bitmask of TIDs for select-in */
+	AHC_HS_MAILBOX	= 0x00400,	/* Has HS_MAILBOX register */
+	AHC_DT		= 0x00800,	/* Double Transition transfers */
+	AHC_NEW_TERMCTL	= 0x01000,	/* Newer termination scheme */
+	AHC_MULTI_FUNC	= 0x02000,	/* Multi-Function Twin Channel Device */
+	AHC_LARGE_SCBS	= 0x04000,	/* 64byte SCBs */
+	AHC_AUTORATE	= 0x08000,	/* Automatic update of SCSIRATE/OFFSET*/
+	AHC_AUTOPAUSE	= 0x10000,	/* Automatic pause on register access */
+	AHC_AIC7770_FE	= AHC_FENONE,
+	AHC_AIC7850_FE	= AHC_SPIOCAP|AHC_AUTOPAUSE,
 	AHC_AIC7855_FE	= AHC_AIC7850_FE,
-	AHC_AIC7859_FE	= AHC_AIC7850_FE|AHC_ULTRA,
-	AHC_AIC7860_FE	= AHC_AIC7859_FE,
-	AHC_AIC7870_FE	= AHC_TARG_DMABUG,
-	AHC_AIC7880_FE	= AHC_TARG_DMABUG|AHC_ULTRA,
+	AHC_AIC7860_FE	= AHC_AIC7850_FE|AHC_ULTRA,
+	AHC_AIC7870_FE	= AHC_FENONE,
+	AHC_AIC7880_FE	= AHC_ULTRA,
 	AHC_AIC7890_FE	= AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA2|AHC_QUEUE_REGS
 			  |AHC_SG_PRELOAD|AHC_MULTI_TID|AHC_HS_MAILBOX
-			  |AHC_NEW_TERMCTL,
-	AHC_AIC7892_FE	= AHC_AIC7890_FE|AHC_DT,
-	AHC_AIC7895_FE	= AHC_AIC7880_FE|AHC_MORE_SRAM
-			  |AHC_CMD_CHAN|AHC_MULTI_FUNC,
+			  |AHC_NEW_TERMCTL|AHC_LARGE_SCBS,
+	AHC_AIC7892_FE	= AHC_AIC7890_FE|AHC_DT|AHC_AUTORATE|AHC_AUTOPAUSE,
+	AHC_AIC7895_FE	= AHC_AIC7880_FE|AHC_MORE_SRAM|AHC_AUTOPAUSE
+			  |AHC_CMD_CHAN|AHC_MULTI_FUNC|AHC_LARGE_SCBS,
 	AHC_AIC7895C_FE	= AHC_AIC7895_FE|AHC_MULTI_TID,
 	AHC_AIC7896_FE	= AHC_AIC7890_FE|AHC_MULTI_FUNC,
 	AHC_AIC7899_FE	= AHC_AIC7892_FE|AHC_MULTI_FUNC
 } ahc_feature;
 
+/*
+ * Bugs in the silicon that we work around in software.
+ */
+typedef enum {
+	AHC_BUGNONE		= 0x00,
+	/*
+	 * On all chips prior to the U2 product line,
+	 * the WIDEODD S/G segment feature does not
+	 * work during scsi->HostBus transfers.
+	 */
+	AHC_TMODE_WIDEODD_BUG	= 0x01,
+	/*
+	 * On the aic7890/91 Rev 0 chips, the autoflush
+	 * feature does not work.  A manual flush of
+	 * the DMA FIFO is required.
+	 */
+	AHC_AUTOFLUSH_BUG	= 0x02,
+	/*
+	 * On many chips, cacheline streaming does not work.
+	 */
+	AHC_CACHETHEN_BUG	= 0x04,
+	/*
+	 * On the aic7896/97 chips, cacheline
+	 * streaming must be enabled.
+	 */
+	AHC_CACHETHEN_DIS_BUG	= 0x08,
+	/*
+	 * PCI 2.1 Retry failure on non-empty data fifo.
+	 */
+	AHC_PCI_2_1_RETRY_BUG	= 0x10,
+	/*
+	 * Controller does not handle cacheline residuals
+	 * properly on S/G segments if PCI MWI instructions
+	 * are allowed.
+	 */
+	AHC_PCI_MWI_BUG		= 0x20,
+	/*
+	 * An SCB upload using the SCB channel's
+	 * auto array entry copy feature may 
+	 * corrupt data.  This appears to only
+	 * occur on 66MHz systems.
+	 */
+	AHC_SCBCHAN_UPLOAD_BUG	= 0x40
+} ahc_bug;
+
+/*
+ * Configuration specific settings.
+ * The driver determines these settings by probing the
+ * chip/controller's configuration.
+ */
 typedef enum {
 	AHC_FNONE		= 0x000,
 	AHC_PAGESCBS		= 0x001,/* Enable SCB paging */
@@ -180,8 +288,178 @@ typedef enum {
 					   * Internal 50pin connector
 					   * sits behind an aic3860
 					   */
+	AHC_SCB_BTT		= 0x40000,/*
+					   * The busy targets table is
+					   * stored in SCB space rather
+					   * than SRAM.
+					   */
+	AHC_BIOS_ENABLED	= 0x80000
 } ahc_flag;
 
+/*
+ * Controller  Information composed at probe time.
+ */
+struct ahc_probe_config {
+	const char	*description;
+	char		 channel;
+	char		 channel_b;
+	ahc_chip	 chip;
+	ahc_feature	 features;
+	ahc_bug		 bugs;
+	ahc_flag	 flags;
+};
+
+/************************* Hardware  SCB Definition ***************************/
+
+/*
+ * The driver keeps up to MAX_SCB scb structures per card in memory.  The SCB
+ * consists of a "hardware SCB" mirroring the fields availible on the card
+ * and additional information the kernel stores for each transaction.
+ *
+ * To minimize space utilization, a portion of the hardware scb stores
+ * different data during different portions of a SCSI transaction.
+ * As initialized by the host driver for the initiator role, this area
+ * contains the SCSI cdb (or a pointer to the  cdb) to be executed.  After
+ * the cdb has been presented to the target, this area serves to store
+ * residual transfer information and the SCSI status byte.
+ * For the target role, the contents of this area do not change, but
+ * still serve a different purpose than for the initiator role.  See
+ * struct target_data for details.
+ */
+
+/*
+ * Status information embedded in the shared poriton of
+ * an SCB after passing the cdb to the target.  The kernel
+ * driver will only read this data for transactions that
+ * complete abnormally (non-zero status byte).
+ */
+struct status_pkt {
+	uint32_t residual_datacnt;	/* Residual in the current S/G seg */
+	uint32_t residual_sg_ptr;	/* The next S/G for this transfer */
+	uint8_t	 scsi_status;		/* Standard SCSI status byte */
+};
+
+/*
+ * Target mode version of the shared data SCB segment.
+ */
+struct target_data {
+	uint8_t	target_phases;		/* Bitmap of phases to execute */
+	uint8_t	data_phase;		/* Data-In or Data-Out */
+	uint8_t	scsi_status;		/* SCSI status to give to initiator */
+	uint8_t	initiator_tag;		/* Initiator's transaction tag */
+};
+
+struct hardware_scb {
+/*0*/	union {
+		/*
+		 * If the cdb is 12 bytes or less, we embed it directly
+		 * in the SCB.  For longer cdbs, we embed the address
+		 * of the cdb payload as seen by the chip and a DMA
+		 * is used to pull it in.
+		 */
+		uint8_t	cdb[12];
+		uint32_t	cdb_ptr;
+		struct		status_pkt status;
+		struct		target_data tdata;
+	} shared_data;
+/*
+ * A word about residuals.
+ * The scb is presented to the sequencer with the dataptr and datacnt
+ * fields initialized to the contents of the first S/G element to
+ * transfer.  The sgptr field is initialized to the bus address for
+ * the S/G element that follows the first in the in core S/G array
+ * or'ed with the SG_FULL_RESID flag.  Sgptr may point to an invalid
+ * S/G entry for this transfer (single S/G element transfer with the
+ * first elements address and length preloaded in the dataptr/datacnt
+ * fields).  If no transfer is to occur, sgptr is set to SG_LIST_NULL.
+ * The SG_FULL_RESID flag ensures that the residual will be correctly
+ * noted even if no data transfers occur.  Once the data phase is entered,
+ * the residual sgptr and datacnt are loaded from the sgptr and the
+ * datacnt fields.  After each S/G element's dataptr and length are
+ * loaded into the hardware, the residual sgptr is advanced.  After
+ * each S/G element is expired, its datacnt field is checked to see
+ * if the LAST_SEG flag is set.  If so, SG_LIST_NULL is set in the
+ * residual sg ptr and the transfer is considered complete.  If the
+ * sequencer determines that there is a residual in the tranfer, it
+ * will set the SG_RESID_VALID flag in sgptr and dma the scb back into
+ * host memory.  To sumarize:
+ *
+ * Sequencer:
+ *	o A residual has occurred if SG_FULL_RESID is set in sgptr,
+ *	  or residual_sgptr does not have SG_LIST_NULL set.
+ *
+ *	o We are transfering the last segment if residual_datacnt has
+ *	  the SG_LAST_SEG flag set.
+ *
+ * Host:
+ *	o A residual has occurred if a completed scb has the
+ *	  SG_RESID_VALID flag set.
+ *
+ *	o residual_sgptr and sgptr refer to the "next" sg entry
+ *	  and so may point beyond the last valid sg entry for the
+ *	  transfer.
+ */ 
+/*12*/	uint32_t dataptr;
+/*16*/	uint32_t datacnt;		/*
+					 * Byte 3 (numbered from 0) of
+					 * the datacnt is really the
+					 * 4th byte in that data address.
+					 */
+/*20*/	uint32_t sgptr;
+#define SG_PTR_MASK	0xFFFFFFF8
+/*24*/	uint8_t  control;	/* See SCB_CONTROL in aic7xxx.reg for details */
+/*25*/	uint8_t  scsiid;	/* what to load in the SCSIID register */
+/*26*/	uint8_t  lun;
+/*27*/	uint8_t  tag;			/*
+					 * Index into our kernel SCB array.
+					 * Also used as the tag for tagged I/O
+					 */
+/*28*/	uint8_t  cdb_len;
+/*29*/	uint8_t  scsirate;		/* Value for SCSIRATE register */
+/*30*/	uint8_t  scsioffset;		/* Value for SCSIOFFSET register */
+/*31*/	uint8_t  next;			/*
+					 * Used for threading SCBs in the
+					 * "Waiting for Selection" and
+					 * "Disconnected SCB" lists down
+					 * in the sequencer.
+					 */
+/*32*/	uint8_t  cdb32[32];		/*
+					 * CDB storage for cdbs of size
+					 * 13->32.  We store them here
+					 * because hardware scbs are
+					 * allocated from DMA safe
+					 * memory so we are guaranteed
+					 * the controller can access
+					 * this data.
+					 */
+};
+
+/************************ Kernel SCB Definitions ******************************/
+/*
+ * Some fields of the SCB are OS dependent.  Here we collect the
+ * definitions for elements that all OS platforms need to include
+ * in there SCB definition.
+ */
+
+/*
+ * Definition of a scatter/gather element as transfered to the controller.
+ * The aic7xxx chips only support a 24bit length.  We use the top byte of
+ * the length to store additional address bits and a flag to indicate
+ * that a given segment terminates the transfer.  This gives us an
+ * addressable range of 512GB on machines with 64bit PCI or with chips
+ * that can support dual address cycles on 32bit PCI busses.
+ */
+struct ahc_dma_seg {
+	uint32_t	addr;
+	uint32_t	len;
+#define	AHC_DMA_LAST_SEG	0x80000000
+#define	AHC_SG_HIGH_ADDR_MASK	0x7F000000
+#define	AHC_SG_LEN_MASK		0x00FFFFFF
+};
+
+/*
+ * The current state of this SCB.
+ */
 typedef enum {
 	SCB_FREE		= 0x0000,
 	SCB_OTHERTCL_TIMEOUT	= 0x0002,/*
@@ -195,85 +473,92 @@ typedef enum {
 	SCB_DEVICE_RESET	= 0x0004,
 	SCB_SENSE		= 0x0008,
 	SCB_RECOVERY_SCB	= 0x0040,
+	SCB_NEGOTIATE		= 0x0080,
 	SCB_ABORT		= 0x1000,
 	SCB_QUEUED_MSG		= 0x2000,
 	SCB_ACTIVE		= 0x4000,
 	SCB_TARGET_IMMEDIATE	= 0x8000
 } scb_flag;
 
-/*
- * The driver keeps up to MAX_SCB scb structures per card in memory.  The SCB
- * consists of a "hardware SCB" mirroring the fields availible on the card
- * and additional information the kernel stores for each transaction.
- */
-struct hardware_scb {
-/*0*/   u_int8_t  control;
-/*1*/	u_int8_t  tcl;		/* 4/1/3 bits */
-/*2*/	u_int8_t  status;
-/*3*/	u_int8_t  SG_count;
-/*4*/	u_int32_t SG_pointer;
-/*8*/	u_int8_t  residual_SG_count;
-/*9*/	u_int8_t  residual_data_count[3];
-/*12*/	u_int32_t data;
-/*16*/	u_int32_t datalen;		/* Really only three bytes, but its
-					 * faster to treat it as a long on
-					 * a quad boundary.
-					 */
-/*20*/	u_int32_t cmdpointer;
-/*24*/	u_int8_t  cmdlen;
-/*25*/	u_int8_t  tag;			/* Index into our kernel SCB array.
-					 * Also used as the tag for tagged I/O
-					 */
-/*26*/	u_int8_t  next;			/* Used for threading SCBs in the
-					 * "Waiting for Selection" and
-					 * "Disconnected SCB" lists down
-					 * in the sequencer.
-					 */
-/*27*/	u_int8_t  scsirate;		/* Value for SCSIRATE register */
-/*28*/	u_int8_t  scsioffset;		/* Value for SCSIOFFSET register */
-/*29*/	u_int8_t  spare[3];		/*
-					 * Spare space available on
-					 * all controller types.
-					 */
-/*32*/	u_int8_t  cmdstore[16];		/*
-					 * CDB storage for controllers
-					 * supporting 64 byte SCBs.
-					 */
-/*48*/	u_int32_t cmdstore_busaddr;	/*
-					 * Address of command store for
-					 * 32byte SCB adapters
+struct scb {
+	struct	hardware_scb	 *hscb;
+	union {
+		SLIST_ENTRY(scb)  sle;
+		TAILQ_ENTRY(scb)  tqe;
+	} links;
+	LIST_ENTRY(scb)		  pending_links;
+	ahc_io_ctx_t		  io_ctx;
+	scb_flag		  flags;
+#ifndef __linux__
+	bus_dmamap_t		  dmamap;
+#endif
+	struct scb_platform_data *platform_data;
+	struct	ahc_dma_seg 	 *sg_list;
+	bus_addr_t		  sg_list_phys;
+	bus_addr_t		  cdb32_busaddr;
+	u_int			  sg_count;/* How full ahc_dma_seg is */
+};
+
+struct sg_map_node {
+	bus_dmamap_t		 sg_dmamap;
+	bus_addr_t		 sg_physaddr;
+	struct ahc_dma_seg*	 sg_vaddr;
+	SLIST_ENTRY(sg_map_node) links;
+};
+
+struct scb_data {
+	struct	hardware_scb	*hscbs;	/* Array of hardware SCBs */
+	struct	scb *scbarray;		/* Array of kernel SCBs */
+	SLIST_HEAD(, scb) free_scbs;	/*
+					 * Pool of SCBs ready to be assigned
+					 * commands to execute.
 					 */
-/*48*/	u_int8_t  spare_64[12];		/*
-					 * Pad to 64 bytes.
+	struct	scsi_sense_data *sense; /* Per SCB sense data */
+
+	/*
+	 * "Bus" addresses of our data structures.
+	 */
+	bus_dma_tag_t	 hscb_dmat;	/* dmat for our hardware SCB array */
+	bus_dmamap_t	 hscb_dmamap;
+	bus_addr_t	 hscb_busaddr;
+	bus_dma_tag_t	 sense_dmat;
+	bus_dmamap_t	 sense_dmamap;
+	bus_addr_t	 sense_busaddr;
+	bus_dma_tag_t	 sg_dmat;	/* dmat for our sg segments */
+	SLIST_HEAD(, sg_map_node) sg_maps;
+	uint8_t	numscbs;
+	uint8_t	maxhscbs;		/* Number of SCBs on the card */
+	uint8_t	init_level;		/*
+					 * How far we've initialized
+					 * this structure.
 					 */
 };
 
-struct scb {
-	struct	hardware_scb	*hscb;
-	SLIST_ENTRY(scb)	 links;	 /* for chaining */
-	union ccb		*ccb;	 /* the ccb for this cmd */
-	scb_flag		 flags;
-	bus_dmamap_t		 dmamap;
-	struct	ahc_dma_seg 	*sg_list;
-	bus_addr_t		 sg_list_phys;
-	u_int			 sg_count;/* How full ahc_dma_seg is */
-};
+/************************ Target Mode Definitions *****************************/
 
 /*
  * Connection desciptor for select-in requests in target mode.
- * The first byte is the connecting target, followed by identify
- * message and optional tag information, terminated by 0xFF.  The
- * remainder is the command to execute.  The cmd_valid byte is on
- * an 8 byte boundary to simplify setting it on aic7880 hardware
- * which only has limited direct access to the DMA FIFO.
  */
 struct target_cmd {
-	u_int8_t initiator_channel;
-	u_int8_t targ_id;	/* Target ID we were selected at */
-	u_int8_t identify;	/* Identify message */
-	u_int8_t bytes[21];
-	u_int8_t cmd_valid;
-	u_int8_t pad[7];
+	uint8_t scsiid;		/* Our ID and the initiator's ID */
+	uint8_t identify;	/* Identify message */
+	uint8_t bytes[22];	/* 
+				 * Bytes contains any additional message
+				 * bytes terminated by 0xFF.  The remainder
+				 * is the cdb to execute.
+				 */
+	uint8_t cmd_valid;	/*
+				 * When a command is complete, the firmware
+				 * will set cmd_valid to all bits set.
+				 * After the host has seen the command,
+				 * the bits are cleared.  This allows us
+				 * to just peek at host memory to determine
+				 * if more work is complete. cmd_valid is on
+				 * an 8 byte boundary to simplify setting
+				 * it on aic7880 hardware which only has
+				 * limited direct access to the DMA FIFO.
+				 */
+	uint8_t pad[7];
 };
 
 /*
@@ -282,71 +567,140 @@ struct target_cmd {
  */
 #define AHC_TMODE_EVENT_BUFFER_SIZE 8
 struct ahc_tmode_event {
-	u_int8_t initiator_id;
-	u_int8_t event_type;	/* MSG type or EVENT_TYPE_BUS_RESET */
+	uint8_t initiator_id;
+	uint8_t event_type;	/* MSG type or EVENT_TYPE_BUS_RESET */
 #define	EVENT_TYPE_BUS_RESET 0xFF
-	u_int8_t event_arg;
+	uint8_t event_arg;
 };
 
 /*
- * Per lun target mode state including accept TIO CCB
- * and immediate notify CCB pools.
+ * Per enabled lun target mode state.
+ * As this state is directly influenced by the host OS'es target mode
+ * environment, we let the OS module define it.  Forward declare the
+ * structure here so we can store arrays of them, etc. in OS neutral
+ * data structures.
  */
+#ifdef AHC_TARGET_MODE 
 struct tmode_lstate {
 	struct cam_path *path;
 	struct ccb_hdr_slist accept_tios;
 	struct ccb_hdr_slist immed_notifies;
 	struct ahc_tmode_event event_buffer[AHC_TMODE_EVENT_BUFFER_SIZE];
-	u_int8_t event_r_idx;
-	u_int8_t event_w_idx;
+	uint8_t event_r_idx;
+	uint8_t event_w_idx;
 };
+#else
+struct tmode_lstate;
+#endif
 
+/******************** Transfer Negotiation Datastructures *********************/
 #define AHC_TRANS_CUR		0x01	/* Modify current neogtiation status */
-#define AHC_TRANS_ACTIVE	0x03	/* Assume this is the active target */
+#define AHC_TRANS_ACTIVE	0x03	/* Assume this target is on the bus */
 #define AHC_TRANS_GOAL		0x04	/* Modify negotiation goal */
 #define AHC_TRANS_USER		0x08	/* Modify user negotiation settings */
 
+/*
+ * Transfer Negotiation Information.
+ */
 struct ahc_transinfo {
-	u_int8_t width;
-	u_int8_t period;
-	u_int8_t offset;
-	u_int8_t ppr_flags;
+	uint8_t protocol_version;	/* SCSI Revision level */
+	uint8_t transport_version;	/* SPI Revision level */
+	uint8_t width;			/* Bus width */
+	uint8_t period;			/* Sync rate factor */
+	uint8_t offset;			/* Sync offset */
+	uint8_t ppr_options;		/* Parallel Protocol Request options */
 };
 
+/*
+ * Per-initiator current, goal and user transfer negotiation information. */
 struct ahc_initiator_tinfo {
-	u_int8_t scsirate;
+	uint8_t scsirate;		/* Computed value for SCSIRATE reg */
 	struct ahc_transinfo current;
 	struct ahc_transinfo goal;
 	struct ahc_transinfo user;
 };
 
 /*
- * Per target mode enabled target state.  Esentially just an array of
- * pointers to lun target state as well as sync/wide negotiation information
- * for each initiator<->target mapping (including the mapping for when we
- * are the initiator).
+ * Per enabled target ID state.
+ * Pointers to lun target state as well as sync/wide negotiation information
+ * for each initiator<->target mapping.  For the initiator role we pretend
+ * that we are the target and the targets are the initiators since the
+ * negotiation is the same regardless of role.
  */
 struct tmode_tstate {
-	struct tmode_lstate*		enabled_luns[8];
+	struct tmode_lstate*		enabled_luns[64]; /* NULL == disabled */
 	struct ahc_initiator_tinfo	transinfo[16];
 
 	/*
 	 * Per initiator state bitmasks.
 	 */
-	u_int16_t		 ultraenb;	/* Using ultra sync rate  */
-	u_int16_t	 	 discenable;	/* Disconnection allowed  */
-	u_int16_t		 tagenable;	/* Tagged Queuing allowed */
+	uint16_t		 ultraenb;	/* Using ultra sync rate  */
+	uint16_t	 	 discenable;	/* Disconnection allowed  */
+	uint16_t		 tagenable;	/* Tagged Queuing allowed */
 };
 
 /*
- * Define the format of the aic7XXX SEEPROM registers (16 bits).
+ * Data structure for our table of allowed synchronous transfer rates.
  */
+struct ahc_syncrate {
+	u_int sxfr_u2;	/* Value of the SXFR parameter for Ultra2+ Chips */
+	u_int sxfr;	/* Value of the SXFR parameter for <= Ultra Chips */
+#define		ULTRA_SXFR 0x100	/* Rate Requires Ultra Mode set */
+#define		ST_SXFR	   0x010	/* Rate Single Transition Only */
+#define		DT_SXFR	   0x040	/* Rate Double Transition Only */
+	uint8_t period; /* Period to send to SCSI target */
+	char *rate;
+};
+
+/*
+ * The synchronouse transfer rate table.
+ */
+extern struct ahc_syncrate ahc_syncrates[];
+
+/*
+ * Indexes into our table of syncronous transfer rates.
+ */
+#define AHC_SYNCRATE_DT		0
+#define AHC_SYNCRATE_ULTRA2	1
+#define AHC_SYNCRATE_ULTRA	3
+#define AHC_SYNCRATE_FAST	6
+
+/***************************** Lookup Tables **********************************/
+/*
+ * Textual descriptions of the different chips indexed by chip type.
+ */
+extern char *ahc_chip_names[];
+extern const u_int num_chip_names;
+
+/*
+ * Hardware error codes.
+ */
+struct hard_error_entry {
+        uint8_t errno;
+	char *errmesg;
+};
+extern struct hard_error_entry hard_error[];
+extern const u_int num_errors;
+
+/*
+ * Phase -> name and message out response
+ * to parity errors in each phase table. 
+ */
+struct phase_table_entry {
+        uint8_t phase;
+        uint8_t mesg_out; /* Message response to parity errors */
+	char *phasemsg;
+};
+extern struct phase_table_entry phase_table[];
+extern const u_int num_phases;
+
+/************************** Serial EEPROM Format ******************************/
 
 struct seeprom_config {
 /*
- * SCSI ID Configuration Flags
+ * Per SCSI ID Configuration Flags
  */
-	u_int16_t device_flags[16];	/* words 0-15 */
+	uint16_t device_flags[16];	/* words 0-15 */
 #define		CFXFER		0x0007	/* synchronous transfer rate */
 #define		CFSYNCH		0x0008	/* enable synchronous transfer */
 #define		CFDISC		0x0010	/* enable disconnection */
@@ -356,28 +710,29 @@ struct seeprom_config {
 #define		CFSTART		0x0100	/* send start unit SCSI command */
 #define		CFINCBIOS	0x0200	/* include in BIOS scan */
 #define		CFRNFOUND	0x0400	/* report even if not found */
-#define		CFMULTILUN	0x0800	/* Probe multiple luns in BIOS scan */
+#define		CFMULTILUNDEV	0x0800	/* Probe multiple luns in BIOS scan */
 #define		CFWBCACHEENB	0x4000	/* Enable W-Behind Cache on disks */
 #define		CFWBCACHENOP	0xc000	/* Don't touch W-Behind Cache */
 
 /*
  * BIOS Control Bits
  */
-	u_int16_t bios_control;		/* word 16 */
+	uint16_t bios_control;		/* word 16 */
 #define		CFSUPREM	0x0001	/* support all removeable drives */
 #define		CFSUPREMB	0x0002	/* support removeable boot drives */
 #define		CFBIOSEN	0x0004	/* BIOS enabled */
 /*		UNUSED		0x0008	*/
 #define		CFSM2DRV	0x0010	/* support more than two drives */
 #define		CF284XEXTEND	0x0020	/* extended translation (284x cards) */	
-/*		UNUSED		0x0040	*/
+#define		CFSTPWLEVEL	0x0010	/* Termination level control */
 #define		CFEXTEND	0x0080	/* extended translation enabled */
+#define		CFSCAMEN	0x0100	/* SCAM enable */
 /*		UNUSED		0xff00	*/
 
 /*
  * Host Adapter Control Bits
  */
-	u_int16_t adapter_control;	/* word 17 */	
+	uint16_t adapter_control;	/* word 17 */	
 #define		CFAUTOTERM	0x0001	/* Perform Auto termination */
 #define		CFULTRAEN	0x0002	/* Ultra SCSI speed enable */
 #define		CF284XSELTO     0x0003	/* Selection timeout (284x cards) */
@@ -386,16 +741,19 @@ struct seeprom_config {
 #define		CFWSTERM	0x0008	/* SCSI high byte termination */
 #define		CFSPARITY	0x0010	/* SCSI parity */
 #define		CF284XSTERM     0x0020	/* SCSI low byte term (284x cards) */	
+#define		CFMULTILUN	0x0020	/* SCSI low byte term (284x cards) */	
 #define		CFRESETB	0x0040	/* reset SCSI bus at boot */
+#define		CFCLUSTERENB	0x0080	/* Cluster Enable */
 #define		CFCHNLBPRIMARY	0x0100	/* aic7895 probe B channel first */
-#define		CFSEAUTOTERM	0x0400	/* aic7890 Perform SE Auto Termination*/
-#define		CFLVDSTERM	0x0800	/* aic7890 LVD Termination */
-/*		UNUSED		0xf280	*/
+#define		CFSEAUTOTERM	0x0400	/* Ultra2 Perform secondary Auto Term*/
+#define		CFSELOWTERM	0x0800	/* Ultra2 secondary low term */
+#define		CFSEHIGHTERM	0x1000	/* Ultra2 secondary high term */
+#define		CFDOMAINVAL	0x4000	/* Perform Domain Validation*/
 
 /*
- * Bus Release, Host Adapter ID
+ * Bus Release Time, Host Adapter ID
  */
-	u_int16_t brtime_id;		/* word 18 */
+	uint16_t brtime_id;		/* word 18 */
 #define		CFSCSIID	0x000f	/* host adapter SCSI ID */
 /*		UNUSED		0x00f0	*/
 #define		CFBRTIME	0xff00	/* bus release time */
@@ -403,23 +761,17 @@ struct seeprom_config {
 /*
  * Maximum targets
  */
-	u_int16_t max_targets;		/* word 19 */	
+	uint16_t max_targets;		/* word 19 */	
 #define		CFMAXTARG	0x00ff	/* maximum targets */
-/*		UNUSED		0xff00	*/
-	u_int16_t res_1[11];		/* words 20-30 */
-	u_int16_t checksum;		/* word 31 */
-};
-
-struct ahc_syncrate {
-	int sxfr_u2;
-	int sxfr;
-	/* Rates in Ultra mode have bit 8 of sxfr set */
-#define		ULTRA_SXFR 0x100
-#define		ST_SXFR	   0x010
-	u_int8_t period; /* Period to send to SCSI target */
-	char *rate;
+#define		CFBOOTLUN	0x0f00	/* Lun to boot from */
+#define		CFBOOTID	0xf000	/* Target to boot from */
+	uint16_t res_1[10];		/* words 20-29 */
+	uint16_t signature;		/* Signature == 0x250 */
+#define		CFSIGNATURE	0x250
+	uint16_t checksum;		/* word 31 */
 };
 
+/****************************  Message Buffer *********************************/
 typedef enum {
 	MSG_TYPE_NONE			= 0x00,
 	MSG_TYPE_INITIATOR_MSGOUT	= 0x01,
@@ -428,51 +780,54 @@ typedef enum {
 	MSG_TYPE_TARGET_MSGIN		= 0x04
 } ahc_msg_type;
 
-struct sg_map_node {
-	bus_dmamap_t		 sg_dmamap;
-	bus_addr_t		 sg_physaddr;
-	struct ahc_dma_seg*	 sg_vaddr;
-	SLIST_ENTRY(sg_map_node) links;
-};
-	
-struct scb_data {
-	struct	hardware_scb	*hscbs;	    /* Array of hardware SCBs */
-	struct	scb *scbarray;		    /* Array of kernel SCBs */
-	SLIST_HEAD(, scb) free_scbs;	/*
-					 * Pool of SCBs ready to be assigned
-					 * commands to execute.
-					 */
-	struct	scsi_sense_data *sense; /* Per SCB sense data */
+typedef enum {
+	MSGLOOP_IN_PROG,
+	MSGLOOP_MSGCOMPLETE,
+	MSGLOOP_TERMINATED
+} msg_loop_stat;
+
+/*********************** Software Configuration Structure *********************/
+TAILQ_HEAD(scb_tailq, scb);
+
+struct ahc_softc {
+	bus_space_tag_t           tag;
+	bus_space_handle_t        bsh;
+#ifndef __linux__
+	bus_dma_tag_t		  buffer_dmat;   /* dmat for buffer I/O */
+#endif
+	struct scb_data		 *scb_data;
 
 	/*
-	 * "Bus" addresses of our data structures.
+	 * SCBs that have been sent to the controller
 	 */
-	bus_dma_tag_t	 hscb_dmat;	/* dmat for our hardware SCB array */
-	bus_dmamap_t	 hscb_dmamap;
-	bus_addr_t	 hscb_busaddr;
-	bus_dma_tag_t	 sense_dmat;
-	bus_dmamap_t	 sense_dmamap;
-	bus_addr_t	 sense_busaddr;
-	bus_dma_tag_t	 sg_dmat;	/* dmat for our sg segments */
-	SLIST_HEAD(, sg_map_node) sg_maps;
-	u_int8_t	numscbs;
-	u_int8_t	maxhscbs;	/* Number of SCBs on the card */
-	u_int8_t	init_level;	/*
-					 * How far we've initialized
-					 * this structure.
-					 */
-};
+	LIST_HEAD(, scb)	 pending_scbs;
 
-struct ahc_softc {
-	bus_space_tag_t		 tag;
-	bus_space_handle_t	 bsh;
-	bus_dma_tag_t		 buffer_dmat;	/* dmat for buffer I/O */
-	struct scb_data		*scb_data;
+	/*
+	 * Counting lock for deferring the release of additional
+	 * untagged transactions from the untagged_queues.  When
+	 * the lock is decremented to 0, all queues in the
+	 * untagged_queues array are run.
+	 */
+	u_int			  untagged_queue_lock;
 
 	/*
-	 * CCBs that have been send to the controller
+	 * Per-target queue of untagged-transactions.  The
+	 * transaction at the head of the queue is the
+	 * currently pending untagged transaction for the
+	 * target.  The driver only allows a single untagged
+	 * transaction per target.
 	 */
-	LIST_HEAD(, ccb_hdr)	 pending_ccbs;
+	struct scb_tailq	  untagged_queues[16];
+
+	/*
+	 * Platform specific data.
+	 */
+	struct ahc_platform_data *platform_data;
+
+	/*
+	 * Platform specific device information.
+	 */
+	ahc_dev_softc_t		  dev_softc;
 
 	/*
 	 * Target mode related state kept on a per enabled lun basis.
@@ -480,152 +835,263 @@ struct ahc_softc {
 	 * As an initiator, we keep one target entry for our initiator
 	 * ID to store our sync/wide transfer settings.
 	 */
-	struct tmode_tstate*	 enabled_targets[16];
+	struct tmode_tstate*	  enabled_targets[16];
 
 	/*
 	 * The black hole device responsible for handling requests for
 	 * disabled luns on enabled targets.
 	 */
-	struct tmode_lstate*	 black_hole;
+	struct tmode_lstate*	  black_hole;
 
 	/*
 	 * Device instance currently on the bus awaiting a continue TIO
 	 * for a command that was not given the disconnect priveledge.
 	 */
-	struct tmode_lstate*	 pending_device;
+	struct tmode_lstate*	  pending_device;
 
 	/*
 	 * Card characteristics
 	 */
-	ahc_chip		 chip;
-	ahc_feature		 features;
-	ahc_flag		 flags;
+	ahc_chip		  chip;
+	ahc_feature		  features;
+	ahc_bug			  bugs;
+	ahc_flag		  flags;
 
 	/* Values to store in the SEQCTL register for pause and unpause */
-	u_int8_t		 unpause;
-	u_int8_t		 pause;
+	uint8_t			  unpause;
+	uint8_t			  pause;
 
 	/* Command Queues */
-	u_int8_t		 qoutfifonext;
-	u_int8_t		 qinfifonext;
-	u_int8_t		*qoutfifo;
-	u_int8_t		*qinfifo;
+	uint8_t			  qoutfifonext;
+	uint8_t			  qinfifonext;
+	uint8_t			 *qoutfifo;
+	uint8_t			 *qinfifo;
 
-	/*
-	 * 256 byte array storing the SCBID of outstanding
-	 * untagged SCBs indexed by TCL.
-	 */	
-	u_int8_t		 *untagged_scbs;
-
-	/*
-	 * Hooks into the XPT.
-	 */
-	struct	cam_sim		*sim;
-	struct	cam_sim		*sim_b;
-	struct	cam_path	*path;
-	struct	cam_path	*path_b;
-
-	int			 unit;
+	/* Links for chaining softcs */
+	TAILQ_ENTRY(ahc_softc)	  links;
 
 	/* Channel Names ('A', 'B', etc.) */
-	char			 channel;
-	char			 channel_b;
+	char			  channel;
+	char			  channel_b;
 
 	/* Initiator Bus ID */
-	u_int8_t		 our_id;
-	u_int8_t		 our_id_b;
+	uint8_t			  our_id;
+	uint8_t			  our_id_b;
 
 	/* Targets that need negotiation messages */
-	u_int16_t		 targ_msg_req;
+	uint16_t		  targ_msg_req;
 
 	/*
-	 * PCI error detection and data for running the
-	 * PCI error interrupt handler.
+	 * PCI error detection.
 	 */
-	int			 unsolicited_ints;
-	device_t		 device;
+	int			  unsolicited_ints;
 
 	/*
 	 * Target incoming command FIFO.
 	 */
-	struct target_cmd	*targetcmds;
-	u_int8_t		 tqinfifonext;
+	struct target_cmd	 *targetcmds;
+	uint8_t			  tqinfifonext;
 
 	/*
 	 * Incoming and outgoing message handling.
 	 */
-	u_int8_t		 send_msg_perror;
-	ahc_msg_type		 msg_type;
-	u_int8_t		 msgout_buf[8];	/* Message we are sending */
-	u_int8_t		 msgin_buf[8];	/* Message we are receiving */
-	u_int			 msgout_len;	/* Length of message to send */
-	u_int			 msgout_index;	/* Current index in msgout */
-	u_int			 msgin_index;	/* Current index in msgin */
+	uint8_t			  send_msg_perror;
+	ahc_msg_type		  msg_type;
+	uint8_t			  msgout_buf[12];/* Message we are sending */
+	uint8_t			  msgin_buf[12];/* Message we are receiving */
+	u_int			  msgout_len;	/* Length of message to send */
+	u_int			  msgout_index;	/* Current index in msgout */
+	u_int			  msgin_index;	/* Current index in msgin */
 
-	int			 regs_res_type;
-	int			 regs_res_id;
-	int			 irq_res_type;
-	struct resource		*regs;
-	struct resource		*irq;
-	void			*ih;
-	bus_dma_tag_t		 parent_dmat;
-	bus_dma_tag_t		 shared_data_dmat;
-	bus_dmamap_t		 shared_data_dmamap;
-	bus_addr_t		 shared_data_busaddr;
-	bus_addr_t		 dma_bug_buf;
+	/*
+	 * Mapping information for data structures shared
+	 * between the sequencer and kernel.
+	 */
+	bus_dma_tag_t		  parent_dmat;
+	bus_dma_tag_t		  shared_data_dmat;
+	bus_dmamap_t		  shared_data_dmamap;
+	bus_addr_t		  shared_data_busaddr;
+
+	/*
+	 * Bus address of the one byte buffer used to
+	 * work-around a DMA bug for chips <= aic7880
+	 * in target mode.
+	 */
+	bus_addr_t		  dma_bug_buf;
 
 	/* Number of enabled target mode device on this card */
-	u_int			 enabled_luns;
+	u_int			  enabled_luns;
 
 	/* Initialization level of this data structure */
-	u_int			 init_level;
+	u_int			  init_level;
+
+	/* PCI cacheline size. */
+	u_int			  pci_cachesize;
 
-	u_int16_t	 	 user_discenable;/* Disconnection allowed  */
-	u_int16_t		 user_tagenable;/* Tagged Queuing allowed */
+	/* Per-Unit descriptive information */
+	const char		 *description;
+	char			 *name;
+	int			  unit;
+
+	uint16_t	 	  user_discenable;/* Disconnection allowed  */
+	uint16_t		  user_tagenable;/* Tagged Queuing allowed */
 };
 
-struct full_ahc_softc {
-	struct ahc_softc softc;
-	struct scb_data  scb_data_storage;
+TAILQ_HEAD(ahc_softc_tailq, ahc_softc);
+extern struct ahc_softc_tailq ahc_tailq;
+
+/************************ Active Device Information ***************************/
+typedef enum {
+	ROLE_UNKNOWN,
+	ROLE_INITIATOR,
+	ROLE_TARGET
+} role_t;
+
+struct ahc_devinfo {
+	int	 our_scsiid;
+	int	 target_offset;
+	uint16_t target_mask;
+	u_int	 target;
+	u_int	 lun;
+	char	 channel;
+	role_t	 role;		/*
+				 * Only guaranteed to be correct if not
+				 * in the busfree state.
+				 */
 };
 
-/* #define AHC_DEBUG */
-#ifdef AHC_DEBUG
-/* Different debugging levels used when AHC_DEBUG is defined */
-#define AHC_SHOWMISC	0x0001
-#define AHC_SHOWCMDS	0x0002
-#define AHC_SHOWSCBS	0x0004
-#define AHC_SHOWABORTS	0x0008
-#define AHC_SHOWSENSE	0x0010
-#define AHC_SHOWSCBCNT	0x0020
+/****************************** PCI Structures ********************************/
+typedef int (ahc_device_setup_t)(ahc_dev_softc_t,
+				 struct ahc_probe_config *);
 
-extern int ahc_debug; /* Initialized in i386/scsi/aic7xxx.c */
-#endif
+struct ahc_pci_identity {
+	uint64_t		 full_id;
+	uint64_t		 id_mask;
+	char			*name;
+	ahc_device_setup_t	*setup;
+};
+extern struct ahc_pci_identity ahc_pci_ident_table [];
+extern const int ahc_num_pci_devs;
 
-char *ahc_name(struct ahc_softc *ahc);
+/***************************** VL/EISA Declarations ***************************/
+struct aic7770_identity {
+	uint32_t		 full_id;
+	uint32_t		 id_mask;
+	char			*name;
+	ahc_device_setup_t	*setup;
+};
+extern struct aic7770_identity aic7770_ident_table [];
+extern const int ahc_num_aic7770_devs;
+
+#define AHC_EISA_SLOT_OFFSET	0xc00
+#define AHC_EISA_IOSIZE		0x100
 
-struct ahc_softc*
-	ahc_alloc(device_t dev, struct resource *regs, int regs_type,
-		  int regs_id, bus_dma_tag_t parent_dmat, ahc_chip chip,
-		  ahc_feature features, ahc_flag flags,
-		  struct scb_data *scb_data);
-int	ahc_reset(struct ahc_softc *ahc);
-void	ahc_free(struct ahc_softc *);
-int	ahc_probe_scbs(struct ahc_softc *);
-int	ahc_init(struct ahc_softc *);
-int	ahc_attach(struct ahc_softc *);
-void	ahc_intr(void *arg);
+/*************************** Function Declarations ****************************/
+/******************************************************************************/
 
-#define ahc_inb(ahc, port)				\
-	bus_space_read_1((ahc)->tag, (ahc)->bsh, port)
+/***************************** PCI Front End *********************************/
+struct ahc_pci_identity	*ahc_find_pci_device(ahc_dev_softc_t);
+int			 ahc_pci_config(struct ahc_softc *,
+					struct ahc_pci_identity *);
 
-#define ahc_outb(ahc, port, value)			\
-	bus_space_write_1((ahc)->tag, (ahc)->bsh, port, value)
+/*************************** EISA/VL Front End ********************************/
+struct aic7770_identity *aic7770_find_device(uint32_t);
+int			 aic7770_config(struct ahc_softc *ahc,
+					struct aic7770_identity *);
 
-#define ahc_outsb(ahc, port, valp, count)		\
-	bus_space_write_multi_1((ahc)->tag, (ahc)->bsh, port, valp, count)
+/************************** SCB and SCB queue management **********************/
+int		ahc_probe_scbs(struct ahc_softc *);
+void		ahc_run_untagged_queues(struct ahc_softc *ahc);
+void		ahc_run_untagged_queue(struct ahc_softc *ahc,
+				       struct scb_tailq *queue);
 
-#define ahc_insb(ahc, port, valp, count)		\
-	bus_space_read_multi_1((ahc)->tag, (ahc)->bsh, port, valp, count)
+/****************************** Initialization ********************************/
+void			 ahc_init_probe_config(struct ahc_probe_config *);
+struct ahc_softc	*ahc_alloc(void *platform_arg, char *name);
+int			 ahc_softc_init(struct ahc_softc *,
+					struct ahc_probe_config*);
+void			 ahc_controller_info(struct ahc_softc *ahc, char *buf);
+int			 ahc_init(struct ahc_softc *ahc);
+void			 ahc_softc_insert(struct ahc_softc *);
+void			 ahc_set_unit(struct ahc_softc *, int);
+void			 ahc_set_name(struct ahc_softc *, char *);
+void			 ahc_alloc_scbs(struct ahc_softc *ahc);
+void			 ahc_free(struct ahc_softc *ahc);
+int			 ahc_reset(struct ahc_softc *ahc);
+void			 ahc_shutdown(void *arg);
+
+/*************************** Interrupt Services *******************************/
+void			ahc_pci_intr(struct ahc_softc *ahc);
+void			ahc_clear_intstat(struct ahc_softc *ahc);
+void			ahc_run_qoutfifo(struct ahc_softc *ahc);
+#ifdef AHC_TARGET_MODE
+void			ahc_run_tqinfifo(struct ahc_softc *ahc, int paused);
+#endif
+void			ahc_handle_brkadrint(struct ahc_softc *ahc);
+void			ahc_handle_seqint(struct ahc_softc *ahc, u_int intstat);
+void			ahc_handle_scsiint(struct ahc_softc *ahc,
+					   u_int intstat);
 
-#endif  /* _AIC7XXX_H_ */
+/***************************** Error Recovery *********************************/
+typedef enum {
+	SEARCH_COMPLETE,
+	SEARCH_COUNT,
+	SEARCH_REMOVE
+} ahc_search_action;
+int			ahc_search_qinfifo(struct ahc_softc *ahc, int target,
+					   char channel, int lun, u_int tag,
+					   role_t role, uint32_t status,
+					   ahc_search_action action);
+int			ahc_search_disc_list(struct ahc_softc *ahc, int target,
+					     char channel, int lun, u_int tag,
+					     int stop_on_first, int remove,
+					     int save_state);
+void			ahc_freeze_devq(struct ahc_softc *ahc, struct scb *scb);
+int			ahc_reset_channel(struct ahc_softc *ahc, char channel,
+					  int initiate_reset);
+void			restart_sequencer(struct ahc_softc *ahc);
+/*************************** Utility Functions ********************************/
+void			ahc_compile_devinfo(struct ahc_devinfo *devinfo,
+					    u_int our_id, u_int target,
+					    u_int lun, char channel,
+					    role_t role);
+/************************** Transfer Negotiation ******************************/
+struct ahc_syncrate*	ahc_find_syncrate(struct ahc_softc *ahc, u_int *period,
+					  u_int *ppr_options, u_int maxsync);
+u_int			ahc_find_period(struct ahc_softc *ahc,
+					u_int scsirate, u_int maxsync);
+void			ahc_validate_offset(struct ahc_softc *ahc,
+					    struct ahc_syncrate *syncrate,
+					    u_int *offset, int wide);
+void			ahc_validate_width(struct ahc_softc *ahc,
+					   u_int *bus_width);
+void			ahc_set_width(struct ahc_softc *ahc,
+				      struct ahc_devinfo *devinfo,
+				      u_int width, u_int type, int paused);
+void			ahc_set_syncrate(struct ahc_softc *ahc,
+					 struct ahc_devinfo *devinfo,
+					 struct ahc_syncrate *syncrate,
+					 u_int period, u_int offset,
+					 u_int ppr_options,
+					 u_int type, int paused);
+void			ahc_set_tags(struct ahc_softc *ahc,
+				     struct ahc_devinfo *devinfo, int enable);
+
+/**************************** Target Mode *************************************/
+#ifdef AHC_TARGET_MODE
+void		ahc_send_lstate_events(struct ahc_softc *,
+				       struct tmode_lstate *);
+void		ahc_handle_en_lun(struct ahc_softc *ahc,
+				  struct cam_sim *sim, union ccb *ccb);
+cam_status	ahc_find_tmode_devs(struct ahc_softc *ahc,
+				    struct cam_sim *sim, union ccb *ccb,
+				    struct tmode_tstate **tstate,
+				    struct tmode_lstate **lstate,
+				    int notfound_failure);
+void		ahc_setup_target_msgin(struct ahc_softc *ahc,
+				       struct ahc_devinfo *devinfo);
+#endif
+/******************************* Debug ***************************************/
+void			ahc_print_scb(struct scb *scb);
+void			ahc_dump_card_state(struct ahc_softc *ahc);
+#endif /* _AIC7XXX_H_ */
diff --git a/sys/dev/aic7xxx/aic7xxx.reg b/sys/dev/aic7xxx/aic7xxx.reg
index 78c95a85a117..d1cda86723bd 100644
--- a/sys/dev/aic7xxx/aic7xxx.reg
+++ b/sys/dev/aic7xxx/aic7xxx.reg
@@ -14,7 +14,7 @@
  *    derived from this software without specific prior written permission.
  *
  * Alternatively, this software may be distributed under the terms of the
- * the GNU Public License ("GPL").
+ * GNU Public License ("GPL").
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
@@ -28,6 +28,8 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
+ * $Id: //depot/src/aic7xxx/aic7xxx.reg#3 $
+ *
  * $FreeBSD$
  */
 
@@ -110,6 +112,8 @@ register SCSISIGI {
 	mask	PHASE_MASK	CDI|IOI|MSGI
 	mask	P_DATAOUT	0x00
 	mask	P_DATAIN	IOI
+	mask	P_DATAOUT_DT	P_DATAOUT|MSGI
+	mask	P_DATAIN_DT	P_DATAIN|MSGI
 	mask	P_COMMAND	CDI
 	mask	P_MESGOUT	CDI|MSGI
 	mask	P_STATUS	CDI|IOI
@@ -172,6 +176,8 @@ register SCSIID	{
 	address			0x005
 	access_mode RW
 	mask	TID		0xf0		/* Target ID mask */
+	mask	TWIN_TID	0x70
+	bit	TWIN_CHNLB	0x80
 	mask	OID		0x0f		/* Our ID mask */
 	/*
 	 * SCSI Maximum Offset (p. 4-61 aic7890/91 Data Book)
@@ -305,7 +311,12 @@ register SSTAT2 {
 	address			0x00d
 	access_mode RO
 	bit	OVERRUN		0x80
+	bit	SHVALID		0x40	/* Shaddow Layer non-zero */
 	bit	EXP_ACTIVE	0x10	/* SCSI Expander Active */
+	bit	CRCVALERR	0x08	/* CRC doesn't match (U3 only) */
+	bit	CRCENDERR	0x04	/* No terminal CRC packet (U3 only) */
+	bit	CRCREQERR	0x02	/* Illegal CRC packet req (U3 only) */
+	bit	DUAL_EDGE_ERR	0x01	/* Incorrect data phase (U3 only) */
 	mask	SFCNT		0x1f
 }
 
@@ -704,7 +715,6 @@ register HS_MAILBOX {
 	address			0x086
 	mask	HOST_MAILBOX	0xF0
 	mask	SEQ_MAILBOX	0x0F
-	mask	HOST_REQ_INT	0x10
 	mask	HOST_TQINPOS	0x80	/* Boundary at either 0 or 128 */
 }
 
@@ -746,7 +756,7 @@ register HCNT {
 
 /*
  * SCB Pointer (p. 3-49)
- * Gate one of the four SCBs into the SCBARRAY window.
+ * Gate one of the SCBs into the SCBARRAY window.
  */
 register SCBPTR {
 	address			0x090
@@ -768,10 +778,10 @@ register INTSTAT {
 	mask	SEND_REJECT	0x10|SEQINT	/* sending a message reject */
 	mask	NO_IDENT	0x20|SEQINT	/* no IDENTIFY after reconnect*/
 	mask	NO_MATCH	0x30|SEQINT	/* no cmd match for reconnect */
-	mask	UPDATE_TMSG_REQ	0x60|SEQINT	/* Update TMSG_REQ values */
+	mask	IGN_WIDE_RES	0x40|SEQINT	/* Complex IGN Wide Res Msg */
 	mask	BAD_STATUS	0x70|SEQINT	/* Bad status from target */
 	mask	RESIDUAL	0x80|SEQINT	/* Residual byte count != 0 */
-	mask	TRACE_POINT	0x90|SEQINT
+	mask	TRACEPOINT2	0x90|SEQINT
 	mask	HOST_MSG_LOOP	0xa0|SEQINT	/*
 						 * The bus is ready for the
 						 * host to perform another
@@ -787,11 +797,6 @@ register INTSTAT {
 						 * noticed a parity error.
 						 */
 	mask	TRACEPOINT	0xd0|SEQINT
-	mask	MSGIN_PHASEMIS	0xe0|SEQINT	/*
-						 * Target changed phase on us
-						 * when we were expecting
-						 * another msgin byte.
-						 */
 	mask	DATA_OVERRUN	0xf0|SEQINT	/*
 						 * Target attempted to write
 						 * beyond the bounds of its
@@ -960,35 +965,19 @@ register SFUNCT {
  */
 scb {
 	address			0x0a0
-	SCB_CONTROL {
-		size	1
-		bit	TARGET_SCB	0x80
-		bit	DISCENB         0x40
-		bit	TAG_ENB		0x20
-		bit	MK_MESSAGE      0x10
-		bit	ULTRAENB	0x08
-		bit	DISCONNECTED	0x04
-		mask	SCB_TAG_TYPE	0x03
-	}
-	SCB_TCL {
-		size	1
-		bit	SELBUSB		0x08
-		mask	TID		0xf0
-		mask	LID		0x07
-	}
-	SCB_TARGET_STATUS {
-		size	1
-	}
-	SCB_SGCOUNT {
-		size	1
+	SCB_CDB_PTR {
+		size	4
+		alias	SCB_RESIDUAL_DATACNT
+		alias	SCB_CDB_STORE
+		alias	SCB_TARGET_INFO
 	}
-	SCB_SGPTR {
+	SCB_RESIDUAL_SGPTR {
 		size	4
 	}
-	SCB_RESID_SGCNT {
+	SCB_SCSI_STATUS {
 		size	1
 	}
-	SCB_RESID_DCNT	{
+	SCB_CDB_STORE_PAD {
 		size	3
 	}
 	SCB_DATAPTR {
@@ -996,24 +985,44 @@ scb {
 	}
 	SCB_DATACNT {
 		/*
-		 * Really only 3 bytes, but padded to make
-		 * the kernel's job easier.
+		 * The last byte is really the high address bits for
+		 * the data address.
 		 */
 		size	4
+		bit	SG_LAST_SEG		0x80	/* In the fourth byte */
+		mask	SG_HIGH_ADDR_BITS	0x7F	/* In the fourth byte */
 	}
-	SCB_CMDPTR {
-		alias	SCB_TARGET_PHASES
-		bit	TARGET_DATA_IN	0x1	/* In the second byte */
+	SCB_SGPTR {
 		size	4
+		bit	SG_RESID_VALID	0x04	/* In the first byte */
+		bit	SG_FULL_RESID	0x02	/* In the first byte */
+		bit	SG_LIST_NULL	0x01	/* In the first byte */
+	}
+	SCB_CONTROL {
+		size	1
+		bit	TARGET_SCB			0x80
+		bit	DISCENB				0x40
+		bit	TAG_ENB				0x20
+		bit	MK_MESSAGE			0x10
+		bit	ULTRAENB			0x08
+		bit	DISCONNECTED			0x04
+		mask	SCB_TAG_TYPE			0x03
+	}
+	SCB_SCSIID {
+		size	1
+		bit	TWIN_CHNLB			0x80
+		mask	TWIN_TID			0x70
+		mask	TID				0xf0
+		mask	OID				0x0f
 	}
-	SCB_CMDLEN {
-		alias	SCB_INITIATOR_TAG
+	SCB_LUN {
+		mask	LID				0xff
 		size	1
 	}
 	SCB_TAG {
 		size	1
 	}
-	SCB_NEXT {
+	SCB_CDB_LEN {
 		size	1
 	}
 	SCB_SCSIRATE {
@@ -1022,22 +1031,20 @@ scb {
 	SCB_SCSIOFFSET {
 		size	1
 	}
-	SCB_SPARE	{
-		size	3
+	SCB_NEXT {
+		size	1
 	}
-	SCB_CMDSTORE	{
+	SCB_64_SPARE {
 		size	16
 	}
-	SCB_CMDSTORE_BUSADDR {
-		size	4
-	}
-	SCB_64BYTE_SPARE {
-		size	12
+	SCB_64_BTT {
+		size	16
 	}
 }
 
-const	SCB_32BYTE_SIZE	28
-const	SCB_64BYTE_SIZE	48
+const	SCB_UPLOAD_SIZE		32
+const	SCB_DOWNLOAD_SIZE	32
+const	SCB_DOWNLOAD_SIZE_64	48
 
 const	SG_SIZEOF	0x08		/* sizeof(struct ahc_dma) */
 
@@ -1083,7 +1090,7 @@ register CCSGCTL {
 	address			0x0EB
 	bit	CCSGDONE	0x80
 	bit	CCSGEN		0x08
-	bit	FLAG		0x02
+	bit	SG_FETCH_NEEDED 0x02	/* Bit used for software state */
 	bit	CCSGRESET	0x01
 }
 
@@ -1164,14 +1171,23 @@ register DFF_THRSH {
 	mask	WR_DFTHRSH_MAX	0x70
 }
 
-register SG_CACHEPTR {
-	access_mode RW
+register SG_CACHE_PRE {
+	access_mode WO
 	address			0x0fc
-	mask	SG_USER_DATA	0xfc
+	mask	SG_ADDR_MASK	0xf8
+	bit	ODD_SEG		0x04
 	bit	LAST_SEG	0x02
 	bit	LAST_SEG_DONE	0x01
 }
 
+register SG_CACHE_SHADOW {
+	access_mode RO
+	address			0x0fc
+	mask	SG_ADDR_MASK	0xf8
+	bit	ODD_SEG		0x04
+	bit	LAST_SEG	0x02
+	bit	LAST_SEG_DONE	0x01
+}
 /* ---------------------- Scratch RAM Offsets ------------------------- */
 /* These offsets are either to values that are initialized by the board's
  * BIOS or are specified by the sequencer code.
@@ -1193,18 +1209,30 @@ scratch_ram {
 	/*
 	 * 1 byte per target starting at this address for configuration values
 	 */
-	TARG_SCSIRATE {
-		alias		CMDSIZE_TABLE
+	CMDSIZE_TABLE {
+		alias		TARG_SCSIRATE
+		size		8
+	}
+	BUSY_TARGETS {
 		size		16
 	}
 	/*
-	 * Bit vector of targets that have ULTRA enabled.
+	 * Bit vector of targets that have ULTRA enabled as set by the BIOS.
+	 * The Sequencer relies in a per-SCB field to control the disconnect
+	 * priveldge.
 	 */
 	ULTRA_ENB {
 		size		2
+		/*
+		 * Partial transfer past cacheline end to be
+		 * transferred using an extra S/G.
+		 */
+		alias		MWI_RESIDUAL
 	}
 	/*
-	 * Bit vector of targets that have disconnection disabled.
+	 * Bit vector of targets that have disconnection disabled as set by
+	 * the BIOS.  The Sequencer relies in a per-SCB field to control the
+	 * disconnect priveldge.
 	 */
 	DISC_DSB {
 		size		2
@@ -1234,6 +1262,7 @@ scratch_ram {
 		size		1
 		bit	IDENTIFY_SEEN		0x80
 		bit	SCBPTR_VALID		0x40
+		bit	TARGET_CMD_IS_TAGGED	0x40
 		bit	DPHASE			0x20
 		/* Target flags */
 		bit	TARG_CMD_PENDING	0x10
@@ -1247,17 +1276,12 @@ scratch_ram {
 	 * target/channel/lun of a
 	 * reconnecting target
 	 */
-	SAVED_TCL {
+	SAVED_SCSIID {
 		size		1
 	}
-	/* Working value of the number of SG segments left */
-	SG_COUNT {
+	SAVED_LUN {
 		size		1
 	}
-	/* Working value of SG pointer */
-	SG_NEXT	{
-		size		4
-	}
 	/*
 	 * The last bus phase as seen by the sequencer. 
 	 */
@@ -1304,17 +1328,11 @@ scratch_ram {
 		size		4
 	}
 	/*
-	 * Address of the 256 byte array storing the SCBID of outstanding
-	 * untagged SCBs indexed by TCL.
+	 * Base address of our shared data with the kernel driver in host
+	 * memory.  This includes the qinfifo, qoutfifo, and target mode
+	 * incoming command queue.
 	 */
-	SCBID_ADDR {
-		size		4
-	}
-	/*
-	 * Address of the array of command descriptors used to store
-	 * information about incoming selections.
-	 */
-	TMODE_CMDADDR {
+	SHARED_DATA_ADDR {
 		size		4
 	}
 	KERNEL_QINPOS {
@@ -1361,14 +1379,6 @@ scratch_ram {
 	}
 
 	/*
-	 * Number of times we have filled the CCSGRAM with prefetched
-	 * SG elements.
-	 */
-	PREFETCH_CNT {
-		size		1
-	}
-
-	/*
 	 * Interrupt kernel for a message to this target on
 	 * the next transaction.  This is usually used for
 	 * negotiation requests.
@@ -1421,6 +1431,12 @@ scratch_ram {
 		mask	HSCSIID		0x07	/* our SCSI ID */
 		mask	HWSCSIID	0x0f	/* our SCSI ID if Wide Bus */
 	}
+	INTDEF {
+		address		0x05c
+		size		1
+		bit	EDGE_TRIG	0x80
+		mask	VECTOR		0x0f
+	}
 	HOSTCONF {
 		address		0x05d
 		size		1
@@ -1441,17 +1457,13 @@ scratch_ram {
 	}
 }
 
+const TID_SHIFT		4
 const SCB_LIST_NULL	0xff
 const TARGET_CMD_CMPLT	0xfe
 
 const CCSGADDR_MAX	0x80
 const CCSGRAM_MAXSEGS	16
 
-/* Offsets into the SCBID array where different data is stored */
-const QOUTFIFO_OFFSET		0
-const QINFIFO_OFFSET		1
-const UNTAGGEDSCB_OFFSET	2
-
 /* WDTR Message values */
 const BUS_8_BIT			0x00
 const BUS_16_BIT		0x01
@@ -1466,18 +1478,19 @@ const HOST_MSG			0xff
 /* Target mode command processing constants */
 const CMD_GROUP_CODE_SHIFT	0x05
 
-const TCL_TARGET_SHIFT		4
-
 const STATUS_BUSY		0x08
-const STATUS_QUEUE_FULL		0x28
+const STATUS_QUEUE_FULL	0x28
+const SCB_TARGET_PHASES		0
+const SCB_TARGET_DATA_DIR	1
+const SCB_TARGET_STATUS		2
+const SCB_INITIATOR_TAG		3
+const TARGET_DATA_IN		1
 
 /*
  * Downloaded (kernel inserted) constants
  */
-
-/*
- * Number of command descriptors in the command descriptor array.
- * No longer used, but left here as an example for how downloaded
- * constantants can be defined.
-const TMODE_NUMCMDS	download
- */
+/* Offsets into the SCBID array where different data is stored */
+const QOUTFIFO_OFFSET download
+const QINFIFO_OFFSET download
+const CACHESIZE_MASK download
+const INVERTED_CACHESIZE_MASK download
diff --git a/sys/dev/aic7xxx/aic7xxx.seq b/sys/dev/aic7xxx/aic7xxx.seq
index 187b22eae925..a1a2e984cb7d 100644
--- a/sys/dev/aic7xxx/aic7xxx.seq
+++ b/sys/dev/aic7xxx/aic7xxx.seq
@@ -14,7 +14,7 @@
  *    derived from this software without specific prior written permission.
  *
  * Alternatively, this software may be distributed under the terms of the
- * the GNU Public License ("GPL").
+ * GNU Public License ("GPL").
  *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
@@ -28,11 +28,13 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
+ * $Id: //depot/src/aic7xxx/aic7xxx.seq#4 $
+ *
  * $FreeBSD$
  */
 
-#include <dev/aic7xxx/aic7xxx.reg>
-#include <cam/scsi/scsi_message.h>
+#include "aic7xxx.reg"
+#include "scsi_message.h"
 
 /*
  * A few words on the waiting SCB list:
@@ -52,18 +54,6 @@
  * automatically consume the entries.
  */
 
-reset:
-	clr	SCSISIGO;		/* De-assert BSY */
-	mvi	MSG_OUT, MSG_NOOP;	/* No message to send */
-	and	SXFRCTL1, ~BITBUCKET;
-	/* Always allow reselection */
-	and	SCSISEQ, ENSELI|ENRSELI|ENAUTOATNP, SCSISEQ_TEMPLATE;
-	if ((ahc->features & AHC_CMD_CHAN) != 0) {
-		/* Ensure that no DMA operations are in progress */
-		clr	CCSGCTL;
-		clr	CCSCBCTL;
-	}
-
 poll_for_work:
 	call	clear_target_state;
 	and	SXFRCTL0, ~SPIOEN;
@@ -71,9 +61,6 @@ poll_for_work:
 		mov	A, QINPOS;
 	}
 poll_for_work_loop:
-	if ((ahc->features & AHC_QUEUE_REGS) == 0) {
-		and	SEQCTL, ~PAUSEDIS;
-	}
 	test	SSTAT0, SELDO|SELDI	jnz selection;
 	test	SCSISEQ, ENSELO	jnz poll_for_work_loop;
 	if ((ahc->features & AHC_TWIN) != 0) {
@@ -85,7 +72,6 @@ poll_for_work_loop:
 		 */
 		xor	SBLKCTL,SELBUSB;	/* Toggle to the other bus */
 		test	SSTAT0, SELDO|SELDI	jnz selection;
-		test	SCSISEQ, ENSELO	jnz poll_for_work;
 		xor	SBLKCTL,SELBUSB;	/* Toggle back */
 	}
 	cmp	WAITING_SCBH,SCB_LIST_NULL jne start_waiting;
@@ -96,18 +82,15 @@ test_queue:
 		mov	NONE, SNSCB_QOFF;
 		inc	QINPOS;
 	} else {
-		or	SEQCTL, PAUSEDIS;
 		cmp	KERNEL_QINPOS, A je poll_for_work_loop;
 		inc	QINPOS;
-		and	SEQCTL, ~PAUSEDIS;
 	}
 
-/*
- * We have at least one queued SCB now and we don't have any 
- * SCBs in the list of SCBs awaiting selection.  If we have
- * any SCBs available for use, pull the tag from the QINFIFO
- * and get to work on it.
- */
+	/*
+	 * We have at least one queued SCB now and we don't have any 
+	 * SCBs in the list of SCBs awaiting selection.  Pull the tag
+	 * from the QINFIFO and get to work on it.
+	 */
 	if ((ahc->flags & AHC_PAGESCBS) != 0) {
 		mov	ALLZEROS	call	get_free_or_disc_scb;
 	}
@@ -121,27 +104,11 @@ dequeue_scb:
 		mov	SCBPTR, RETURN_2;
 	}
 dma_queued_scb:
-/*
- * DMA the SCB from host ram into the current SCB location.
- */
+	/*
+	 * DMA the SCB from host ram into the current SCB location.
+	 */
 	mvi	DMAPARAMS, HDMAEN|DIRECTION|FIFORESET;
 	mov	RETURN_2	 call dma_scb;
-
-/*
- * Preset the residual fields in case we never go through a data phase.
- * This isn't done by the host so we can avoid a DMA to clear these
- * fields for the normal case of I/O that completes without underrun
- * or overrun conditions.
- */
-	if ((ahc->features & AHC_CMD_CHAN) != 0) {
-		bmov	SCB_RESID_DCNT, SCB_DATACNT, 3;
-	} else {
-		mov	SCB_RESID_DCNT[0],SCB_DATACNT[0];
-		mov	SCB_RESID_DCNT[1],SCB_DATACNT[1];
-		mov	SCB_RESID_DCNT[2],SCB_DATACNT[2];
-	}
-	mov	SCB_RESID_SGCNT, SCB_SGCOUNT;
-
 start_scb:
 	/*
 	 * Place us on the waiting list in case our selection
@@ -151,42 +118,35 @@ start_scb:
 	mov	WAITING_SCBH, SCBPTR;
 start_waiting:
 	/*
-	 * Pull the first entry off of the waiting SCB list.
+	 * Start the first entry on the waiting SCB list.
 	 */
 	mov	SCBPTR, WAITING_SCBH;
 	call	start_selection;
-	jmp	poll_for_work;
+	jmp	poll_for_work_loop;
 
 start_selection:
 	if ((ahc->features & AHC_TWIN) != 0) {
 		and	SINDEX,~SELBUSB,SBLKCTL;/* Clear channel select bit */
-		and	A,SELBUSB,SCB_TCL;	/* Get new channel bit */
-		or	SINDEX,A;
+		test	SCB_SCSIID, TWIN_CHNLB jz . + 2;
+		or	SINDEX, SELBUSB;
 		mov	SBLKCTL,SINDEX;		/* select channel */
 	}
 initialize_scsiid:
-	mov	SINDEX, SCSISEQ_TEMPLATE;
+	if ((ahc->features & AHC_ULTRA2) != 0) {
+		mov	SCSIID_ULTRA2, SCB_SCSIID;
+	} else if ((ahc->features & AHC_TWIN) != 0) {
+		and	SCSIID, TWIN_TID|OID, SCB_SCSIID;
+	} else {
+		mov	SCSIID, SCB_SCSIID;
+	}
 	if ((ahc->flags & AHC_TARGETMODE) != 0) {
-		test	SCB_CONTROL, TARGET_SCB jz . + 4;
-		if ((ahc->features & AHC_ULTRA2) != 0) {
-			mov	SCSIID_ULTRA2, SCB_CMDPTR[2];
-		} else {
-			mov	SCSIID, SCB_CMDPTR[2];
-		}
+		mov	SINDEX, SCSISEQ_TEMPLATE;
+		test	SCB_CONTROL, TARGET_SCB jz . + 2;
 		or	SINDEX, TEMODE;
-		jmp	initialize_scsiid_fini;
-	}
-	if ((ahc->features & AHC_ULTRA2) != 0) {
-		and	A, TID, SCB_TCL;	/* Get target ID */
-		and	SCSIID_ULTRA2, OID;	/* Clear old target */
-		or	SCSIID_ULTRA2, A;
+		mov	SCSISEQ, SINDEX ret;
 	} else {
-		and	A, TID, SCB_TCL;	/* Get target ID */
-		and	SCSIID, OID;		/* Clear old target */
-		or	SCSIID, A;
+		mov	SCSISEQ, SCSISEQ_TEMPLATE ret;
 	}
-initialize_scsiid_fini:
-	mov	SCSISEQ, SINDEX ret;
 
 /*
  * Initialize transfer settings and clear the SCSI channel.
@@ -201,9 +161,9 @@ set_transfer_settings:
 		test	SCB_CONTROL, ULTRAENB jz . + 2;
 		or	SXFRCTL0, FAST20;
 	} 
-/*
- * Initialize SCSIRATE with the appropriate value for this target.
- */
+	/*
+	 * Initialize SCSIRATE with the appropriate value for this target.
+	 */
 	if ((ahc->features & AHC_ULTRA2) != 0) {
 		bmov	SCSIRATE, SCB_SCSIRATE, 2 ret;
 	} else {
@@ -211,6 +171,13 @@ set_transfer_settings:
 	}
 
 selection:
+	/*
+	 * We aren't expecting a bus free, so interrupt
+	 * the kernel driver if it happens.
+	 */
+	mvi	CLRSINT1,CLRBUSFREE;
+	or	SIMODE1, ENBUSFREE;
+
 	test	SSTAT0,SELDO	jnz select_out;
 	mvi	CLRSINT0, CLRSELDI;
 select_in:
@@ -225,7 +192,6 @@ select_in:
 		 * from the target.
 		 */
 		mvi	SCSISIGO, P_MESGOUT|BSYO;
-		mvi	CLRSINT1, CLRBUSFREE;
 
 		/*
 		 * Setup the DMA for sending the identify and
@@ -236,47 +202,40 @@ select_in:
 		mov     A, TQINPOS;
 		if ((ahc->features & AHC_CMD_CHAN) != 0) {
 			mvi	DINDEX, CCHADDR;
-			mvi	TMODE_CMDADDR call set_32byte_addr;
+			mvi	SHARED_DATA_ADDR call set_32byte_addr;
 			mvi	CCSCBCTL, CCSCBRESET;
 		} else {
 			mvi	DINDEX, HADDR;
-			mvi	TMODE_CMDADDR call set_32byte_addr;
+			mvi	SHARED_DATA_ADDR call set_32byte_addr;
 			mvi	DFCNTRL, FIFORESET;
 		}
 
 		/* Initiator that selected us */
-		and	SAVED_TCL, SELID_MASK, SELID;
-		if ((ahc->features & AHC_CMD_CHAN) != 0) {
-			mov	CCSCBRAM, SAVED_TCL;
+		and	SAVED_SCSIID, SELID_MASK, SELID;
+		/* The Target ID we were selected at */
+		if ((ahc->features & AHC_MULTI_TID) != 0) {
+			and	A, OID, TARGIDIN;
+		} else if ((ahc->features & AHC_ULTRA2) != 0) {
+			and	A, OID, SCSIID_ULTRA2;
 		} else {
-			mov	DFDAT, SAVED_TCL;
+			and	A, OID, SCSIID;
+		}
+		or	SAVED_SCSIID, A;
+		if ((ahc->features & AHC_TWIN) != 0) {
+			test 	SBLKCTL, SELBUSB jz . + 2;
+			or	SAVED_SCSIID, TWIN_CHNLB;
 		}
-
-		/* The Target ID we were selected at */
 		if ((ahc->features & AHC_CMD_CHAN) != 0) {
-			if ((ahc->features & AHC_MULTI_TID) != 0) {
-				and	CCSCBRAM, OID, TARGIDIN;
-			} else if ((ahc->features & AHC_ULTRA2) != 0) {
-				and	CCSCBRAM, OID, SCSIID_ULTRA2;
-			} else {
-				and	CCSCBRAM, OID, SCSIID;
-			}
+			mov	CCSCBRAM, SAVED_SCSIID;
 		} else {
-			if ((ahc->features & AHC_MULTI_TID) != 0) {
-				and	DFDAT, OID, TARGIDIN;
-			} else if ((ahc->features & AHC_ULTRA2) != 0) {
-				and	DFDAT, OID, SCSIID_ULTRA2;
-			} else {
-				and	DFDAT, OID, SCSIID;
-			}
+			mov	DFDAT, SAVED_SCSIID;
 		}
 
-		/* No tag yet */
-		mvi	INITIATOR_TAG, SCB_LIST_NULL;
-
 		/*
 		 * If ATN isn't asserted, the target isn't interested
 		 * in talking to us.  Go directly to bus free.
+		 * XXX SCSI-1 may require us to assume lun 0 if
+		 * ATN is false.
 		 */
 		test	SCSISIGI, ATNI	jz	target_busfree;
 
@@ -291,7 +250,6 @@ select_in:
 		 * Our first message must be one of IDENTIFY, ABORT, or
 		 * BUS_DEVICE_RESET.
 		 */
-		/* XXX May need to be more lax here for older initiators... */
 		test	DINDEX, MSG_IDENTIFYFLAG jz host_target_message_loop;
 		/* Store for host */
 		if ((ahc->features & AHC_CMD_CHAN) != 0) {
@@ -341,6 +299,10 @@ select_in:
 			mov	DFDAT, DINDEX;
 		}
 		mov	INITIATOR_TAG, DINDEX;
+		or	SEQ_FLAGS, TARGET_CMD_IS_TAGGED;
+		test	SCSISIGI, ATNI	jz . + 2;
+		/* Initiator still wants to give us messages */
+		call	target_inb;
 		jmp	ident_messages_done;
 
 		/*
@@ -363,7 +325,7 @@ ident_messages_done:
 		}
 		cmp	TQINPOS, A jne tqinfifo_has_space;
 		mvi	P_STATUS|BSYO call change_phase;
-		cmp	INITIATOR_TAG, SCB_LIST_NULL je . + 3;
+		test	SEQ_FLAGS, TARGET_CMD_IS_TAGGED jnz . + 3;
 		mvi	STATUS_QUEUE_FULL call target_outb;
 		jmp	target_busfree_wait;
 		mvi	STATUS_BUSY call target_outb;
@@ -376,7 +338,7 @@ tqinfifo_has_space:
 			mvi	DFDAT, SCB_LIST_NULL;
 		}
 		or	SEQ_FLAGS, TARG_CMD_PENDING|IDENTIFY_SEEN;
-		test	SCSISIGI, ATNI	jnz target_mesgout_pending_msg;
+		test	SCSISIGI, ATNI	jnz target_mesgout_pending;
 		jmp	target_ITloop;
 		
 /*
@@ -404,19 +366,18 @@ if ((ahc->flags & AHC_INITIATORMODE) != 0) {
  */
 initiator_reselect:
 	/* XXX test for and handle ONE BIT condition */
-	and	SAVED_TCL, SELID_MASK, SELID;
+	and	SAVED_SCSIID, SELID_MASK, SELID;
+	if ((ahc->features & AHC_ULTRA2) != 0) {
+		and	A, OID, SCSIID_ULTRA2;
+	} else {
+		and	A, OID, SCSIID;
+	}
+	or	SAVED_SCSIID, A;
 	if ((ahc->features & AHC_TWIN) != 0) {
 		test	SBLKCTL, SELBUSB	jz . + 2;
-		or	SAVED_TCL, SELBUSB;
+		or	SAVED_SCSIID, TWIN_CHNLB;
 	}
 	or	SXFRCTL0, SPIOEN|CLRSTCNT|CLRCHN;
-	mvi	CLRSINT1,CLRBUSFREE;
-	or	SIMODE1, ENBUSFREE;		/*
-						 * We aren't expecting a
-						 * bus free, so interrupt
-						 * the kernel driver if it
-						 * happens.
-						 */
 	jmp	ITloop;
 }
 
@@ -432,7 +393,9 @@ select_out:
 	mvi	CLRSINT0, CLRSELDO;
 	mov	SCBPTR, WAITING_SCBH;
 	mov	WAITING_SCBH,SCB_NEXT;
-	mov	SAVED_TCL, SCB_TCL;
+	mov	SAVED_SCSIID, SCB_SCSIID;
+	mov	SAVED_LUN, SCB_LUN;
+	mvi	SPIOEN call	initialize_channel;
 	if ((ahc->flags & AHC_TARGETMODE) != 0) {
 		test	SSTAT0, TARGET	jz initiator_select;
 
@@ -442,13 +405,11 @@ select_out:
 		 * sending our identify messages.
 		 */
 		mvi	P_MESGIN|BSYO call change_phase;
-		mvi	CLRSINT1,CLRBUSFREE;
 
 		/*
 		 * Start out with a simple identify message.
 		 */
-		and	A, LID, SCB_TCL;
-		or	A, MSG_IDENTIFYFLAG call target_outb;
+		or	SCB_LUN, MSG_IDENTIFYFLAG call target_outb;
 
 		/*
 		 * If we are the result of a tagged command, send
@@ -456,16 +417,14 @@ select_out:
 		 */
 		test	SCB_CONTROL, TAG_ENB	jz . + 3;
 		mvi	MSG_SIMPLE_Q_TAG call target_outb;
-		mov	SCB_INITIATOR_TAG call target_outb;
-		mov	INITIATOR_TAG, SCB_INITIATOR_TAG;
+		mov	SCB_TARGET_INFO[SCB_INITIATOR_TAG] call target_outb;
 target_synccmd:
 		/*
 		 * Now determine what phases the host wants us
 		 * to go through.
 		 */
-		mov	SEQ_FLAGS, SCB_TARGET_PHASES;
+		mov	SEQ_FLAGS, SCB_TARGET_INFO[SCB_TARGET_PHASES];
 		
-
 target_ITloop:
 		/*
 		 * Start honoring ATN signals now that
@@ -493,9 +452,10 @@ target_ITloop:
 
 target_mesgout:
 		mvi	SCSISIGO, P_MESGOUT|BSYO;
+target_mesgout_continue:
 		call	target_inb;
+target_mesgout_pending:
 		/* Local Processing goes here... */
-target_mesgout_pending_msg:
 		jmp	host_target_message_loop;
 		
 target_disconnect:
@@ -508,6 +468,7 @@ target_busfree_wait:
 		/* Wait for preceeding I/O session to complete. */
 		test	SCSISIGI, ACKI jnz .;
 target_busfree:
+		and	SIMODE1, ~ENBUSFREE;
 		clr	SCSISIGO;
 		mvi	LASTPHASE, P_BUSFREE;
 		call	complete_target_cmd;
@@ -556,22 +517,21 @@ command_phase_done:
 
 target_dphase:
 		/*
-		 * Data direction flags are from the
-		 * perspective of the initiator.
+		 * Data phases on the bus are from the
+		 * perspective of the initiator.  The dma
+		 * code looks at LASTPHASE to determine the
+		 * data direction of the DMA.  Toggle it for
+		 * target transfers.
 		 */
-		test	SCB_TARGET_PHASES[1], TARGET_DATA_IN jz . + 4;
-		mvi	LASTPHASE, P_DATAOUT;
-		mvi	P_DATAIN|BSYO call change_phase;
-		jmp	. + 3;
-		mvi	LASTPHASE, P_DATAIN;
-		mvi	P_DATAOUT|BSYO call change_phase;
-		mov	ALLZEROS call initialize_channel;
+		xor	LASTPHASE, IOI, SCB_TARGET_INFO[SCB_TARGET_DATA_DIR];
+		or	SCB_TARGET_INFO[SCB_TARGET_DATA_DIR], BSYO
+			call change_phase;
 		jmp	p_data;
 
 target_sphase:
 		mvi	P_STATUS|BSYO call change_phase;
 		mvi	LASTPHASE, P_STATUS;
-		mov	SCB_TARGET_STATUS call target_outb;
+		mov	SCB_TARGET_INFO[SCB_TARGET_STATUS] call target_outb;
 		/* XXX Watch for ATN or parity errors??? */
 		mvi	SCSISIGO, P_MESGIN|BSYO;
 		/* MSG_CMDCMPLT is 0, but we can't do an immediate of 0 */
@@ -594,9 +554,7 @@ complete_target_cmd:
 			or	DFCNTRL, FIFORESET;
 			mvi	DFWADDR, 3; /* Third 64bit word or byte 24 */
 			mov	DFDAT, ALLONES;
-			mvi	HCNT[0], 28;
-			clr	HCNT[1];
-			clr	HCNT[2];
+			mvi	28	call set_hcnt;
 			or	DFCNTRL, HDMAEN|FIFOFLUSH;
 			call	dma_finish;
 		}
@@ -606,15 +564,6 @@ complete_target_cmd:
 
 if ((ahc->flags & AHC_INITIATORMODE) != 0) {
 initiator_select:
-	mvi	SPIOEN call	initialize_channel;
-
-	/*
-	 * We aren't expecting a bus free, so interrupt
-	 * the kernel driver if it happens.
-	 */
-	mvi	CLRSINT1,CLRBUSFREE;
-	or	SIMODE1, ENBUSFREE;
-
 	/*
 	 * As soon as we get a successful selection, the target
 	 * should go into the message out phase since we have ATN
@@ -628,6 +577,7 @@ initiator_select:
 	 * target to assert REQ before checking MSG, C/D and I/O for
 	 * the bus phase.
 	 */
+mesgin_phasemis:
 ITloop:
 	call	phase_lock;
 
@@ -658,6 +608,7 @@ clear_target_state:
 	 * clear DFCNTRL too.
 	 */
 	clr	DFCNTRL;
+	mvi	SXFRCTL0, CLRSTCNT|CLRCHN;
 
 	/*
 	 * We don't know the target we will connect to,
@@ -668,12 +619,118 @@ clear_target_state:
 		bmov	SCSIRATE, ALLZEROS, 2;
 	} else {
 		clr	SCSIRATE;
-		and	SXFRCTL0, ~(FAST20);
+		if ((ahc->features & AHC_ULTRA) != 0) {
+			and	SXFRCTL0, ~(FAST20);
+		}
 	}
 	mvi	LASTPHASE, P_BUSFREE;
 	/* clear target specific flags */
 	clr	SEQ_FLAGS ret;
 
+sg_advance:
+	clr	A;			/* add sizeof(struct scatter) */
+	add	SCB_RESIDUAL_SGPTR[0],SG_SIZEOF;
+	adc	SCB_RESIDUAL_SGPTR[1],A;
+	adc	SCB_RESIDUAL_SGPTR[2],A;
+	adc	SCB_RESIDUAL_SGPTR[3],A ret;
+
+idle_loop:
+	if ((ahc->features & AHC_CMD_CHAN) != 0) {
+		/* Did we just finish fetching segs? */
+		cmp	CCSGCTL, CCSGEN|CCSGDONE je idle_sgfetch_complete;
+
+		/* Are we actively fetching segments? */
+		test	CCSGCTL, CCSGEN jnz return;
+
+		/*
+		 * Do we need any more segments?
+		 */
+		test	SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jnz return;
+
+		/*
+		 * Do we have any prefetch left???
+		 */
+		cmp	CCSGADDR, CCSGADDR_MAX jne idle_sg_avail;
+
+		/*
+		 * Need to fetch segments, but we can only do that
+		 * if the command channel is completely idle.  Make
+		 * sure we don't have an SCB prefetch going on.
+		 */
+		test	CCSCBCTL, CCSCBEN jnz return;
+
+		/*
+		 * The kernel allocates S/G space so that it is 128 byte
+		 * aligned and ends on a 128 byte boundary.  We fetch
+		 * up to the next 128 byte boundary so we don't attempt
+		 * to read a non-existent page.
+		 */
+		mvi	CCHCNT, CCSGADDR_MAX;
+		and	CCHADDR[0], ~(CCSGADDR_MAX - 1), SCB_RESIDUAL_SGPTR;
+		bmov	CCHADDR[1], SCB_RESIDUAL_SGPTR[1], 3;
+		mvi	CCSGCTL, CCSGEN|CCSGRESET ret;
+idle_sgfetch_complete:
+		clr	CCSGCTL;
+		test	CCSGCTL, CCSGEN jnz .;
+		and	CCSGADDR, (CCSGADDR_MAX - 1), SCB_RESIDUAL_SGPTR;
+idle_sg_avail:
+		if ((ahc->features & AHC_ULTRA2) != 0) {
+			/* Does the hardware have space for another SG entry? */
+			test	DFSTATUS, PRELOAD_AVAIL jz return;
+			bmov 	HADDR, CCSGRAM, 4;
+			bmov	SINDEX, CCSGRAM, 1;
+			test	SINDEX, 0x1 jz . + 2;
+			xor	DATA_COUNT_ODD, 0x1;
+			bmov	HCNT[0], SINDEX, 1;
+			bmov	HCNT[1], CCSGRAM, 2;
+			bmov	SCB_RESIDUAL_DATACNT[3], CCSGRAM, 1;
+			call	sg_advance;
+			mov	SINDEX, SCB_RESIDUAL_SGPTR[0];
+			test	DATA_COUNT_ODD, 0x1 jz . + 2;
+			or	SINDEX, ODD_SEG;
+			test	SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz . + 2;
+			or	SINDEX, LAST_SEG;
+			mov	SG_CACHE_PRE, SINDEX;
+			/* Load the segment by writing DFCNTRL again */
+			mov	DFCNTRL, DMAPARAMS;
+		}
+		ret;
+	}
+
+if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0 && ahc->pci_cachesize != 0) {
+/*
+ * Calculate the trailing portion of this S/G segment that cannot
+ * be transferred using memory write and invalidate PCI transactions.  
+ * XXX Can we optimize this for PCI writes only???
+ */
+calc_mwi_residual:
+	/*
+	 * If the ending address is on a cacheline boundary,
+	 * there is no need for an extra segment.
+	 */
+	mov	A, HCNT[0];
+	add	A, A, HADDR[0];
+	and	A, CACHESIZE_MASK;
+	test	A, 0xFF jz return;
+
+	/*
+	 * If the transfer is less than a cachline,
+	 * there is no need for an extra segment.
+	 */
+	test	HCNT[1], 0xFF	jnz calc_mwi_residual_final;
+	test	HCNT[2], 0xFF	jnz calc_mwi_residual_final;
+	add	NONE, INVERTED_CACHESIZE_MASK, HCNT[0];
+	jnc	return;
+
+calc_mwi_residual_final:
+	mov	MWI_RESIDUAL, A;
+	not	A;
+	inc	A;
+	add	HCNT[0], A;
+	adc	HCNT[1], -1;
+	adc	HCNT[2], -1 ret;
+}
+
 /*
  * If we re-enter the data phase after going through another phase, the
  * STCNT may have been cleared, so restore it from the residual field.
@@ -686,14 +743,14 @@ data_phase_reinit:
 		 * the shaddow address.
 		 */
 		bmov	HADDR, SHADDR, 4;
-		bmov	HCNT, SCB_RESID_DCNT, 3;
+		bmov	HCNT, SCB_RESIDUAL_DATACNT, 3;
 	} else if ((ahc->features & AHC_CMD_CHAN) != 0) {
-		bmov	STCNT, SCB_RESID_DCNT, 3;
+		bmov	STCNT, SCB_RESIDUAL_DATACNT, 3;
 	} else {
 		mvi	DINDEX, STCNT;
-		mvi	SCB_RESID_DCNT	call bcopy_3;
+		mvi	SCB_RESIDUAL_DATACNT call bcopy_3;
 	}
-	and	DATA_COUNT_ODD, 0x1, SCB_RESID_DCNT[0];
+	and	DATA_COUNT_ODD, 0x1, SCB_RESIDUAL_DATACNT[0];
 	jmp	data_phase_loop;
 
 p_data:
@@ -709,6 +766,7 @@ p_data:
 					 * phase is okay - seen identify, etc.
 					 */
 	if ((ahc->features & AHC_CMD_CHAN) != 0) {
+		/* We don't have any valid S/G elements */
 		mvi	CCSGADDR, CCSGADDR_MAX;
 	}
 	test	SEQ_FLAGS, DPHASE	jnz data_phase_reinit;
@@ -718,17 +776,25 @@ p_data:
 
 	/*
 	 * Initialize the DMA address and counter from the SCB.
-	 * Also set SG_COUNT and SG_NEXT in memory since we cannot
-	 * modify the values in the SCB itself until we see a
-	 * save data pointers message.
+	 * Also set SCB_RESIDUAL_SGPTR, including the LAST_SEG
+	 * flag in the highest byte of the data count.  We cannot
+	 * modify the saved values in the SCB until we see a save
+	 * data pointers message.
 	 */
 	if ((ahc->features & AHC_CMD_CHAN) != 0) {
 		bmov	HADDR, SCB_DATAPTR, 7;
+		bmov	SCB_RESIDUAL_DATACNT[3], SCB_DATACNT[3], 5;
 	} else {
 		mvi	DINDEX, HADDR;
 		mvi	SCB_DATAPTR	call bcopy_7;
+		mvi	DINDEX, SCB_RESIDUAL_DATACNT + 3;
+		mvi	SCB_DATACNT + 3 call bcopy_5;
 	}
-	and	DATA_COUNT_ODD, 0x1, SCB_DATACNT[0];
+	if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0 && ahc->pci_cachesize != 0) {
+		call	calc_mwi_residual;
+	}
+	and	SCB_RESIDUAL_SGPTR[0], ~SG_FULL_RESID;
+	and	DATA_COUNT_ODD, 0x1, HCNT[0];
 
 	if ((ahc->features & AHC_ULTRA2) == 0) {
 		if ((ahc->features & AHC_CMD_CHAN) != 0) {
@@ -738,26 +804,21 @@ p_data:
 		}
 	}
 
-	if ((ahc->features & AHC_CMD_CHAN) != 0) {
-		bmov	SG_COUNT, SCB_SGCOUNT, 5;
-	} else {
-		mvi	DINDEX, SG_COUNT;
-		mvi	SCB_SGCOUNT	call bcopy_5;
-	}
-
 data_phase_loop:
-/* Guard against overruns */
-	test	SG_COUNT, 0xff jnz data_phase_inbounds;
-/*
- * Turn on 'Bit Bucket' mode, set the transfer count to
- * 16meg and let the target run until it changes phase.
- * When the transfer completes, notify the host that we
- * had an overrun.
- */
+	/* Guard against overruns */
+	test	SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL jz data_phase_inbounds;
+
+	/*
+	 * Turn on 'Bit Bucket' mode, set the transfer count to
+	 * 16meg and let the target run until it changes phase.
+	 * When the transfer completes, notify the host that we
+	 * had an overrun.
+	 */
 	or	SXFRCTL1,BITBUCKET;
 	and	DMAPARAMS, ~(HDMAEN|SDMAEN);
 	if ((ahc->features & AHC_ULTRA2) != 0) {
 		bmov	HCNT, ALLONES, 3;
+		or	SXFRCTL0, CLRCHN|CLRSTCNT;/* Ensure FIFO empty */
 	} else if ((ahc->features & AHC_CMD_CHAN) != 0) {
 		bmov	STCNT, ALLONES, 3;
 	} else {
@@ -766,147 +827,331 @@ data_phase_loop:
 		mvi	STCNT[2], 0xFF;
 	}
 data_phase_inbounds:
-/* If we are the last SG block, tell the hardware. */
-	cmp	SG_COUNT,0x01 jne data_phase_wideodd;
 	if ((ahc->features & AHC_ULTRA2) != 0) {
-		or	SG_CACHEPTR, LAST_SEG;
+		mov	SINDEX, SCB_RESIDUAL_SGPTR[0];
+		test	SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz . + 2;
+		or	SINDEX, LAST_SEG;
+		test	DATA_COUNT_ODD, 0x1 jz . + 2;
+		or	SINDEX, ODD_SEG;
+		mov	SG_CACHE_PRE, SINDEX;
+		mov	DFCNTRL, DMAPARAMS;
+ultra2_dma_loop:
+		call	idle_loop;
+		/*
+		 * The transfer is complete if either the last segment
+		 * completes or the target changes phase.
+		 */
+		test	SG_CACHE_SHADOW, LAST_SEG_DONE jnz ultra2_dmafinish;
+		test	SSTAT1,PHASEMIS	jz ultra2_dma_loop;
+
+ultra2_dmafinish:
+		test	DFCNTRL, DIRECTION jnz ultra2_dmafifoempty;
+		and	DFCNTRL, ~SCSIEN;
+		test	DFCNTRL, SCSIEN jnz .;
+		if ((ahc->bugs & AHC_AUTOFLUSH_BUG) != 0) {
+			test	DFSTATUS, FIFOEMP jnz ultra2_dmafifoempty;
+		}
+ultra2_dmafifoflush:
+		if ((ahc->bugs & AHC_AUTOFLUSH_BUG) != 0) {
+			/*
+			 * On Rev A of the aic7890, the autoflush
+			 * features doesn't function correctly.
+			 * Perform an explicit manual flush.  During
+			 * a manual flush, the FIFOEMP bit becomes
+			 * true every time the PCI FIFO empties
+			 * regardless of the state of the SCSI FIFO.
+			 * It can take up to 4 clock cycles for the
+			 * SCSI FIFO to get data into the PCI FIFO
+			 * and for FIFOEMP to de-assert.  Here we
+			 * guard against this condition by making
+			 * sure the FIFOEMP bit stays on for 5 full
+			 * clock cycles.
+			 */
+			or	DFCNTRL, FIFOFLUSH;
+			test	DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
+			test	DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
+			test	DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
+			test	DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
+		}
+		test	DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
+ultra2_dmafifoempty:
+		/* Don't clobber an inprogress host data transfer */
+		test	DFSTATUS, MREQPEND	jnz ultra2_dmafifoempty;
+ultra2_dmahalt:
+		and     DFCNTRL, ~(SCSIEN|HDMAEN);
+		test	DFCNTRL, HDMAEN jnz .;
+
+		test	SXFRCTL1,BITBUCKET jnz data_phase_finish;
+
+		/*
+		 * If, by chance, we stopped before being able
+		 * to fetch additional segments for this transfer,
+		 * yet the last S/G was completely exhausted,
+		 * call our idle loop until it is able to load
+		 * another segment.  This will allow us to immediately
+		 * pickup on the next segment on the next data phase.
+		 *
+		 * If we happened to stop on the last segment, then
+		 * our residual information is still correct from
+		 * the idle loop and there is no need to perform
+		 * any fixups.  Just jump to data_phase_finish.
+		 */
+ultra2_ensure_sg:
+		test	SG_CACHE_SHADOW, LAST_SEG jz ultra2_shvalid;
+		/* Record if we've consumed all S/G entries */
+		test	SG_CACHE_SHADOW, LAST_SEG_DONE jz data_phase_finish;
+		or	SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL;
+		jmp	data_phase_finish;
+
+ultra2_shvalid:
+                test    SSTAT2, SHVALID	jnz sgptr_fixup;
+		call	idle_loop;
+		jmp	ultra2_ensure_sg;
+
+sgptr_fixup:
+		/*
+		 * Fixup the residual next S/G pointer.  The S/G preload
+		 * feature of the chip allows us to load two elements
+		 * in addition to the currently active element.  We
+		 * store the bottom byte of the next S/G pointer in
+		 * the SG_CACEPTR register so we can restore the
+		 * correct value when the DMA completes.  If the next
+		 * sg ptr value has advanced to the point where higher
+		 * bytes in the address have been affected, fix them
+		 * too.
+		 */
+		test	SG_CACHE_SHADOW, 0x80 jz sgptr_fixup_done;
+		test	SCB_RESIDUAL_SGPTR[0], 0x80 jnz sgptr_fixup_done;
+		add	SCB_RESIDUAL_SGPTR[1], -1;
+		adc	SCB_RESIDUAL_SGPTR[2], -1; 
+		adc	SCB_RESIDUAL_SGPTR[3], -1;
+sgptr_fixup_done:
+		and	SCB_RESIDUAL_SGPTR[0], SG_ADDR_MASK, SG_CACHE_SHADOW;
+		clr	DATA_COUNT_ODD;
+		test	SG_CACHE_SHADOW, ODD_SEG jz . + 2;
+		or	DATA_COUNT_ODD, 0x1;
+		clr	SCB_RESIDUAL_DATACNT[3]; /* We are not the last seg */
 	} else {
+		/* If we are the last SG block, tell the hardware. */
+		if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
+		  && ahc->pci_cachesize != 0) {
+			test	MWI_RESIDUAL, 0xFF jnz dma_mid_sg;
+		}
+		test	SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz dma_mid_sg;
 		if ((ahc->flags & AHC_TARGETMODE) != 0) {
-			test	SSTAT0, TARGET jz . + 2;
-			test	DMAPARAMS, DIRECTION jz data_phase_wideodd;
+			test	SSTAT0, TARGET jz dma_last_sg;
+			if ((ahc->flags & AHC_TMODE_WIDEODD_BUG) != 0) {
+				test	DMAPARAMS, DIRECTION jz dma_mid_sg;
+			}
 		}
+dma_last_sg:
 		and	DMAPARAMS, ~WIDEODD;
-	}
-data_phase_wideodd:
-	if ((ahc->features & AHC_ULTRA2) != 0) {
-		mov	SINDEX, ALLONES;
+dma_mid_sg:
+		/* Start DMA data transfer. */
 		mov	DFCNTRL, DMAPARAMS;
-		test	SSTAT0, SDONE jnz .;/* Wait for preload to complete */
-data_phase_dma_loop:
-		test	SSTAT0,	SDONE jnz data_phase_dma_done;
-		test	SSTAT1,PHASEMIS	jz data_phase_dma_loop;	/* ie. underrun */
-	} else {
-		mov	DMAPARAMS  call dma;
-	}
-
-data_phase_dma_done:
-/* Go tell the host about any overruns */
-	test	SXFRCTL1,BITBUCKET jnz data_phase_overrun;
+dma_loop:
+		if ((ahc->features & AHC_CMD_CHAN) != 0) {
+			call	idle_loop;
+		}
+		test	SSTAT0,DMADONE	jnz dma_dmadone;
+		test	SSTAT1,PHASEMIS	jz dma_loop;	/* ie. underrun */
+dma_phasemis:
+		/*
+		 * We will be "done" DMAing when the transfer count goes to
+		 * zero, or the target changes the phase (in light of this,
+		 * it makes sense that the DMA circuitry doesn't ACK when
+		 * PHASEMIS is active).  If we are doing a SCSI->Host transfer,
+		 * the data FIFO should be flushed auto-magically on STCNT=0
+		 * or a phase change, so just wait for FIFO empty status.
+		 */
+dma_checkfifo:
+		test	DFCNTRL,DIRECTION	jnz dma_fifoempty;
+dma_fifoflush:
+		test	DFSTATUS,FIFOEMP	jz dma_fifoflush;
+dma_fifoempty:
+		/* Don't clobber an inprogress host data transfer */
+		test	DFSTATUS, MREQPEND	jnz dma_fifoempty;
 
-/* See if we completed this segment */
-	test	STCNT[0], 0xff	jnz data_phase_finish;
-	test	STCNT[1], 0xff	jnz data_phase_finish;
-	test	STCNT[2], 0xff	jnz data_phase_finish;
+		/*
+		 * Now shut off the DMA and make sure that the DMA
+		 * hardware has actually stopped.  Touching the DMA
+		 * counters, etc. while a DMA is active will result
+		 * in an ILLSADDR exception.
+		 */
+dma_dmadone:
+		and	DFCNTRL, ~(SCSIEN|SDMAEN|HDMAEN);
+dma_halt:
+		/*
+		 * Some revisions of the aic78XX have a problem where, if the
+		 * data fifo is full, but the PCI input latch is not empty, 
+		 * HDMAEN cannot be cleared.  The fix used here is to drain
+		 * the prefetched but unused data from the data fifo until
+		 * there is space for the input latch to drain.
+		 */
+		if ((ahc->bugs & AHC_PCI_2_1_RETRY_BUG) != 0) {
+			mov	NONE, DFDAT;
+		}
+		test	DFCNTRL, (SCSIEN|SDMAEN|HDMAEN) jnz dma_halt;
 
-/*
- * Advance the scatter-gather pointers if needed 
- */
-sg_advance:
-	dec	SG_COUNT;	/* one less segment to go */
+		/* See if we have completed this last segment */
+		test	STCNT[0], 0xff	jnz data_phase_finish;
+		test	STCNT[1], 0xff	jnz data_phase_finish;
+		test	STCNT[2], 0xff	jnz data_phase_finish;
 
-	test	SG_COUNT, 0xff	jz data_phase_finish; /* Are we done? */
-/*
- * Load a struct scatter and set up the data address and length.
- * If the working value of the SG count is nonzero, then
- * we need to load a new set of values.
- *
- * This, like all DMA's, assumes little-endian host data storage.
- */
-sg_load:
-	if ((ahc->features & AHC_CMD_CHAN) != 0) {
 		/*
-		 * Do we have any prefetch left???
+		 * Advance the scatter-gather pointers if needed 
 		 */
-		cmp	CCSGADDR, CCSGADDR_MAX jne prefetched_segs_avail;
-
+		if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
+		  && ahc->pci_cachesize != 0) {
+			test	MWI_RESIDUAL, 0xFF jz no_mwi_resid;
+			/*
+			 * Reload HADDR from SHADDR and setup the
+			 * count to be the size of our residual.
+			 */
+			if ((ahc->features & AHC_CMD_CHAN) != 0) {
+				bmov	HADDR, SHADDR, 4;
+				mov	HCNT, MWI_RESIDUAL;
+				bmov	HCNT[1], ALLZEROS, 2;
+			} else {
+				mvi	DINDEX, HADDR;
+				mvi	SHADDR call bcopy_4;
+				mov	MWI_RESIDUAL call set_hcnt;
+			}
+			clr	MWI_RESIDUAL;
+			jmp	sg_load_done;
+no_mwi_resid:
+		}
+		test	SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG jz sg_load;
+		or	SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL;
+		jmp	data_phase_finish;
+sg_load:
 		/*
-		 * Fetch MIN(CCSGADDR_MAX, (SG_COUNT * 8)) bytes.
+		 * Load the next SG element's data address and length
+		 * into the DMA engine.  If we don't have hardware
+		 * to perform a prefetch, we'll have to fetch the
+		 * segment from host memory first.
 		 */
-		add	A, -(CCSGRAM_MAXSEGS + 1), SG_COUNT;
-		mvi	A, CCSGADDR_MAX;
-		jc	. + 2;
-		shl	A, 3, SG_COUNT;
-		mov	CCHCNT, A;
-		bmov	CCHADDR, SG_NEXT, 4;
-		mvi	CCSGCTL, CCSGEN|CCSGRESET;
-		test	CCSGCTL, CCSGDONE jz .;
-		and	CCSGCTL, ~CCSGEN;
-		test	CCSGCTL, CCSGEN jnz .;
-		mvi	CCSGCTL, CCSGRESET;
-prefetched_segs_avail:
-		bmov 	HADDR, CCSGRAM, 8;
-	} else {
-		mvi	DINDEX, HADDR;
-		mvi	SG_NEXT	call bcopy_4;
+		if ((ahc->features & AHC_CMD_CHAN) != 0) {
+			/* Wait for the idle loop to complete */
+			test	CCSGCTL, CCSGEN jz . + 3;
+			call	idle_loop;
+			test	CCSGCTL, CCSGEN jnz . - 1;
+			bmov 	HADDR, CCSGRAM, 7;
+			test	CCSGRAM, SG_LAST_SEG jz . + 2;
+			or	SCB_RESIDUAL_DATACNT[3], SG_LAST_SEG;
+		} else {
+			mvi	DINDEX, HADDR;
+			mvi	SCB_RESIDUAL_SGPTR	call bcopy_4;
 
-		mvi	HCNT[0],SG_SIZEOF;
-		clr	HCNT[1];
-		clr	HCNT[2];
+			mvi	SG_SIZEOF	call set_hcnt;
 
-		or	DFCNTRL, HDMAEN|DIRECTION|FIFORESET;
+			or	DFCNTRL, HDMAEN|DIRECTION|FIFORESET;
 
-		call	dma_finish;
+			call	dma_finish;
 
-		/*
-		 * Copy data from FIFO into SCB data pointer and data count.
-		 * This assumes that the SG segments are of the form:
-		 * struct ahc_dma_seg {
-		 *	u_int32_t	addr;	four bytes, little-endian order
-		 *	u_int32_t	len;	four bytes, little endian order
-		 * };
-		 */
-		mvi	HADDR	call dfdat_in_7;
-	}
+			mvi	DINDEX, HADDR;
+			call	dfdat_in_7;
+			mov	SCB_RESIDUAL_DATACNT[3], DFDAT;
+		}
 
-	/* Track odd'ness */
-	test	HCNT[0], 0x1 jz . + 2;
-	xor	DATA_COUNT_ODD, 0x1;
+		if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
+		  && ahc->pci_cachesize != 0) {
+			call calc_mwi_residual;
+		}
 
-	if ((ahc->features & AHC_ULTRA2) == 0) {
-		/* Load STCNT as well.  It is a mirror of HCNT */
+		/* Point to the new next sg in memory */
+		call	sg_advance;
+
+sg_load_done:
 		if ((ahc->features & AHC_CMD_CHAN) != 0) {
 			bmov	STCNT, HCNT, 3;
 		} else {
 			call	set_stcnt_from_hcnt;
 		}
-	}
-
-/* Advance the SG pointer */
-	clr	A;			/* add sizeof(struct scatter) */
-	add	SG_NEXT[0],SG_SIZEOF;
-	adc	SG_NEXT[1],A;
+		/* Track odd'ness */
+		test	HCNT[0], 0x1 jz . + 2;
+		xor	DATA_COUNT_ODD, 0x1;
 
+		if ((ahc->flags & AHC_TARGETMODE) != 0) {
+			test	SSTAT0, TARGET jnz data_phase_loop;
+		}
+	}
+data_phase_finish:
+	/*
+	 * If the target has left us in data phase, loop through
+	 * the dma code again.  In the case of ULTRA2 adapters,
+	 * we should only loop if there is a data overrun.  For
+	 * all other adapters, we'll loop after each S/G element
+	 * is loaded as well as if there is an overrun.
+	 */
 	if ((ahc->flags & AHC_TARGETMODE) != 0) {
-		test	SSTAT0, TARGET jnz data_phase_loop;
+		test	SSTAT0, TARGET jnz data_phase_done;
 	}
-	test	SSTAT1, REQINIT jz .;
-	test	SSTAT1,PHASEMIS	jz data_phase_loop;
+	if ((ahc->flags & AHC_INITIATORMODE) != 0) {
+		test	SSTAT1, REQINIT jz .;
+		test	SSTAT1,PHASEMIS	jz data_phase_loop;
+	
+		if ((ahc->features & AHC_CMD_CHAN) != 0) {
+			/* Kill off any pending prefetch */
+			clr	CCSGCTL;
+			test	CCSGCTL, CCSGEN jnz .;
+		}
 
-	/* Ensure the last seg is visable at the shaddow layer */
-	if ((ahc->features & AHC_ULTRA2) != 0) {
-		mov	DFCNTRL, DMAPARAMS;
-		test	SSTAT0, SDONE jnz .;/* Wait for preload to complete */
+		/*
+		 * Turn off BITBUCKET mode and notify the host
+		 * in the event of an overrun.
+		 */
+		test	SXFRCTL1,BITBUCKET jz data_phase_done;
+		and	SXFRCTL1, ~BITBUCKET;
+		mvi	INTSTAT,DATA_OVERRUN;
+		jmp	ITloop;
 	}
 
-data_phase_finish:
-	if ((ahc->features & AHC_ULTRA2) != 0) {
-		call	ultra2_dmafinish;
-	}
-/*
- * After a DMA finishes, save the SG and STCNT residuals back into the SCB
- * We use STCNT instead of HCNT, since it's a reflection of how many bytes 
- * were transferred on the SCSI (as opposed to the host) bus.
- */
+data_phase_done:
+	/*
+	 * After a DMA finishes, save the SG and STCNT residuals back into
+	 * the SCB.  We use STCNT instead of HCNT, since it's a reflection
+	 * of how many bytes were transferred on the SCSI (as opposed to the
+	 * host) bus.
+	 */
 	if ((ahc->features & AHC_CMD_CHAN) != 0) {
-		bmov	SCB_RESID_DCNT, STCNT, 3;
+		/* Kill off any pending prefetch */
+		clr	CCSGCTL;
+		test	CCSGCTL, CCSGEN jnz .;
+	}
+
+	if ((ahc->bugs & AHC_PCI_MWI_BUG) != 0
+	  && ahc->pci_cachesize != 0) {
+		if ((ahc->features & AHC_CMD_CHAN) != 0) {
+			test	MWI_RESIDUAL, 0xFF jz bmov_resid;
+		}
+		mov	A, MWI_RESIDUAL;
+		add	SCB_RESIDUAL_DATACNT[0], A, STCNT[0];
+		clr	A;
+		adc	SCB_RESIDUAL_DATACNT[1], A, STCNT[1];
+		adc	SCB_RESIDUAL_DATACNT[2], A, STCNT[2];
+		clr	MWI_RESIDUAL;
+		if ((ahc->features & AHC_CMD_CHAN) != 0) {
+			jmp	. + 2;
+bmov_resid:
+			bmov	SCB_RESIDUAL_DATACNT, STCNT, 3;
+		}
+	} else if ((ahc->features & AHC_CMD_CHAN) != 0) {
+		bmov	SCB_RESIDUAL_DATACNT, STCNT, 3;
 	} else {
-		mov	SCB_RESID_DCNT[0],STCNT[0];
-		mov	SCB_RESID_DCNT[1],STCNT[1];
-		mov	SCB_RESID_DCNT[2],STCNT[2];
+		mov	SCB_RESIDUAL_DATACNT[0], STCNT[0];
+		mov	SCB_RESIDUAL_DATACNT[1], STCNT[1];
+		mov	SCB_RESIDUAL_DATACNT[2], STCNT[2];
 	}
-	mov	SCB_RESID_SGCNT, SG_COUNT;
+
+	/*
+	 * Since we've been through a data phase, the SCB_RESID* fields
+	 * are now initialized.  Clear the full residual flag.
+	 */
+	and	SCB_SGPTR[0], ~SG_FULL_RESID;
 
 	if ((ahc->features & AHC_ULTRA2) != 0) {
+		/* Clear the channel in case we return to data phase later */
 		or	SXFRCTL0, CLRSTCNT|CLRCHN;
 	}
 
@@ -920,54 +1165,8 @@ data_phase_finish:
 		test	DFCNTRL, DIRECTION jz target_ITloop;
 		test	SSTAT1, REQINIT	jnz .;
 		jmp	target_ITloop;
-	}
-	jmp	ITloop;
-
-data_phase_overrun:
-	if ((ahc->features & AHC_ULTRA2) != 0) {
-		call	ultra2_dmafinish;
-		or	SXFRCTL0, CLRSTCNT|CLRCHN;
-	}
-/*
- * Turn off BITBUCKET mode and notify the host
- */
-	and	SXFRCTL1, ~BITBUCKET;
-	mvi	INTSTAT,DATA_OVERRUN;
-	jmp	ITloop;
-
-ultra2_dmafinish:
-	if ((ahc->features & AHC_ULTRA2) != 0) {
-		test	DFCNTRL, DIRECTION jnz ultra2_dmafifoempty;
-		and	DFCNTRL, ~SCSIEN;
-		test	DFCNTRL, SCSIEN jnz .;
-ultra2_dmafifoflush:
-		or	DFCNTRL, FIFOFLUSH;
-		/*
-		 * The FIFOEMP status bit on the Ultra2 class
-		 * of controllers seems to be a bit flaky.
-		 * It appears that if the FIFO is full and the
-		 * transfer ends with some data in the REQ/ACK
-		 * FIFO, FIFOEMP will fall temporarily
-		 * as the data is transferred to the PCI bus.
-		 * This glitch lasts for fewer than 5 clock cycles,
-		 * so we work around the problem by ensuring the
-		 * status bit stays false through a full glitch
-		 * window.
-		 */
-		test	DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
-		test	DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
-		test	DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
-		test	DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
-		test	DFSTATUS, FIFOEMP jz ultra2_dmafifoflush;
-
-ultra2_dmafifoempty:
-		/* Don't clobber an inprogress host data transfer */
-		test	DFSTATUS, MREQPEND	jnz ultra2_dmafifoempty;
-
-ultra2_dmahalt:
-		and     DFCNTRL, ~(SCSIEN|HDMAEN);
-		test	DFCNTRL, HDMAEN jnz .;
-		ret;
+	} else {
+		jmp	ITloop;
 	}
 
 if ((ahc->flags & AHC_INITIATORMODE) != 0) {
@@ -977,48 +1176,76 @@ if ((ahc->flags & AHC_INITIATORMODE) != 0) {
 p_command:
 	call	assert;
 
-	if ((ahc->features & AHC_CMD_CHAN) != 0) {
-		mov	HCNT[0], SCB_CMDLEN;
+	if ((ahc->features & AHC_ULTRA2) != 0) {
+		bmov	HCNT[0], SCB_CDB_LEN,  1;
 		bmov	HCNT[1], ALLZEROS, 2;
-		if ((ahc->features & AHC_ULTRA2) == 0) {
-			bmov	STCNT, HCNT, 3;
+		mvi	SG_CACHE_PRE, LAST_SEG;
+	} else if ((ahc->features & AHC_CMD_CHAN) != 0) {
+		bmov	STCNT[0], SCB_CDB_LEN, 1;
+		bmov	STCNT[1], ALLZEROS, 2;
+	} else {
+		mov	STCNT[0], SCB_CDB_LEN;
+		clr	STCNT[1];
+		clr	STCNT[2];
+	}
+	add	NONE, -13, SCB_CDB_LEN;
+	mvi	SCB_CDB_STORE jnc p_command_embedded;
+p_command_from_host:
+	if ((ahc->features & AHC_ULTRA2) != 0) {
+		bmov	HADDR[0], SCB_CDB_PTR, 4;
+		mvi	DFCNTRL, (PRELOADEN|SCSIEN|HDMAEN|DIRECTION);
+	} else {
+		if ((ahc->features & AHC_CMD_CHAN) != 0) {
+			bmov	HADDR[0], SCB_CDB_PTR, 4;
+			bmov	HCNT, STCNT, 3;
+		} else {
+			mvi	DINDEX, HADDR;
+			mvi	SCB_CDB_PTR	call bcopy_5;
+			call	clear_hcnt;
 		}
-		add	NONE, -17, SCB_CMDLEN;
-		jc	dma_cmd_data;
-		/*
-		 * The data fifo seems to require 4 byte alligned
-		 * transfers from the sequencer.  Force this to
-		 * be the case by clearing HADDR[0] even though
-		 * we aren't going to touch host memeory.
-		 */
-		bmov	HADDR[0], ALLZEROS, 1;
-		if ((ahc->features & AHC_ULTRA2) != 0) {
-			mvi	DFCNTRL, (PRELOADEN|SCSIEN|DIRECTION);
+		mvi	DFCNTRL, (SCSIEN|SDMAEN|HDMAEN|DIRECTION|FIFORESET);
+	}
+	jmp	p_command_loop;
+p_command_embedded:
+	/*
+	 * The data fifo seems to require 4 byte alligned
+	 * transfers from the sequencer.  Force this to
+	 * be the case by clearing HADDR[0] even though
+	 * we aren't going to touch host memeory.
+	 */
+	clr	HADDR[0];
+	if ((ahc->features & AHC_ULTRA2) != 0) {
+		mvi	DFCNTRL, (PRELOADEN|SCSIEN|DIRECTION);
+		bmov	DFDAT, SCB_CDB_STORE, 12; 
+	} else if ((ahc->features & AHC_CMD_CHAN) != 0) {
+		if ((ahc->features & AHC_SCB_BTT) != 0) {
+			/*
+			 * On the 7895 the data FIFO will
+			 * get corrupted if you try to dump
+			 * data from external SCB memory into
+			 * the FIFO while it is enabled.  So,
+			 * fill the fifo and then enable SCSI
+			 * transfers.
+			 */
+			mvi	DFCNTRL, (DIRECTION|FIFORESET);
 		} else {
 			mvi	DFCNTRL, (SCSIEN|SDMAEN|DIRECTION|FIFORESET);
 		}
-		bmov   DFDAT, SCB_CMDSTORE, 16; 
-		jmp	cmd_loop;
-dma_cmd_data:
-		bmov	HADDR, SCB_CMDPTR, 4;
-	} else {
-		mvi	DINDEX, HADDR;
-		mvi	SCB_CMDPTR	call bcopy_5;
-		clr	HCNT[1];
-		clr	HCNT[2];
-	}
-
-	if ((ahc->features & AHC_ULTRA2) == 0) {
-		if ((ahc->features & AHC_CMD_CHAN) == 0) {
-			call	set_stcnt_from_hcnt;
+		bmov	DFDAT, SCB_CDB_STORE, 12; 
+		if ((ahc->features & AHC_SCB_BTT) != 0) {
+			mvi	DFCNTRL, (SCSIEN|SDMAEN|DIRECTION|FIFOFLUSH);
+		} else {
+			or	DFCNTRL, FIFOFLUSH;
 		}
-		mvi	DFCNTRL, (SCSIEN|SDMAEN|HDMAEN|DIRECTION|FIFORESET);
 	} else {
-		mvi	DFCNTRL, (PRELOADEN|SCSIEN|HDMAEN|DIRECTION);
+		mvi	DFCNTRL, (SCSIEN|SDMAEN|DIRECTION|FIFORESET);
+		call	copy_to_fifo_6;
+		call	copy_to_fifo_6;
+		or	DFCNTRL, FIFOFLUSH;
 	}
-cmd_loop:
+p_command_loop:
 	test	SSTAT0, SDONE jnz . + 2;
-	test    SSTAT1, PHASEMIS jz cmd_loop;
+	test    SSTAT1, PHASEMIS jz p_command_loop;
 	/*
 	 * Wait for our ACK to go-away on it's own
 	 * instead of being killed by SCSIEN getting cleared.
@@ -1035,7 +1262,7 @@ cmd_loop:
 p_status:
 	call	assert;
 
-	mov	SCB_TARGET_STATUS, SCSIDATL;
+	mov	SCB_SCSI_STATUS, SCSIDATL;
 	jmp	ITloop;
 
 /*
@@ -1068,36 +1295,22 @@ p_mesgout:
 	mov	SINDEX, MSG_OUT;
 	cmp	SINDEX, MSG_IDENTIFYFLAG jne p_mesgout_from_host;
 	test	SCB_CONTROL,MK_MESSAGE	jnz host_message_loop;
-	mov	FUNCTION1, SCB_TCL;
+	mov	FUNCTION1, SCB_SCSIID;
 	mov	A, FUNCTION1;
-	if ((ahc->features & AHC_HS_MAILBOX) != 0) {
-		/*
-		 * Work around a pausing bug in at least the aic7890.
-		 * If the host needs to update the TARGET_MSG_REQUEST
-		 * bit field, it will set the HS_MAILBOX to 1.  In
-		 * response, we pause with a specific interrupt code
-		 * asking for the mask to be updated before we continue.
-		 * Ugh.
-		 */
-		test	HS_MAILBOX, 0xF0	jz . + 2;
-		mvi	INTSTAT, UPDATE_TMSG_REQ;
-		nop;
-	}
 	mov	SINDEX, TARGET_MSG_REQUEST[0];
 	if ((ahc->features & AHC_TWIN) != 0) {
 		/* Second Channel uses high byte bits */
-		test	SCB_TCL, SELBUSB	jz . + 2;
+		test	SCB_SCSIID, TWIN_CHNLB jz . + 2;
 		mov	SINDEX, TARGET_MSG_REQUEST[1];
 	} else if ((ahc->features & AHC_WIDE) != 0) {
-		test	SCB_TCL, 0x80		jz . + 2; /* target > 7 */
+		test	SCB_SCSIID, 0x80	jz . + 2; /* target > 7 */
 		mov	SINDEX, TARGET_MSG_REQUEST[1];
 	}
 	test	SINDEX, A	jnz host_message_loop;
 p_mesgout_identify:
-	and	SINDEX,LID,SCB_TCL;	/* lun */
-	and	A,DISCENB,SCB_CONTROL;	/* mask off disconnect privledge */
-	or	SINDEX,A;		/* or in disconnect privledge */
-	or	SINDEX,MSG_IDENTIFYFLAG;
+	or	SINDEX, MSG_IDENTIFYFLAG|DISCENB, SCB_LUN;
+	test	SCB_CONTROL, DISCENB jnz . + 2;
+	and	SINDEX, ~DISCENB;
 /*
  * Send a tag message if TAG_ENB is set in the SCB control block.
  * Use SCB_TAG (the position in the kernel's SCB array) as the tag value.
@@ -1147,6 +1360,7 @@ p_mesgin:
 	cmp	A,MSG_SAVEDATAPOINTER	je mesgin_sdptrs;
 	cmp	ALLZEROS,A		je mesgin_complete;
 	cmp	A,MSG_RESTOREPOINTERS	je mesgin_rdptrs;
+	cmp	A,MSG_IGN_WIDE_RESIDUE	je mesgin_ign_wide_residue;
 	cmp	A,MSG_NOOP		je mesgin_done;
 
 /*
@@ -1164,14 +1378,27 @@ host_message_loop:
 	cmp	RETURN_1, EXIT_MSG_LOOP	je ITloop + 1;
 	jmp	host_message_loop;
 
+mesgin_ign_wide_residue:
+if ((ahc->features & AHC_WIDE) != 0) {
+	test	SCSIRATE, WIDEXFER jz mesgin_reject;
+	/* Pull the residue byte */
+	mvi	ARG_1	call inb_next;
+	cmp	ARG_1, 0x01 jne mesgin_reject;
+	test	SCB_RESIDUAL_SGPTR[0], SG_LIST_NULL jz . + 2;
+	test	DATA_COUNT_ODD, 0x1	jz mesgin_done;
+	mvi	INTSTAT, IGN_WIDE_RES;
+	jmp	mesgin_done;
+}
+
+mesgin_reject:
+	mvi	MSG_MESSAGE_REJECT	call mk_mesg;
 mesgin_done:
 	mov	NONE,SCSIDATL;		/*dummy read from latch to ACK*/
 	jmp	ITloop;
 
-
 mesgin_complete:
 /*
- * We got a "command complete" message, so put the SCB_TAG into the QOUTFIFO,
+ * We received a "command complete" message.  Put the SCB_TAG into the QOUTFIFO,
  * and trigger a completion interrupt.  Before doing so, check to see if there
  * is a residual or the status byte is something other than STATUS_GOOD (0).
  * In either of these conditions, we upload the SCB back to the host so it can
@@ -1191,18 +1418,23 @@ mesgin_complete:
 /*
  * First check for residuals
  */
-	test	SCB_RESID_SGCNT,0xff	jnz upload_scb;
-	test	SCB_TARGET_STATUS,0xff	jz complete;	/* Good Status? */
+	test	SCB_SGPTR, SG_LIST_NULL jnz check_status;/* No xfer */
+	test	SCB_SGPTR, SG_FULL_RESID jnz upload_scb;/* Never xfered */
+	test	SCB_RESIDUAL_SGPTR, SG_LIST_NULL jz upload_scb;
+check_status:
+	test	SCB_SCSI_STATUS,0xff	jz complete;	/* Good Status? */
 upload_scb:
+	or	SCB_SGPTR, SG_RESID_VALID;
 	mvi	DMAPARAMS, FIFORESET;
 	mov	SCB_TAG		call dma_scb;
-check_status:
-	test	SCB_TARGET_STATUS,0xff	jz complete;	/* Just a residual? */
-	mvi	INTSTAT,BAD_STATUS;			/* let driver know */
-	nop;
-	cmp	RETURN_1, SEND_SENSE	jne complete;
-	/* This SCB becomes the next to execute as it will retrieve sense */
+	test	SCB_SCSI_STATUS, 0xff	jz complete;	/* Just a residual? */
+	mvi	INTSTAT, BAD_STATUS;			/* let driver know */
+	/*
+	 * Prepare to DMA this SCB in case we are told to retrieve sense.
+	 * Fills a delay slot after the INTSTAT as well.
+	 */
 	mvi	DMAPARAMS, HDMAEN|DIRECTION|FIFORESET;
+	cmp	RETURN_1, SEND_SENSE	jne complete;
 	mov	SCB_TAG		call dma_scb;
 add_to_waiting_list:
 	mov	SCB_NEXT,WAITING_SCBH;
@@ -1215,13 +1447,6 @@ add_to_waiting_list:
 	jmp	await_busfree;
 
 complete:
-	/* If we are untagged, clear our address up in host ram */
-	test	SCB_CONTROL, TAG_ENB jnz complete_queue;
-	mov	A, SAVED_TCL;
-	mvi	UNTAGGEDSCB_OFFSET call post_byte_setup;
-	mvi	SCB_LIST_NULL call post_byte;
-
-complete_queue:
 	mov	SCB_TAG call complete_post;
 	jmp	await_busfree;
 }
@@ -1245,11 +1470,20 @@ complete_post:
 if ((ahc->flags & AHC_INITIATORMODE) != 0) {
 /*
  * Is it a disconnect message?  Set a flag in the SCB to remind us
- * and await the bus going free.
+ * and await the bus going free.  If this is an untagged transaction
+ * store the SCB id for it in our untagged target table for lookup on
+ * a reselction.
  */
 mesgin_disconnect:
 	or	SCB_CONTROL,DISCONNECTED;
-	call	add_scb_to_disc_list;
+	if ((ahc->flags & AHC_PAGESCBS) != 0) {
+		call	add_scb_to_disc_list;
+	}
+	test	SCB_CONTROL, TAG_ENB jnz await_busfree;
+	mov	ARG_1, SCB_TAG;
+	mov	SAVED_LUN, SCB_LUN;
+	mov	SCB_SCSIID	call index_busy_target;
+	mov	DINDIR, ARG_1;
 	jmp	await_busfree;
 
 /*
@@ -1263,22 +1497,18 @@ mesgin_sdptrs:
 	test	SEQ_FLAGS, DPHASE	jz mesgin_done;
 
 	/*
-	 * The SCB SGPTR becomes the next one we'll download,
-	 * and the SCB DATAPTR becomes the current SHADDR.
+	 * The SCB_SGPTR becomes the next one we'll download,
+	 * and the SCB_DATAPTR becomes the current SHADDR.
 	 * Use the residual number since STCNT is corrupted by
 	 * any message transfer.
 	 */
 	if ((ahc->features & AHC_CMD_CHAN) != 0) {
-		bmov	SCB_SGCOUNT, SG_COUNT, 5;
 		bmov	SCB_DATAPTR, SHADDR, 4;
-		bmov	SCB_DATACNT, SCB_RESID_DCNT, 3;
+		bmov	SCB_DATACNT, SCB_RESIDUAL_DATACNT, 8;
 	} else {
-		mvi	DINDEX, SCB_SGCOUNT;
-		mvi	SG_COUNT call bcopy_5;
-	
 		mvi	DINDEX, SCB_DATAPTR;
-		mvi	SHADDR		call bcopy_4;
-		mvi	SCB_RESID_DCNT	call bcopy_3;
+		mvi	SHADDR call bcopy_4;
+		mvi	SCB_RESIDUAL_DATACNT call bcopy_8;
 	}
 	jmp	mesgin_done;
 
@@ -1297,39 +1527,55 @@ mesgin_rdptrs:
 	jmp	mesgin_done;
 
 /*
+ * Index into our Busy Target table.  SINDEX and DINDEX are modified
+ * upon return.  SCBPTR may be modified by this action.
+ */
+index_busy_target:
+	shr	SINDEX, 4;
+	if ((ahc->features & AHC_SCB_BTT) != 0) {
+		mov	SCBPTR, SAVED_LUN;
+		add	SINDEX, SCB_64_BTT;
+	} else {
+		add	SINDEX, BUSY_TARGETS;
+	}
+	mov	DINDEX, SINDEX ret;
+
+/*
  * Identify message?  For a reconnecting target, this tells us the lun
  * that the reconnection is for - find the correct SCB and switch to it,
  * clearing the "disconnected" bit so we don't "find" it by accident later.
  */
 mesgin_identify:
-	if ((ahc->features & AHC_WIDE) != 0) {
-		and	A,0x0f;		/* lun in lower four bits */
+	and	SAVED_LUN, MSG_IDENTIFY_LUNMASK, A;
+	/*
+	 * Determine whether a target is using tagged or non-tagged
+	 * transactions by first looking at the transaction stored in
+	 * the busy target array.  If there is no untagged transaction
+	 * for this target or the transaction is for a different lun, then
+	 * this must be an untagged transaction.
+	 */
+	mov	SAVED_SCSIID	call	index_busy_target;
+	mov	A, SINDIR;
+	cmp	A, SCB_LIST_NULL	je snoop_tag;
+	if ((ahc->flags & AHC_PAGESCBS) != 0) {
+		mov	A	call findSCB;
 	} else {
-		and	A,0x07;		/* lun in lower three bits */
+		mov	SCBPTR, A;
 	}
-	or      SAVED_TCL,A;		/* SAVED_TCL should be complete now */
-
-	mvi	ARG_2, SCB_LIST_NULL;	/* SCBID of prev SCB in disc List */
-	call	get_untagged_SCBID;
-	cmp	ARG_1, SCB_LIST_NULL	je snoop_tag;
-	if ((ahc->flags & AHC_PAGESCBS) != 0) {
-		test	SEQ_FLAGS, SCBPTR_VALID	jz use_retrieveSCB;
+	if ((ahc->features & AHC_SCB_BTT) != 0) {
+		jmp setup_SCB_id_lun_okay;
+	} else {
+		mov	A, SCB_LUN;
+		cmp	SAVED_LUN, A		je setup_SCB_id_lun_okay;
 	}
-	/*
-	 * If the SCB was found in the disconnected list (as is
-	 * always the case in non-paging scenarios), SCBPTR is already
-	 * set to the correct SCB.  So, simply setup the SCB and get
-	 * on with things.
-	 */
-	call	rem_scb_from_disc_list;
-	jmp	setup_SCB;
+
 /*
  * Here we "snoop" the bus looking for a SIMPLE QUEUE TAG message.
  * If we get one, we use the tag returned to find the proper
- * SCB.  With SCB paging, this requires using search for both tagged
- * and non-tagged transactions since the SCB may exist in any slot.
- * If we're not using SCB paging, we can use the tag as the direct
- * index to the SCB.
+ * SCB.  With SCB paging, we must search for non-tagged
+ * transactions since the SCB may exist in any slot.  If we're not
+ * using SCB paging, we can use the tag as the direct index to the
+ * SCB.
  */
 snoop_tag:
 	mov	NONE,SCSIDATL;		/* ACK Identify MSG */
@@ -1338,20 +1584,35 @@ snoop_tag_loop:
 	cmp	LASTPHASE, P_MESGIN	jne not_found;
 	cmp	SCSIBUSL,MSG_SIMPLE_Q_TAG jne not_found;
 get_tag:
-	mvi	ARG_1	call inb_next;	/* tag value */
+	if ((ahc->flags & AHC_PAGESCBS) != 0) {
+		mvi	ARG_1	call inb_next;	/* tag value */
+		mov	ARG_1	call findSCB;
+	} else {
+		mvi	SCBPTR	call inb_next;	/* tag value */
+	}
 
-	/*
-	 * Ensure that the SCB the tag points to is for
-	 * an SCB transaction to the reconnecting target.
-	 */
-use_retrieveSCB:
-	call	retrieveSCB;
+/*
+ * Ensure that the SCB the tag points to is for
+ * an SCB transaction to the reconnecting target.
+ */
 setup_SCB:
-	mov	A, SAVED_TCL;
-	cmp	SCB_TCL, A	jne not_found_cleanup_scb;
-	test	SCB_CONTROL,DISCONNECTED jz not_found_cleanup_scb;
+	mov	A, SAVED_SCSIID;
+	cmp	SCB_SCSIID, A	jne not_found;
+	mov	A, SAVED_LUN;
+	cmp	SCB_LUN, A	jne not_found;
+setup_SCB_id_lun_okay:
+	test	SCB_CONTROL,DISCONNECTED jz not_found;
+	if ((ahc->flags & AHC_PAGESCBS) != 0) {
+		mov	SCBPTR	call	rem_scb_from_disc_list;
+	}
 	and	SCB_CONTROL,~DISCONNECTED;
 	or	SEQ_FLAGS,IDENTIFY_SEEN;	/* make note of IDENTIFY */
+	test	SCB_CONTROL, TAG_ENB	jnz setup_SCB_tagged;
+	mov	A, SCBPTR;
+	mov	SAVED_SCSIID	call	index_busy_target;
+	mvi	DINDIR, SCB_LIST_NULL;
+	mov	SCBPTR, A;
+setup_SCB_tagged:
 	call	set_transfer_settings;
 	/* See if the host wants to send a message upon reconnection */
 	test	SCB_CONTROL, MK_MESSAGE jz mesgin_done;
@@ -1359,23 +1620,10 @@ setup_SCB:
 	mvi	HOST_MSG	call mk_mesg;
 	jmp	mesgin_done;
 
-not_found_cleanup_scb:
-	test	SCB_CONTROL, DISCONNECTED jz . + 3;
-	call	add_scb_to_disc_list;
-	jmp	not_found;
-	call	add_scb_to_free_list;
 not_found:
 	mvi	INTSTAT, NO_MATCH;
 	jmp	mesgin_done;
 
-/*
- * [ ADD MORE MESSAGE HANDLING HERE ]
- */
-
-/*
- * Locking the driver out, build a one-byte message passed in SINDEX
- * if there is no active message already.  SINDEX is returned intact.
- */
 mk_mesg:
 	or	SCSISIGO,ATNO,LASTPHASE;/* turn on ATNO */
 	mov	MSG_OUT,SINDEX ret;
@@ -1435,7 +1683,7 @@ change_phase:
 	/*
 	 * If the data direction has changed, from
 	 * out (initiator driving) to in (target driving),
-	 * we must waitat least a data release delay plus
+	 * we must wait at least a data release delay plus
 	 * the normal bus settle delay. [SCSI III SPI 10.11.0]
 	 */
 	cmp 	DINDEX, A je change_phase_wait;
@@ -1458,62 +1706,6 @@ target_outb:
 	and	SXFRCTL0, ~SPIOEN ret;
 }
 	
-mesgin_phasemis:
-/*
- * We expected to receive another byte, but the target changed phase
- */
-	mvi	INTSTAT, MSGIN_PHASEMIS;
-	jmp	ITloop;
-
-/*
- * DMA data transfer.  HADDR and HCNT must be loaded first, and
- * SINDEX should contain the value to load DFCNTRL with - 0x3d for
- * host->scsi, or 0x39 for scsi->host.  The SCSI channel is cleared
- * during initialization.
- */
-dma:
-	mov	DFCNTRL,SINDEX;
-dma_loop:
-	test	SSTAT0,DMADONE	jnz dma_dmadone;
-	test	SSTAT1,PHASEMIS	jz dma_loop;	/* ie. underrun */
-dma_phasemis:
-
-/*
- * We will be "done" DMAing when the transfer count goes to zero, or
- * the target changes the phase (in light of this, it makes sense that
- * the DMA circuitry doesn't ACK when PHASEMIS is active).  If we are
- * doing a SCSI->Host transfer, the data FIFO should be flushed auto-
- * magically on STCNT=0 or a phase change, so just wait for FIFO empty
- * status.
- */
-dma_checkfifo:
-	test	DFCNTRL,DIRECTION	jnz dma_fifoempty;
-dma_fifoflush:
-	test	DFSTATUS,FIFOEMP	jz dma_fifoflush;
-
-dma_fifoempty:
-	/* Don't clobber an inprogress host data transfer */
-	test	DFSTATUS, MREQPEND	jnz dma_fifoempty;
-/*
- * Now shut the DMA enables off and make sure that the DMA enables are 
- * actually off first lest we get an ILLSADDR.
- */
-dma_dmadone:
-	and	DFCNTRL, ~(SCSIEN|SDMAEN|HDMAEN);
-dma_halt:
-	/*
-	 * Some revisions of the aic7880 have a problem where, if the
-	 * data fifo is full, but the PCI input latch is not empty, 
-	 * HDMAEN cannot be cleared.  The fix used here is to attempt
-	 * to drain the data fifo until there is space for the input
-	 * latch to drain and HDMAEN de-asserts.
-	 */
-	if ((ahc->features & AHC_ULTRA2) == 0) {
-		mov	NONE, DFDAT;
-	}
-	test	DFCNTRL, (SCSIEN|SDMAEN|HDMAEN) jnz dma_halt;
-return:
-	ret;
 
 /*
  * Assert that if we've been reselected, then we've seen an IDENTIFY
@@ -1525,42 +1717,39 @@ assert:
 	mvi	INTSTAT,NO_IDENT 	ret;	/* no - tell the kernel */
 
 /*
- * Locate a disconnected SCB either by SAVED_TCL (ARG_1 is SCB_LIST_NULL)
- * or by the SCBID ARG_1.  The search begins at the SCB index passed in
- * via SINDEX which is an SCB that must be on the disconnected list.  If
- * the SCB cannot be found, SINDEX will be SCB_LIST_NULL, otherwise, SCBPTR
- * is set to the proper SCB.
+ * Locate a disconnected SCB by SCBID.  Upon return, SCBPTR and SINDEX will
+ * be set to the position of the SCB.  If the SCB cannot be found locally,
+ * it will be paged in from host memory.  RETURN_2 stores the address of the
+ * preceding SCB in the disconnected list which can be used to speed up
+ * removal of the found SCB from the disconnected list.
  */
+if ((ahc->flags & AHC_PAGESCBS) != 0) {
 findSCB:
-	mov	SCBPTR,SINDEX;			/* Initialize SCBPTR */
-	cmp	ARG_1, SCB_LIST_NULL	jne findSCB_by_SCBID;
-	mov	A, SAVED_TCL;
-	mvi	SCB_TCL	jmp findSCB_loop;	/* &SCB_TCL -> SINDEX */
-findSCB_by_SCBID:
-	mov	A, ARG_1;			/* Tag passed in ARG_1 */
-	mvi	SCB_TAG	jmp findSCB_loop;	/* &SCB_TAG -> SINDEX */
+	mov	SCBPTR, DISCONNECTED_SCBH;	/* Initialize SCBPTR */
+	mov	A, SINDEX;			/* Tag passed in SINDEX */
+	mvi	RETURN_2, SCB_LIST_NULL;	/* Head of list */
+	jmp	findSCB_loop;
 findSCB_next:
-	mov	ARG_2, SCBPTR;
-	cmp	SCB_NEXT, SCB_LIST_NULL je notFound;
+	mov	RETURN_2, SCBPTR;
+	cmp	SCB_NEXT, SCB_LIST_NULL je findSCB_notFound;
 	mov	SCBPTR,SCB_NEXT;
-	dec	SINDEX;		/* Last comparison moved us too far */
 findSCB_loop:
-	cmp	SINDIR, A	jne findSCB_next;
+	cmp	SCB_TAG, A	jne findSCB_next;
 	mov	SINDEX, SCBPTR 	ret;
-notFound:
-	mvi	SINDEX, SCB_LIST_NULL	ret;
-
-/*
- * Retrieve an SCB by SCBID first searching the disconnected list falling
- * back to DMA'ing the SCB down from the host.  This routine assumes that
- * ARG_1 is the SCBID of interrest and that SINDEX is the position in the
- * disconnected list to start the search from.  If SINDEX is SCB_LIST_NULL,
- * we go directly to the host for the SCB.
- */
-retrieveSCB:
-	test	SEQ_FLAGS, SCBPTR_VALID	jz retrieve_from_host;
-	mov	SCBPTR	call findSCB;	/* Continue the search */
-	cmp	SINDEX, SCB_LIST_NULL	je retrieve_from_host;
+findSCB_notFound:
+	/*
+	 * We didn't find it.  Page in the SCB and make it look
+	 * like it was at the head of the appropriate scb list.
+	 */
+	mov	ARG_1, A; /* Save tag */
+	mov	ALLZEROS call get_free_or_disc_scb;
+	mvi	DMAPARAMS, HDMAEN|DIRECTION|FIFORESET;
+	mov	ARG_1	call dma_scb;
+	mvi	RETURN_2, SCB_LIST_NULL;	/* Head of list */
+	/* Jump instead of call as we want to return anyway */
+	test	SCB_CONTROL, DISCONNECTED jnz add_scb_to_disc_list;
+	jmp	add_scb_to_free_list;
+}
 
 /*
  * This routine expects SINDEX to contain the index of the SCB to be
@@ -1578,44 +1767,15 @@ rem_scb_from_disc_list:
 rHead:
 	mov	DISCONNECTED_SCBH,SCB_NEXT ret;
 
-retrieve_from_host:
-/*
- * We didn't find it.  Pull an SCB and DMA down the one we want.
- * We should never get here in the non-paging case.
- */
-	mov	ALLZEROS	call	get_free_or_disc_scb;
-	mvi	DMAPARAMS, HDMAEN|DIRECTION|FIFORESET;
-	/* Jump instead of call as we want to return anyway */
-	mov	ARG_1	jmp dma_scb;
-
-/*
- * Determine whether a target is using tagged or non-tagged transactions
- * by first looking for a matching transaction based on the TCL and if
- * that fails, looking up this device in the host's untagged SCB array.
- * The TCL to search for is assumed to be in SAVED_TCL.  The value is
- * returned in ARG_1 (SCB_LIST_NULL for tagged, SCBID for non-tagged).
- * The SCBPTR_VALID bit is set in SEQ_FLAGS if we found the information
- * in an SCB instead of having to go to the host.
- */
-get_untagged_SCBID:
-	cmp	DISCONNECTED_SCBH, SCB_LIST_NULL je get_SCBID_from_host;
-	mvi	ARG_1, SCB_LIST_NULL;
-	mov	DISCONNECTED_SCBH call findSCB;
-	cmp	SINDEX, SCB_LIST_NULL	je get_SCBID_from_host;
-	or	SEQ_FLAGS, SCBPTR_VALID;/* Was in disconnected list */
-	test	SCB_CONTROL, TAG_ENB	jnz . + 2;
-	mov	ARG_1, SCB_TAG	ret;
-	mvi	ARG_1, SCB_LIST_NULL ret;
-
 /*
  * Fetch a byte from host memory given an index of (A + (256 * SINDEX))
- * and a base address of SCBID_ADDR.  The byte is returned in RETURN_2.
+ * and a base address of SHARED_DATA_ADDR.  The byte is returned in RETURN_2.
  */
 fetch_byte:
 	mov	ARG_2, SINDEX;
 	if ((ahc->features & AHC_CMD_CHAN) != 0) {
 		mvi	DINDEX, CCHADDR;
-		mvi	SCBID_ADDR call set_1byte_addr;
+		mvi	SHARED_DATA_ADDR call set_1byte_addr;
 		mvi	CCHCNT, 1;
 		mvi	CCSGCTL, CCSGEN|CCSGRESET;
 		test	CCSGCTL, CCSGDONE jz .;
@@ -1623,10 +1783,8 @@ fetch_byte:
 		bmov	RETURN_2, CCSGRAM, 1 ret;
 	} else {
 		mvi	DINDEX, HADDR;
-		mvi	SCBID_ADDR call set_1byte_addr;
-		mvi	HCNT[0], 1;
-		clr	HCNT[1];
-		clr	HCNT[2];
+		mvi	SHARED_DATA_ADDR call set_1byte_addr;
+		mvi	1	call set_hcnt;
 		mvi	DFCNTRL, HDMAEN|DIRECTION|FIFORESET;
 		call	dma_finish;
 		mov	RETURN_2, DFDAT ret;
@@ -1634,21 +1792,19 @@ fetch_byte:
 
 /*
  * Prepare the hardware to post a byte to host memory given an
- * index of (A + (256 * SINDEX)) and a base address of SCBID_ADDR.
+ * index of (A + (256 * SINDEX)) and a base address of SHARED_DATA_ADDR.
  */
 post_byte_setup:
 	mov	ARG_2, SINDEX;
 	if ((ahc->features & AHC_CMD_CHAN) != 0) {
 		mvi	DINDEX, CCHADDR;
-		mvi	SCBID_ADDR call	set_1byte_addr;
+		mvi	SHARED_DATA_ADDR call	set_1byte_addr;
 		mvi	CCHCNT, 1;
 		mvi	CCSCBCTL, CCSCBRESET ret;
 	} else {
 		mvi	DINDEX, HADDR;
-		mvi	SCBID_ADDR call	set_1byte_addr;
-		mvi	HCNT[0], 1;
-		clr	HCNT[1];
-		clr	HCNT[2];
+		mvi	SHARED_DATA_ADDR call	set_1byte_addr;
+		mvi	1	call set_hcnt;
 		mvi	DFCNTRL, FIFORESET ret;
 	}
 
@@ -1665,8 +1821,9 @@ post_byte:
 	}
 
 get_SCBID_from_host:
-	mov	A, SAVED_TCL;
-	mvi	UNTAGGEDSCB_OFFSET call fetch_byte;
+	mov	A, SAVED_LUN;
+	shr	SINDEX, 4, SAVED_SCSIID;
+	call	fetch_byte;
 	mov	RETURN_1,  RETURN_2 ret;
 
 phase_lock_perr:
@@ -1684,11 +1841,19 @@ phase_lock_latch_phase:
 	and	LASTPHASE, PHASE_MASK, SCSISIGI ret;
 
 if ((ahc->features & AHC_CMD_CHAN) == 0) {
+set_hcnt:
+	mov	HCNT[0], SINDEX;
+clear_hcnt:
+	clr	HCNT[1];
+	clr	HCNT[2] ret;
+
 set_stcnt_from_hcnt:
 	mov	STCNT[0], HCNT[0];
 	mov	STCNT[1], HCNT[1];
 	mov	STCNT[2], HCNT[2] ret;
 
+bcopy_8:
+	mov	DINDIR, SINDIR;
 bcopy_7:
 	mov	DINDIR, SINDIR;
 	mov	DINDIR, SINDIR;
@@ -1728,7 +1893,7 @@ set_64byte_addr:
 	shl	A, 6;
 
 /*
- * Setup addr assuming that A + (ARG_1 * 256) is an
+ * Setup addr assuming that A + (ARG_2 * 256) is an
  * index into an array of 1byte objects, SINDEX contains
  * the base address of that array, and DINDEX contains
  * the base address of the location to store the computed
@@ -1753,17 +1918,27 @@ dma_scb:
 		mvi	HSCB_ADDR call set_64byte_addr;
 		mov	CCSCBPTR, SCBPTR;
 		test	DMAPARAMS, DIRECTION jz dma_scb_tohost;
-		mvi	CCHCNT, SCB_64BYTE_SIZE;
+		if ((ahc->features & AHC_SCB_BTT) != 0) {
+			mvi	CCHCNT, SCB_DOWNLOAD_SIZE_64;
+		} else {
+			mvi	CCHCNT, SCB_DOWNLOAD_SIZE;
+		}
 		mvi	CCSCBCTL, CCARREN|CCSCBEN|CCSCBDIR|CCSCBRESET;
 		cmp	CCSCBCTL, CCSCBDONE|ARRDONE|CCARREN|CCSCBEN|CCSCBDIR jne .;
 		jmp	dma_scb_finish;
 dma_scb_tohost:
-		mvi	CCHCNT, SCB_32BYTE_SIZE;
-		if ((ahc->chip & AHC_CHIPID_MASK) == AHC_AIC7895) {
+		mvi	CCHCNT, SCB_UPLOAD_SIZE;
+		if ((ahc->features & AHC_ULTRA2) == 0) {
 			mvi	CCSCBCTL, CCSCBRESET;
-			bmov	CCSCBRAM, SCB_CONTROL, SCB_32BYTE_SIZE;
+			bmov	CCSCBRAM, SCB_BASE, SCB_UPLOAD_SIZE;
 			or	CCSCBCTL, CCSCBEN|CCSCBRESET;
 			test	CCSCBCTL, CCSCBDONE jz .;
+		} else if ((ahc->bugs & AHC_SCBCHAN_UPLOAD_BUG) != 0) {
+			mvi	CCSCBCTL, CCARREN|CCSCBRESET;
+			cmp	CCSCBCTL, ARRDONE|CCARREN jne .;
+			mvi	CCHCNT, SCB_UPLOAD_SIZE;
+			mvi	CCSCBCTL, CCSCBEN|CCSCBRESET;
+			cmp	CCSCBCTL, CCSCBDONE|CCSCBEN jne .;
 		} else {
 			mvi	CCSCBCTL, CCARREN|CCSCBEN|CCSCBRESET;
 			cmp	CCSCBCTL, CCSCBDONE|ARRDONE|CCARREN|CCSCBEN jne .;
@@ -1775,45 +1950,99 @@ dma_scb_finish:
 	} else {
 		mvi	DINDEX, HADDR;
 		mvi	HSCB_ADDR call set_64byte_addr;
-		mvi	HCNT[0], SCB_32BYTE_SIZE;
-		clr	HCNT[1];
-		clr	HCNT[2];
+		mvi	SCB_DOWNLOAD_SIZE call set_hcnt;
 		mov	DFCNTRL, DMAPARAMS;
 		test	DMAPARAMS, DIRECTION	jnz dma_scb_fromhost;
 		/* Fill it with the SCB data */
 copy_scb_tofifo:
-		mvi	SINDEX, SCB_CONTROL;
-		add	A, SCB_32BYTE_SIZE, SINDEX;
+		mvi	SINDEX, SCB_BASE;
+		add	A, SCB_DOWNLOAD_SIZE, SINDEX;
 copy_scb_tofifo_loop:
-		mov	DFDAT,SINDIR;
-		mov	DFDAT,SINDIR;
-		mov	DFDAT,SINDIR;
-		mov	DFDAT,SINDIR;
-		mov	DFDAT,SINDIR;
-		mov	DFDAT,SINDIR;
-		mov	DFDAT,SINDIR;
+		call	copy_to_fifo_8;
 		cmp	SINDEX, A jne copy_scb_tofifo_loop;
 		or	DFCNTRL, HDMAEN|FIFOFLUSH;
+		jmp	dma_finish;
 dma_scb_fromhost:
-		call	dma_finish;
-		/* If we were putting the SCB, we are done */
-		test	DMAPARAMS, DIRECTION	jz	return;
-		mvi	SCB_CONTROL  call dfdat_in_7;
-		call	dfdat_in_7_continued;
-		call	dfdat_in_7_continued;
-		jmp	dfdat_in_7_continued;
+		mvi	DINDEX, SCB_BASE;
+		if ((ahc->bugs & AHC_PCI_2_1_RETRY_BUG) != 0) {
+			/*
+			 * The PCI module will only issue a PCI
+			 * retry if the data FIFO is empty.  If the
+			 * host disconnects in the middle of a
+			 * transfer, we must empty the fifo of all
+			 * available data to force the chip to
+			 * continue the transfer.  This does not
+			 * happen for SCSI transfers as the SCSI module
+			 * will drain the FIFO as data is made available.
+			 * When the hang occurs, we know that at least
+			 * 8 bytes are in the FIFO because the PCI
+			 * module has an 8 byte input latch that only
+			 * dumps to the FIFO when HCNT == 0 or the
+			 * latch is full.
+			 */
+			mvi	A, -24;
+			/* Wait for some data to arrive. */
+dma_scb_hang_fifo:
+			test	DFSTATUS, FIFOEMP jnz dma_scb_hang_fifo;
+dma_scb_hang_wait:
+			test	DFSTATUS, MREQPEND jnz dma_scb_hang_wait;
+			test	DFSTATUS, HDONE	jnz dma_scb_hang_dma_done;
+			test	DFSTATUS, HDONE	jnz dma_scb_hang_dma_done;
+			test	DFSTATUS, HDONE	jnz dma_scb_hang_dma_done;
+			/*
+			 * The PCI no longer intends to perform a PCI
+			 * transaction and HDONE has not come true.
+			 * We are hung.  Drain the fifo.
+			 */
+dma_scb_hang_empty_fifo:
+			call	dfdat_in_8;
+			add	A, 8;
+			add	SINDEX, A, HCNT; 
+			/*
+			 * The result will be <= 0 (carry set) if at
+			 * least 8 bytes of data have been placed
+			 * into the fifo.
+			 */
+			jc	dma_scb_hang_empty_fifo;
+			jmp	dma_scb_hang_fifo;
+dma_scb_hang_dma_done:
+			and	DFCNTRL, ~HDMAEN;
+			test	DFCNTRL, HDMAEN jnz .;
+			call	dfdat_in_8;
+			add	A, 8;
+			cmp	A, 8 jne . - 2;
+		} else {
+			call	dma_finish;
+			/* If we were putting the SCB, we are done */
+			call	dfdat_in_8;
+			call	dfdat_in_8;
+			call	dfdat_in_8;
+		}
+dfdat_in_8:
+		mov	DINDIR,DFDAT;
 dfdat_in_7:
-		mov     DINDEX,SINDEX;
-dfdat_in_7_continued:
 		mov	DINDIR,DFDAT;
 		mov	DINDIR,DFDAT;
 		mov	DINDIR,DFDAT;
 		mov	DINDIR,DFDAT;
 		mov	DINDIR,DFDAT;
+dfdat_in_2:
 		mov	DINDIR,DFDAT;
 		mov	DINDIR,DFDAT ret;
 	}
 
+copy_to_fifo_8:
+	mov	DFDAT,SINDIR;
+	mov	DFDAT,SINDIR;
+copy_to_fifo_6:
+	mov	DFDAT,SINDIR;
+copy_to_fifo_5:
+	mov	DFDAT,SINDIR;
+copy_to_fifo_4:
+	mov	DFDAT,SINDIR;
+	mov	DFDAT,SINDIR;
+	mov	DFDAT,SINDIR;
+	mov	DFDAT,SINDIR ret;
 
 /*
  * Wait for DMA from host memory to data FIFO to complete, then disable
@@ -1851,7 +2080,6 @@ unlink_disc_scb:
 dequeue_free_scb:
 	mov	SCBPTR, FREE_SCBH;
 	mov	FREE_SCBH, SCB_NEXT ret;
-}
 
 add_scb_to_disc_list:
 /*
@@ -1861,3 +2089,6 @@ add_scb_to_disc_list:
  */
 	mov	SCB_NEXT, DISCONNECTED_SCBH;
 	mov	DISCONNECTED_SCBH, SCBPTR ret;
+}
+return:
+	ret;
diff --git a/sys/dev/aic7xxx/aicasm.c b/sys/dev/aic7xxx/aicasm.c
deleted file mode 100644
index 9af5c8343274..000000000000
--- a/sys/dev/aic7xxx/aicasm.c
+++ /dev/null
@@ -1,720 +0,0 @@
-/*
- * Aic7xxx SCSI host adapter firmware asssembler
- *
- * Copyright (c) 1997, 1998 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-#include <sys/types.h>
-#include <sys/mman.h>
-
-#include <ctype.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sysexits.h>
-#include <unistd.h>
-
-#include "aicasm.h"
-#include "aicasm_symbol.h"
-#include "sequencer.h"
-
-typedef struct patch {
-	STAILQ_ENTRY(patch) links;
-	int		patch_func;
-	u_int		begin;
-	u_int		skip_instr;
-	u_int		skip_patch;
-} patch_t;
-
-STAILQ_HEAD(patch_list, patch) patches;
-
-static void usage(void);
-static void back_patch(void);
-static void output_code(FILE *ofile);
-static void output_listing(FILE *listfile, char *ifilename);
-static void dump_scope(scope_t *scope);
-static void emit_patch(scope_t *scope, int patch);
-static int check_patch(patch_t **start_patch, int start_instr,
-		       int *skip_addr, int *func_vals);
-
-struct path_list search_path;
-int includes_search_curdir;
-char *appname;
-FILE *ofile;
-char *ofilename;
-char *regfilename;
-FILE *regfile;
-char *listfilename;
-FILE *listfile;
-
-static STAILQ_HEAD(,instruction) seq_program;
-struct scope_list scope_stack;
-symlist_t patch_functions;
-
-#if DEBUG
-extern int yy_flex_debug;
-extern int yydebug;
-#endif
-extern FILE *yyin;
-extern int yyparse __P((void));
-
-int
-main(argc, argv)
-	int argc;
-	char *argv[];
-{
-	extern char *optarg;
-	extern int optind;
-	int  ch;
-	int  retval;
-	char *inputfilename;
-	scope_t *sentinal;
-
-	STAILQ_INIT(&patches);
-	SLIST_INIT(&search_path);
-	STAILQ_INIT(&seq_program);
-	SLIST_INIT(&scope_stack);
-
-	/* Set Sentinal scope node */
-	sentinal = scope_alloc();
-	sentinal->type = SCOPE_ROOT;
-	
-	includes_search_curdir = 1;
-	appname = *argv;
-	regfile = NULL;
-	listfile = NULL;
-#if DEBUG
-	yy_flex_debug = 0;
-	yydebug = 0;
-#endif
-	while ((ch = getopt(argc, argv, "d:l:n:o:r:I:O:")) != -1) {
-		switch(ch) {
-		case 'd':
-#if DEBUG
-			if (strcmp(optarg, "s") == 0) {
-				yy_flex_debug = 1;
-			} else if (strcmp(optarg, "p") == 0) {
-				yydebug = 1;
-			} else {
-				fprintf(stderr, "%s: -d Requires either an "
-					"'s' or 'p' argument\n", appname);
-				usage();
-			}
-#else
-			stop("-d: Assembler not built with debugging "
-			     "information", EX_SOFTWARE);
-#endif
-			break;
-		case 'l':
-			/* Create a program listing */
-			if ((listfile = fopen(optarg, "w")) == NULL) {
-				perror(optarg);
-				stop(NULL, EX_CANTCREAT);
-			}
-			listfilename = optarg;
-			break;
-		case 'n':
-			/* Don't complain about the -nostdinc directrive */
-			if (strcmp(optarg, "ostdinc")) {
-				fprintf(stderr, "%s: Unknown option -%c%s\n",
-					appname, ch, optarg);
-				usage();
-				/* NOTREACHED */
-			}
-			break;
-		case 'o':
-			if ((ofile = fopen(optarg, "w")) == NULL) {
-				perror(optarg);
-				stop(NULL, EX_CANTCREAT);
-			}
-			ofilename = optarg;
-			break;
-		case 'r':
-			if ((regfile = fopen(optarg, "w")) == NULL) {
-				perror(optarg);
-				stop(NULL, EX_CANTCREAT);
-			}
-			regfilename = optarg;
-			break;
-		case 'I':
-		{
-			path_entry_t include_dir;
-
-			if (strcmp(optarg, "-") == 0) {
-				if (includes_search_curdir == 0) {
-					fprintf(stderr, "%s: Warning - '-I-' "
-							"specified multiple "
-							"times\n", appname);
-				}
-				includes_search_curdir = 0;
-				for (include_dir = search_path.slh_first;
-				     include_dir != NULL;
-				     include_dir = include_dir->links.sle_next)
-					/*
-					 * All entries before a '-I-' only
-					 * apply to includes specified with
-					 * quotes instead of "<>".
-					 */
-					include_dir->quoted_includes_only = 1;
-			} else {
-				include_dir =
-				    (path_entry_t)malloc(sizeof(*include_dir));
-				if (include_dir == NULL) {
-					perror(optarg);
-					stop(NULL, EX_OSERR);
-				}
-				include_dir->directory = strdup(optarg);
-				if (include_dir->directory == NULL) {
-					perror(optarg);
-					stop(NULL, EX_OSERR);
-				}
-				include_dir->quoted_includes_only = 0;
-				SLIST_INSERT_HEAD(&search_path, include_dir,
-						  links);
-			}
-			break;
-		}
-		case '?':
-		default:
-			usage();
-			/* NOTREACHED */
-		}
-	}
-	argc -= optind;
-	argv += optind;
-
-	if (argc != 1) {
-		fprintf(stderr, "%s: No input file specifiled\n", appname);
-		usage();
-		/* NOTREACHED */
-	}
-
-	symtable_open();
-	inputfilename = *argv;
-	include_file(*argv, SOURCE_FILE);
-	retval = yyparse();
-	if (retval == 0) {
-		if (SLIST_FIRST(&scope_stack) == NULL
-		 || SLIST_FIRST(&scope_stack)->type != SCOPE_ROOT) {
-			stop("Unterminated conditional expression",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-
-		/* Process outmost scope */
-		process_scope(SLIST_FIRST(&scope_stack));
-		/*
-		 * Decend the tree of scopes and insert/emit
-		 * patches as appropriate.  We perform a depth first
-		 * tranversal, recursively handling each scope.
-		 */
-		/* start at the root scope */
-		dump_scope(SLIST_FIRST(&scope_stack));
-
-		/* Patch up forward jump addresses */
-		back_patch();
-
-		if (ofile != NULL)
-			output_code(ofile);
-		if (regfile != NULL) {
-			symtable_dump(regfile);
-		}
-		if (listfile != NULL)
-			output_listing(listfile, inputfilename);
-	}
-
-	stop(NULL, 0);
-	/* NOTREACHED */
-	return (0);
-}
-
-static void
-usage()
-{
-
-	(void)fprintf(stderr,
-"usage: %-16s [-nostdinc] [-I-] [-I directory] [-o output_file]
-			[-r register_output_file] [-l program_list_file]
-			input_file\n",
-			appname);
-	exit(EX_USAGE);
-}
-
-static void
-back_patch()
-{
-	struct instruction *cur_instr;
-
-	for(cur_instr = seq_program.stqh_first;
-	    cur_instr != NULL;
-	    cur_instr = cur_instr->links.stqe_next) {
-		if (cur_instr->patch_label != NULL) {
-			struct ins_format3 *f3_instr;
-			u_int address;
-
-			if (cur_instr->patch_label->type != LABEL) {
-				char buf[255];
-
-				snprintf(buf, sizeof(buf),
-					 "Undefined label %s",
-					 cur_instr->patch_label->name);
-				stop(buf, EX_DATAERR);
-				/* NOTREACHED */
-			}
-			f3_instr = &cur_instr->format.format3;
-			address = f3_instr->address;
-			address += cur_instr->patch_label->info.linfo->address;
-			f3_instr->address = address;
-		}
-	}
-}
-
-static void
-output_code(ofile)
-	FILE *ofile;
-{
-	struct instruction *cur_instr;
-	patch_t *cur_patch;
-	symbol_node_t *cur_node;
-	int instrcount;
-
-	instrcount = 0;
-	fprintf(ofile,
-"/*
-  * DO NOT EDIT - This file is automatically generated.
-  */\n");
-
-	fprintf(ofile, "static u_int8_t seqprog[] = {\n");
-	for(cur_instr = seq_program.stqh_first;
-	    cur_instr != NULL;
-	    cur_instr = cur_instr->links.stqe_next) {
-
-		fprintf(ofile, "\t0x%02x, 0x%02x, 0x%02x, 0x%02x,\n",
-			cur_instr->format.bytes[0],
-			cur_instr->format.bytes[1],
-			cur_instr->format.bytes[2],
-			cur_instr->format.bytes[3]);
-		instrcount++;
-	}
-	fprintf(ofile, "};\n\n");
-
-	/*
-	 *  Output patch information.  Patch functions first.
-	 */
-	for(cur_node = SLIST_FIRST(&patch_functions);
-	    cur_node != NULL;
-	    cur_node = SLIST_NEXT(cur_node,links)) {
-		fprintf(ofile,
-"static int ahc_patch%d_func(struct ahc_softc *ahc);
-
-static int
-ahc_patch%d_func(struct ahc_softc *ahc)
-{
-	return (%s);
-}\n\n",
-			cur_node->symbol->info.condinfo->func_num,
-			cur_node->symbol->info.condinfo->func_num,
-			cur_node->symbol->name);
-	}
-
-	fprintf(ofile,
-"typedef int patch_func_t __P((struct ahc_softc *));
-struct patch {
-	patch_func_t	*patch_func;
-	u_int32_t	begin	   :10,
-			skip_instr :10,
-			skip_patch :12;
-} patches[] = {\n");
-
-	for(cur_patch = STAILQ_FIRST(&patches);
-	    cur_patch != NULL;
-	    cur_patch = STAILQ_NEXT(cur_patch,links)) {
-		fprintf(ofile, "\t{ ahc_patch%d_func, %d, %d, %d },\n",
-			cur_patch->patch_func, cur_patch->begin,
-			cur_patch->skip_instr, cur_patch->skip_patch);
-	}
-
-	fprintf(ofile, "\n};\n");
-
-	fprintf(stderr, "%s: %d instructions used\n", appname, instrcount);
-}
-
-static void
-dump_scope(scope_t *scope)
-{
-	scope_t *cur_scope;
-
-	/*
-	 * Emit the first patch for this scope
-	 */
-	emit_patch(scope, 0);
-
-	/*
-	 * Dump each scope within this one.
-	 */
-	cur_scope = TAILQ_FIRST(&scope->inner_scope);
-
-	while (cur_scope != NULL) {
-
-		dump_scope(cur_scope);
-
-		cur_scope = TAILQ_NEXT(cur_scope, scope_links);
-	}
-
-	/*
-	 * Emit the second, closing, patch for this scope
-	 */
-	emit_patch(scope, 1);
-}
-
-void
-emit_patch(scope_t *scope, int patch)
-{
-	patch_info_t *pinfo;
-	patch_t *new_patch;
-
-	pinfo = &scope->patches[patch];
-
-	if (pinfo->skip_instr == 0)
-		/* No-Op patch */
-		return;
-
-	new_patch = (patch_t *)malloc(sizeof(*new_patch));
-
-	if (new_patch == NULL)
-		stop("Could not malloc patch structure", EX_OSERR);
-
-	memset(new_patch, 0, sizeof(*new_patch));
-
-	if (patch == 0) {
-		new_patch->patch_func = scope->func_num;
-		new_patch->begin = scope->begin_addr;
-	} else {
-		new_patch->patch_func = 0;
-		new_patch->begin = scope->end_addr;
-	}
-	new_patch->skip_instr = pinfo->skip_instr;
-	new_patch->skip_patch = pinfo->skip_patch;
-	STAILQ_INSERT_TAIL(&patches, new_patch, links);
-}
-
-void
-output_listing(FILE *listfile, char *ifilename)
-{
-	char buf[1024];
-	FILE *ifile;
-	struct instruction *cur_instr;
-	patch_t *cur_patch;
-	symbol_node_t *cur_func;
-	int *func_values;
-	int instrcount;
-	int instrptr;
-	int line;
-	int func_count;
-	int skip_addr;
-
-	instrcount = 0;
-	instrptr = 0;
-	line = 1;
-	skip_addr = 0;
-	if ((ifile = fopen(ifilename, "r")) == NULL) {
-		perror(ifilename);
-		stop(NULL, EX_DATAERR);
-	}
-
-	/*
-	 * Determine which options to apply to this listing.
-	 */
-	for (func_count = 0, cur_func = SLIST_FIRST(&patch_functions);
-	    cur_func != NULL;
-	    cur_func = SLIST_NEXT(cur_func, links))
-		func_count++;
-
-	if (func_count != 0) {
-		func_values = (int *)malloc(func_count * sizeof(int));
-
-		if (func_values == NULL)
-			stop("Could not malloc", EX_OSERR);
-		
-		func_values[0] = 0; /* FALSE func */
-		func_count--;
-
-		/*
-		 * Ask the user to fill in the return values for
-		 * the rest of the functions.
-		 */
-		
-		
-		for (cur_func = SLIST_FIRST(&patch_functions);
-		     cur_func != NULL && SLIST_NEXT(cur_func, links) != NULL;
-		     cur_func = SLIST_NEXT(cur_func, links), func_count--) {
-			int input;
-			
-			fprintf(stdout, "\n(%s)\n", cur_func->symbol->name);
-			fprintf(stdout,
-				"Enter the return value for "
-				"this expression[T/F]:");
-
-			while (1) {
-
-				input = getchar();
-				input = toupper(input);
-
-				if (input == 'T') {
-					func_values[func_count] = 1;
-					break;
-				} else if (input == 'F') {
-					func_values[func_count] = 0;
-					break;
-				}
-			}
-			if (isatty(fileno(stdin)) == 0)
-				putchar(input);
-		}
-		fprintf(stdout, "\nThanks!\n");
-	}
-
-	/* Now output the listing */
-	cur_patch = STAILQ_FIRST(&patches);
-	for(cur_instr = STAILQ_FIRST(&seq_program);
-	    cur_instr != NULL;
-	    cur_instr = STAILQ_NEXT(cur_instr, links), instrcount++) {
-
-		if (check_patch(&cur_patch, instrcount,
-				&skip_addr, func_values) == 0) {
-			/* Don't count this instruction as it is in a patch
-			 * that was removed.
-			 */
-                        continue;
-		}
-
-		while (line < cur_instr->srcline) {
-			fgets(buf, sizeof(buf), ifile);
-				fprintf(listfile, "\t\t%s", buf);
-				line++;
-		}
-		fprintf(listfile, "%03x %02x%02x%02x%02x", instrptr,
-			cur_instr->format.bytes[0],
-			cur_instr->format.bytes[1],
-			cur_instr->format.bytes[2],
-			cur_instr->format.bytes[3]);
-		fgets(buf, sizeof(buf), ifile);
-		fprintf(listfile, "\t%s", buf);
-		line++;
-		instrptr++;
-	}
-	/* Dump the remainder of the file */
-	while(fgets(buf, sizeof(buf), ifile) != NULL)
-		fprintf(listfile, "\t\t%s", buf);
-
-	fclose(ifile);
-}
-
-static int
-check_patch(patch_t **start_patch, int start_instr,
-	    int *skip_addr, int *func_vals)
-{
-	patch_t *cur_patch;
-
-	cur_patch = *start_patch;
-
-	while (cur_patch != NULL && start_instr == cur_patch->begin) {
-		if (func_vals[cur_patch->patch_func] == 0) {
-			int skip;
-
-			/* Start rejecting code */
-			*skip_addr = start_instr + cur_patch->skip_instr;
-			for (skip = cur_patch->skip_patch;
-			     skip > 0 && cur_patch != NULL;
-			     skip--)
-				cur_patch = STAILQ_NEXT(cur_patch, links);
-		} else {
-			/* Accepted this patch.  Advance to the next
-			 * one and wait for our intruction pointer to
-			 * hit this point.
-			 */
-			cur_patch = STAILQ_NEXT(cur_patch, links);
-		}
-	}
-
-	*start_patch = cur_patch;
-	if (start_instr < *skip_addr)
-		/* Still skipping */
-		return (0);
-
-	return (1);
-}
-
-/*
- * Print out error information if appropriate, and clean up before
- * terminating the program.
- */
-void
-stop(string, err_code)
-	const char *string;
-	int  err_code;
-{
-	if (string != NULL) {
-		fprintf(stderr, "%s: ", appname);
-		if (yyfilename != NULL) {
-			fprintf(stderr, "Stopped at file %s, line %d - ",
-				yyfilename, yylineno);
-		}
-		fprintf(stderr, "%s\n", string);
-	}
-
-	if (ofile != NULL) {
-		fclose(ofile);
-		if (err_code != 0) {
-			fprintf(stderr, "%s: Removing %s due to error\n",
-				appname, ofilename);
-			unlink(ofilename);
-		}
-	}
-
-	if (regfile != NULL) {
-		fclose(regfile);
-		if (err_code != 0) {
-			fprintf(stderr, "%s: Removing %s due to error\n",
-				appname, regfilename);
-			unlink(regfilename);
-		}
-	}
-
-	if (listfile != NULL) {
-		fclose(listfile);
-		if (err_code != 0) {
-			fprintf(stderr, "%s: Removing %s due to error\n",
-				appname, listfilename);
-			unlink(listfilename);
-		}
-	}
-
-	symlist_free(&patch_functions);
-	symtable_close();
-
-	exit(err_code);
-}
-
-struct instruction *
-seq_alloc()
-{
-	struct instruction *new_instr;
-
-	new_instr = (struct instruction *)malloc(sizeof(struct instruction));
-	if (new_instr == NULL)
-		stop("Unable to malloc instruction object", EX_SOFTWARE);
-	memset(new_instr, 0, sizeof(*new_instr));
-	STAILQ_INSERT_TAIL(&seq_program, new_instr, links);
-	new_instr->srcline = yylineno;
-	return new_instr;
-}
-
-scope_t *
-scope_alloc()
-{
-	scope_t *new_scope;
-
-	new_scope = (scope_t *)malloc(sizeof(scope_t));
-	if (new_scope == NULL)
-		stop("Unable to malloc scope object", EX_SOFTWARE);
-	memset(new_scope, 0, sizeof(*new_scope));
-	TAILQ_INIT(&new_scope->inner_scope);
-	
-	if (SLIST_FIRST(&scope_stack) != NULL) {
-		TAILQ_INSERT_TAIL(&SLIST_FIRST(&scope_stack)->inner_scope,
-				  new_scope, scope_links);
-	}
-	/* This patch is now the current scope */
-	SLIST_INSERT_HEAD(&scope_stack, new_scope, scope_stack_links);
-	return new_scope;
-}
-
-void
-process_scope(scope_t *scope)
-{
-	/*
-	 * We are "leaving" this scope.  We should now have
-	 * enough information to process the lists of scopes
-	 * we encapsulate.
-	 */
-	scope_t *cur_scope;
-	u_int skip_patch_count;
-	u_int skip_instr_count;
-
-	cur_scope = TAILQ_LAST(&scope->inner_scope, scope_tailq);
-	skip_patch_count = 0;
-	skip_instr_count = 0;
-	while (cur_scope != NULL) {
-		u_int patch0_patch_skip;
-
-		patch0_patch_skip = 0;
-		switch (cur_scope->type) {
-		case SCOPE_IF:
-		case SCOPE_ELSE_IF:
-			if (skip_instr_count != 0) {
-				/* Create a tail patch */
-				patch0_patch_skip++;
-				cur_scope->patches[1].skip_patch =
-				    skip_patch_count + 1;
-				cur_scope->patches[1].skip_instr =
-				    skip_instr_count;
-			}
-
-			/* Count Head patch */
-			patch0_patch_skip++;
-
-			/* Count any patches contained in our inner scope */
-			patch0_patch_skip += cur_scope->inner_scope_patches;
-
-			cur_scope->patches[0].skip_patch = patch0_patch_skip;
-			cur_scope->patches[0].skip_instr =
-			    cur_scope->end_addr - cur_scope->begin_addr;
-
-			skip_instr_count += cur_scope->patches[0].skip_instr;
-
-			skip_patch_count += patch0_patch_skip;
-			if (cur_scope->type == SCOPE_IF) {
-				scope->inner_scope_patches += skip_patch_count;
-				skip_patch_count = 0;
-			        skip_instr_count = 0;
-			}
-			break;
-		case SCOPE_ELSE:
-			/* Count any patches contained in our innter scope */
-			skip_patch_count += cur_scope->inner_scope_patches;
-
-			skip_instr_count += cur_scope->end_addr
-					  - cur_scope->begin_addr;
-			break;
-		case SCOPE_ROOT:
-			stop("Unexpected scope type encountered", EX_SOFTWARE);
-			/* NOTREACHED */
-		}
-
-		cur_scope = TAILQ_PREV(cur_scope, scope_tailq, scope_links);
-	}
-}
diff --git a/sys/dev/aic7xxx/aicasm.h b/sys/dev/aic7xxx/aicasm.h
deleted file mode 100644
index 7e6b4683dfdb..000000000000
--- a/sys/dev/aic7xxx/aicasm.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Assembler for the sequencer program downloaded to Aic7xxx SCSI host adapters
- *
- * Copyright (c) 1997 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/queue.h>
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-typedef struct path_entry {
-	char	*directory;
-	int	quoted_includes_only;
-	SLIST_ENTRY(path_entry) links;
-} *path_entry_t;
-
-typedef enum {  
-	QUOTED_INCLUDE,
-	BRACKETED_INCLUDE,
-	SOURCE_FILE
-} include_type;
-
-SLIST_HEAD(path_list, path_entry);
-
-extern struct path_list search_path;
-extern struct scope_list scope_stack;
-extern struct symlist patch_functions;
-extern int includes_search_curdir;		/* False if we've seen -I- */
-extern char *appname;
-extern int yylineno;
-extern char *yyfilename;
-
-void stop(const char *errstring, int err_code);
-void include_file(char *file_name, include_type type);
-struct instruction *seq_alloc(void);
-struct scope *scope_alloc(void);
-void process_scope(struct scope *);
diff --git a/sys/dev/aic7xxx/aicasm_gram.y b/sys/dev/aic7xxx/aicasm_gram.y
deleted file mode 100644
index 4d090598e4fa..000000000000
--- a/sys/dev/aic7xxx/aicasm_gram.y
+++ /dev/null
@@ -1,1410 +0,0 @@
-%{
-/*
- * Parser for the Aic7xxx SCSI Host adapter sequencer assembler.
- *
- * Copyright (c) 1997-1998 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sysexits.h>
-
-#include <sys/types.h>
-#include <sys/queue.h>
-
-#include "aicasm.h"
-#include "aicasm_symbol.h"
-#include "sequencer.h"
-
-int yylineno;
-char *yyfilename;
-static symbol_t *cur_symbol;
-static symtype cur_symtype;
-static symbol_t *accumulator;
-static symbol_ref_t allones;
-static symbol_ref_t allzeros;
-static symbol_ref_t none;
-static symbol_ref_t sindex;
-static int instruction_ptr;
-static int sram_or_scb_offset;
-static int download_constant_count;
-
-static void process_bitmask __P((int mask_type, symbol_t *sym, int mask));
-static void initialize_symbol __P((symbol_t *symbol));
-static void process_register __P((symbol_t **p_symbol));
-static void format_1_instr __P((int opcode, symbol_ref_t *dest,
-				expression_t *immed, symbol_ref_t *src,
-				int ret));
-static void format_2_instr __P((int opcode, symbol_ref_t *dest,
-				expression_t *places, symbol_ref_t *src,
-				int ret));
-static void format_3_instr __P((int opcode, symbol_ref_t *src,
-				expression_t *immed, symbol_ref_t *address));
-static void test_readable_symbol __P((symbol_t *symbol));
-static void test_writable_symbol __P((symbol_t *symbol));
-static void type_check __P((symbol_t *symbol, expression_t *expression,
-			    int and_op));
-static void make_expression __P((expression_t *immed, int value));
-static void add_conditional __P((symbol_t *symbol));
-static int  is_download_const __P((expression_t *immed));
-
-#define YYDEBUG 1
-#define SRAM_SYMNAME "SRAM_BASE"
-#define SCB_SYMNAME "SCB_BASE"
-%}
-
-%union {
-	int		value;
-	char		*str;
-	symbol_t	*sym;
-	symbol_ref_t	sym_ref;
-	expression_t	expression;
-}
-
-%token T_REGISTER
-
-%token <value> T_CONST
-
-%token T_DOWNLOAD
-
-%token T_SCB
-
-%token T_SRAM
-
-%token T_ALIAS
-
-%token T_SIZE
-
-%token <value> T_ADDRESS
-
-%token T_ACCESS_MODE
-
-%token <value> T_MODE
-
-%token T_BIT
-
-%token T_MASK
-
-%token <value> T_NUMBER
-
-%token <str> T_PATH
-
-%token <sym> T_CEXPR
-
-%token T_EOF T_INCLUDE 
-
-%token <value> T_SHR T_SHL T_ROR T_ROL
-
-%token <value> T_MVI T_MOV T_CLR T_BMOV
-
-%token <value> T_JMP T_JC T_JNC T_JE T_JNE T_JNZ T_JZ T_CALL
-
-%token <value> T_ADD T_ADC
-
-%token <value> T_INC T_DEC
-
-%token <value> T_STC T_CLC
-
-%token <value> T_CMP T_XOR
-
-%token <value> T_TEST T_AND
-
-%token <value> T_OR
-
-%token T_RET
-
-%token T_NOP
-
-%token T_ACCUM T_ALLONES T_ALLZEROS T_NONE T_SINDEX
-
-%token T_A
-
-%token <sym> T_SYMBOL
-
-%token T_NL
-
-%token T_IF T_ELSE T_ELSE_IF T_ENDIF
-
-%type <sym_ref> reg_symbol address destination source opt_source
-
-%type <expression> expression immediate immediate_or_a
-
-%type <value> ret f1_opcode f2_opcode jmp_jc_jnc_call jz_jnz je_jne
-
-%type <value> numerical_value
-
-%left '|'
-%left '&'
-%left '+' '-'
-%right '~'
-%nonassoc UMINUS
-%%
-
-program:
-	include
-|	program include
-|	register
-|	program register
-|	constant
-|	program constant
-|	scratch_ram
-|	program scratch_ram
-|	scb
-|	program scb
-|	label
-|	program label
-|	conditional
-|	program conditional
-|	code
-|	program code
-;
-
-include:
-	T_INCLUDE '<' T_PATH '>'
-	{ include_file($3, BRACKETED_INCLUDE); }
-|	T_INCLUDE '"' T_PATH '"'
-	{ include_file($3, QUOTED_INCLUDE); }
-;
-
-register:
-	T_REGISTER { cur_symtype = REGISTER; } reg_definition
-;
-
-reg_definition:
-	T_SYMBOL '{'
-		{
-			if ($1->type != UNINITIALIZED) {
-				stop("Register multiply defined", EX_DATAERR);
-				/* NOTREACHED */
-			}
-			cur_symbol = $1; 
-			cur_symbol->type = cur_symtype;
-			initialize_symbol(cur_symbol);
-		}
-		reg_attribute_list
-	'}'
-		{                    
-			/*
-			 * Default to allowing everything in for registers
-			 * with no bit or mask definitions.
-			 */
-			if (cur_symbol->info.rinfo->valid_bitmask == 0)
-				cur_symbol->info.rinfo->valid_bitmask = 0xFF;
-
-			if (cur_symbol->info.rinfo->size == 0)
-				cur_symbol->info.rinfo->size = 1;
-
-			/*
-			 * This might be useful for registers too.
-			 */
-			if (cur_symbol->type != REGISTER) {
-				if (cur_symbol->info.rinfo->address == 0)
-					cur_symbol->info.rinfo->address =
-					    sram_or_scb_offset;
-				sram_or_scb_offset +=
-				    cur_symbol->info.rinfo->size;
-			}
-			cur_symbol = NULL;
-		}
-;
-
-reg_attribute_list:
-	reg_attribute
-|	reg_attribute_list reg_attribute
-;
-
-reg_attribute:		
-	reg_address
-|	size
-|	access_mode
-|	bit_defn
-|	mask_defn
-|	alias
-|	accumulator
-|	allones
-|	allzeros
-|	none
-|	sindex
-;
-
-reg_address:
-	T_ADDRESS T_NUMBER
-	{
-		cur_symbol->info.rinfo->address = $2;
-	}
-;
-
-size:
-	T_SIZE T_NUMBER
-	{
-		cur_symbol->info.rinfo->size = $2;
-	}
-;
-
-access_mode:
-	T_ACCESS_MODE T_MODE
-	{
-		cur_symbol->info.rinfo->mode = $2;
-	}
-;
-
-bit_defn:
-	T_BIT T_SYMBOL T_NUMBER
-	{
-		process_bitmask(BIT, $2, $3);
-	}
-;
-
-mask_defn:
-	T_MASK T_SYMBOL expression
-	{
-		process_bitmask(MASK, $2, $3.value);
-	}
-;
-
-alias:
-	T_ALIAS	T_SYMBOL
-	{
-		if ($2->type != UNINITIALIZED) {
-			stop("Re-definition of register alias",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-		$2->type = ALIAS;
-		initialize_symbol($2);
-		$2->info.ainfo->parent = cur_symbol;
-	}
-;
-
-accumulator:
-	T_ACCUM
-	{
-		if (accumulator != NULL) {
-			stop("Only one accumulator definition allowed",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-		accumulator = cur_symbol;
-	}
-;
-
-allones:
-	T_ALLONES
-	{
-		if (allones.symbol != NULL) {
-			stop("Only one definition of allones allowed",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-		allones.symbol = cur_symbol;
-	}
-;
-
-allzeros:
-	T_ALLZEROS
-	{
-		if (allzeros.symbol != NULL) {
-			stop("Only one definition of allzeros allowed",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-		allzeros.symbol = cur_symbol;
-	}
-;
-
-none:
-	T_NONE
-	{
-		if (none.symbol != NULL) {
-			stop("Only one definition of none allowed",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-		none.symbol = cur_symbol;
-	}
-;
-
-sindex:
-	T_SINDEX
-	{
-		if (sindex.symbol != NULL) {
-			stop("Only one definition of sindex allowed",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-		sindex.symbol = cur_symbol;
-	}
-;
-
-expression:
-	expression '|' expression
-	{
-		 $$.value = $1.value | $3.value;
-		 symlist_merge(&$$.referenced_syms,
-			       &$1.referenced_syms,
-			       &$3.referenced_syms);
-	}
-|	expression '&' expression
-	{
-		$$.value = $1.value & $3.value;
-		symlist_merge(&$$.referenced_syms,
-			       &$1.referenced_syms,
-			       &$3.referenced_syms);
-	}
-|	expression '+' expression
-	{
-		$$.value = $1.value + $3.value;
-		symlist_merge(&$$.referenced_syms,
-			       &$1.referenced_syms,
-			       &$3.referenced_syms);
-	}
-|	expression '-' expression
-	{
-		$$.value = $1.value - $3.value;
-		symlist_merge(&($$.referenced_syms),
-			       &($1.referenced_syms),
-			       &($3.referenced_syms));
-	}
-|	'(' expression ')'
-	{
-		$$ = $2;
-	}
-|	'~' expression
-	{
-		$$ = $2;
-		$$.value = (~$$.value) & 0xFF;
-	}
-|	'-' expression %prec UMINUS
-	{
-		$$ = $2;
-		$$.value = -$$.value;
-	}
-|	T_NUMBER
-	{
-		$$.value = $1;
-		SLIST_INIT(&$$.referenced_syms);
-	}
-|	T_SYMBOL
-	{
-		symbol_t *symbol;
-
-		symbol = $1;
-		switch (symbol->type) {
-		case ALIAS:
-			symbol = $1->info.ainfo->parent;
-		case REGISTER:
-		case SCBLOC:
-		case SRAMLOC:
-			$$.value = symbol->info.rinfo->address;
-			break;
-		case MASK:
-		case BIT:
-			$$.value = symbol->info.minfo->mask;
-			break;
-		case DOWNLOAD_CONST:
-		case CONST:
-			$$.value = symbol->info.cinfo->value;
-			break;
-		case UNINITIALIZED:
-		default:
-		{
-			char buf[255];
-
-			snprintf(buf, sizeof(buf),
-				 "Undefined symbol %s referenced",
-				 symbol->name);
-			stop(buf, EX_DATAERR);
-			/* NOTREACHED */
-			break;
-		}
-		}
-		SLIST_INIT(&$$.referenced_syms);
-		symlist_add(&$$.referenced_syms, symbol, SYMLIST_INSERT_HEAD);
-	}
-;
-
-constant:
-	T_CONST T_SYMBOL numerical_value
-	{
-		if ($2->type != UNINITIALIZED) {
-			stop("Re-definition of symbol as a constant",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-		$2->type = CONST;
-		initialize_symbol($2);
-		$2->info.cinfo->value = $3;
-		$2->info.cinfo->define = $1;
-	}
-|	T_CONST T_SYMBOL T_DOWNLOAD
-	{
-		if ($1) {
-			stop("Invalid downloaded constant declaration",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-		if ($2->type != UNINITIALIZED) {
-			stop("Re-definition of symbol as a downloaded constant",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-		$2->type = DOWNLOAD_CONST;
-		initialize_symbol($2);
-		$2->info.cinfo->value = download_constant_count++;
-		$2->info.cinfo->define = FALSE;
-	}
-;
-
-numerical_value:
-	T_NUMBER
-	{
-		$$ = $1;
-	}
-|	'-' T_NUMBER
-	{
-		$$ = -$2;
-	}
-;
-
-scratch_ram:
-	T_SRAM '{'
-		{
-			cur_symbol = symtable_get(SRAM_SYMNAME);
-			cur_symtype = SRAMLOC;
-			if (cur_symbol->type != UNINITIALIZED) {
-				stop("Only one SRAM definition allowed",
-				     EX_DATAERR);
-				/* NOTREACHED */
-			}
-			cur_symbol->type = SRAMLOC;
-			initialize_symbol(cur_symbol);
-		}
-		reg_address
-		{
-			sram_or_scb_offset = cur_symbol->info.rinfo->address;
-		}
-		scb_or_sram_reg_list
-	'}'
-		{
-			cur_symbol = NULL;
-		}
-;
-
-scb:
-	T_SCB '{'
-		{
-			cur_symbol = symtable_get(SCB_SYMNAME);
-			cur_symtype = SCBLOC;
-			if (cur_symbol->type != UNINITIALIZED) {
-				stop("Only one SRAM definition allowed",
-				     EX_SOFTWARE);
-				/* NOTREACHED */
-			}
-			cur_symbol->type = SCBLOC;
-			initialize_symbol(cur_symbol);
-		}
-		reg_address
-		{
-			sram_or_scb_offset = cur_symbol->info.rinfo->address;
-		}
-		scb_or_sram_reg_list
-	'}'
-		{
-			cur_symbol = NULL;
-		}
-;
-
-scb_or_sram_reg_list:
-	reg_definition
-|	scb_or_sram_reg_list reg_definition
-;
-
-reg_symbol:
-	T_SYMBOL
-	{
-		process_register(&$1);
-		$$.symbol = $1;
-		$$.offset = 0;
-	}
-|	T_SYMBOL '[' T_NUMBER ']'
-	{
-		process_register(&$1);
-		if (($3 + 1) > $1->info.rinfo->size) {
-			stop("Accessing offset beyond range of register",
-			     EX_DATAERR);
-			/* NOTREACHED */
-		}
-		$$.symbol = $1;
-		$$.offset = $3;
-	}
-|	T_A
-	{
-		if (accumulator == NULL) {
-			stop("No accumulator has been defined", EX_DATAERR);
-			/* NOTREACHED */
-		}
-		$$.symbol = accumulator;
-		$$.offset = 0;
-	}
-;
-
-destination:
-	reg_symbol
-	{
-		test_writable_symbol($1.symbol);
-		$$ = $1;
-	}
-;
-
-immediate:
-	expression
-	{ $$ = $1; }
-;
-
-immediate_or_a:
-	expression
-	{
-		$$ = $1;
-	}
-|	T_A
-	{
-		SLIST_INIT(&$$.referenced_syms);
-		$$.value = 0;
-	}
-;
-
-source:
-	reg_symbol
-	{
-		test_readable_symbol($1.symbol);
-		$$ = $1;
-	}
-;
-
-opt_source:
-	{
-		$$.symbol = NULL;
-		$$.offset = 0;
-	}
-|	',' source
-	{ $$ = $2; }
-;
-
-ret:
-	{ $$ = 0; }
-|	T_RET
-	{ $$ = 1; }
-;
-
-label:
-	T_SYMBOL ':'
-	{
-		if ($1->type != UNINITIALIZED) {
-			stop("Program label multiply defined", EX_DATAERR);
-			/* NOTREACHED */
-		}
-		$1->type = LABEL;
-		initialize_symbol($1);
-		$1->info.linfo->address = instruction_ptr;
-	}
-;
-
-address:
-	T_SYMBOL
-	{
-		$$.symbol = $1;
-		$$.offset = 0;
-	}
-|	T_SYMBOL '+' T_NUMBER
-	{
-		$$.symbol = $1;
-		$$.offset = $3;
-	}
-|	T_SYMBOL '-' T_NUMBER
-	{
-		$$.symbol = $1;
-		$$.offset = -$3;
-	}
-|	'.'
-	{
-		$$.symbol = NULL;
-		$$.offset = 0;
-	}
-|	'.' '+' T_NUMBER
-	{
-		$$.symbol = NULL;
-		$$.offset = $3;
-	}
-|	'.' '-' T_NUMBER
-	{
-		$$.symbol = NULL;
-		$$.offset = -$3;
-	}
-;
-
-conditional:
-	T_IF T_CEXPR '{'
-	{
-		scope_t *new_scope;
-
-		add_conditional($2);
-		new_scope = scope_alloc();
-		new_scope->type = SCOPE_IF;
-		new_scope->begin_addr = instruction_ptr;
-		new_scope->func_num = $2->info.condinfo->func_num;
-	}
-|	T_ELSE T_IF T_CEXPR '{'
-	{
-		scope_t *new_scope;
-		scope_t *scope_context;
-		scope_t *last_scope;
-
-		/*
-		 * Ensure that the previous scope is either an
-		 * if or and else if.
-		 */
-		scope_context = SLIST_FIRST(&scope_stack);
-		last_scope = TAILQ_LAST(&scope_context->inner_scope,
-					scope_tailq);
-		if (last_scope == NULL
-		 || last_scope->type == T_ELSE) {
-
-			stop("'else if' without leading 'if'", EX_DATAERR);
-			/* NOTREACHED */
-		}
-		add_conditional($3);
-		new_scope = scope_alloc();
-		new_scope->type = SCOPE_ELSE_IF;
-		new_scope->begin_addr = instruction_ptr;
-		new_scope->func_num = $3->info.condinfo->func_num;
-	}
-|	T_ELSE '{'
-	{
-		scope_t *new_scope;
-		scope_t *scope_context;
-		scope_t *last_scope;
-
-		/*
-		 * Ensure that the previous scope is either an
-		 * if or and else if.
-		 */
-		scope_context = SLIST_FIRST(&scope_stack);
-		last_scope = TAILQ_LAST(&scope_context->inner_scope,
-					scope_tailq);
-		if (last_scope == NULL
-		 || last_scope->type == SCOPE_ELSE) {
-
-			stop("'else' without leading 'if'", EX_DATAERR);
-			/* NOTREACHED */
-		}
-		new_scope = scope_alloc();
-		new_scope->type = SCOPE_ELSE;
-		new_scope->begin_addr = instruction_ptr;
-	}
-;
-
-conditional:
-	'}'
-	{
-		scope_t *scope_context;
-		scope_t *last_scope;
-
-		scope_context = SLIST_FIRST(&scope_stack);
-		if (scope_context->type == SCOPE_ROOT) {
-			stop("Unexpected '}' encountered", EX_DATAERR);
-			/* NOTREACHED */
-		}
-
-		scope_context->end_addr = instruction_ptr;
-
-		/* Pop the scope */
-		SLIST_REMOVE_HEAD(&scope_stack, scope_stack_links);
-
-		process_scope(scope_context);
-
-		if (SLIST_FIRST(&scope_stack) == NULL) {
-			stop("Unexpected '}' encountered", EX_DATAERR);
-			/* NOTREACHED */
-		}
-	}
-;
-
-f1_opcode:
-	T_AND { $$ = AIC_OP_AND; }
-|	T_XOR { $$ = AIC_OP_XOR; }
-|	T_ADD { $$ = AIC_OP_ADD; }
-|	T_ADC { $$ = AIC_OP_ADC; }
-;
-
-code:
-	f1_opcode destination ',' immediate_or_a opt_source ret ';'
-	{
-		format_1_instr($1, &$2, &$4, &$5, $6);
-	}
-;
-
-code:
-	T_OR reg_symbol ',' immediate_or_a opt_source ret ';'
-	{
-		format_1_instr(AIC_OP_OR, &$2, &$4, &$5, $6);
-	}
-;
-
-code:
-	T_INC destination opt_source ret ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, 1);
-		format_1_instr(AIC_OP_ADD, &$2, &immed, &$3, $4);
-	}
-;
-
-code:
-	T_DEC destination opt_source ret ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, -1);
-		format_1_instr(AIC_OP_ADD, &$2, &immed, &$3, $4);
-	}
-;
-
-code:
-	T_CLC ret ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, -1);
-		format_1_instr(AIC_OP_ADD, &none, &immed, &allzeros, $2);
-	}
-|	T_CLC T_MVI destination ',' immediate_or_a ret ';'
-	{
-		format_1_instr(AIC_OP_ADD, &$3, &$5, &allzeros, $6);
-	}
-;
-
-code:
-	T_STC ret ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, 1);
-		format_1_instr(AIC_OP_ADD, &none, &immed, &allones, $2);
-	}
-|	T_STC destination ret ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, 1);
-		format_1_instr(AIC_OP_ADD, &$2, &immed, &allones, $3);
-	}
-;
-
-code:
-	T_BMOV destination ',' source ',' immediate ret ';'
-	{
-		format_1_instr(AIC_OP_BMOV, &$2, &$6, &$4, $7);
-	}
-;
-
-code:
-	T_MOV destination ',' source ret ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, 0xff);
-		format_1_instr(AIC_OP_AND, &$2, &immed, &$4, $5);
-	}
-;
-
-code:
-	T_MVI destination ',' immediate_or_a ret ';'
-	{
-		format_1_instr(AIC_OP_OR, &$2, &$4, &allzeros, $5);
-	}
-;
-
-code:
-	T_CLR destination ret ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, 0xff);
-		format_1_instr(AIC_OP_AND, &$2, &immed, &allzeros, $3);
-	}
-;
-
-code:
-	T_NOP ret ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, 0xff);
-		format_1_instr(AIC_OP_AND, &none, &immed, &allzeros, $2);
-	}
-;
-
-code:
-	T_RET ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, 0xff);
-		format_1_instr(AIC_OP_AND, &none, &immed, &allzeros, TRUE);
-	}
-;
-
-	/*
-	 * This grammer differs from the one in the aic7xxx
-	 * reference manual since the grammer listed there is
-	 * ambiguous and causes a shift/reduce conflict.
-	 * It also seems more logical as the "immediate"
-	 * argument is listed as the second arg like the
-	 * other formats.
-	 */
-
-f2_opcode:
-	T_SHL { $$ = AIC_OP_SHL; }
-|	T_SHR { $$ = AIC_OP_SHR; }
-|	T_ROL { $$ = AIC_OP_ROL; }
-|	T_ROR { $$ = AIC_OP_ROR; }
-;
-
-code:
-	f2_opcode destination ',' expression opt_source ret ';'
-	{
-		format_2_instr($1, &$2, &$4, &$5, $6);
-	}
-;
-
-jmp_jc_jnc_call:
-	T_JMP	{ $$ = AIC_OP_JMP; }
-|	T_JC	{ $$ = AIC_OP_JC; }
-|	T_JNC	{ $$ = AIC_OP_JNC; }
-|	T_CALL	{ $$ = AIC_OP_CALL; }
-;
-
-jz_jnz:
-	T_JZ	{ $$ = AIC_OP_JZ; }
-|	T_JNZ	{ $$ = AIC_OP_JNZ; }
-;
-
-je_jne:
-	T_JE	{ $$ = AIC_OP_JE; }
-|	T_JNE	{ $$ = AIC_OP_JNE; }
-;
-
-code:
-	jmp_jc_jnc_call address ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, 0);
-		format_3_instr($1, &sindex, &immed, &$2);
-	}
-;
-
-code:
-	T_OR reg_symbol ',' immediate jmp_jc_jnc_call address ';'
-	{
-		format_3_instr($5, &$2, &$4, &$6);
-	}
-;
-
-code:
-	T_TEST source ',' immediate_or_a jz_jnz address ';'
-	{
-		format_3_instr($5, &$2, &$4, &$6);
-	}
-;
-
-code:
-	T_CMP source ',' immediate_or_a je_jne address ';'
-	{
-		format_3_instr($5, &$2, &$4, &$6);
-	}
-;
-
-code:
-	T_MOV source jmp_jc_jnc_call address ';'
-	{
-		expression_t immed;
-
-		make_expression(&immed, 0);
-		format_3_instr($3, &$2, &immed, &$4);
-	}
-;
-
-code:
-	T_MVI immediate jmp_jc_jnc_call address ';'
-	{
-		format_3_instr($3, &allzeros, &$2, &$4);
-	}
-;
-
-%%
-
-static void
-process_bitmask(mask_type, sym, mask)
-	int		mask_type;
-	symbol_t	*sym;
-	int		mask;
-{
-	/*
-	 * Add the current register to its
-	 * symbol list, if it already exists,
-	 * warn if we are setting it to a
-	 * different value, or in the bit to
-	 * the "allowed bits" of this register.
-	 */
-	if (sym->type == UNINITIALIZED) {
-		sym->type = mask_type;
-		initialize_symbol(sym);
-		if (mask_type == BIT) {
-			if (mask == 0) {
-				stop("Bitmask with no bits set", EX_DATAERR);
-				/* NOTREACHED */
-			}
-			if ((mask & ~(0x01 << (ffs(mask) - 1))) != 0) {
-				stop("Bitmask with more than one bit set",
-				     EX_DATAERR);
-				/* NOTREACHED */
-			}
-		}
-		sym->info.minfo->mask = mask;
-	} else if (sym->type != mask_type) {
-		stop("Bit definition mirrors a definition of the same "
-		     " name, but a different type", EX_DATAERR);
-		/* NOTREACHED */
-	} else if (mask != sym->info.minfo->mask) {
-		stop("Bitmask redefined with a conflicting value", EX_DATAERR);
-		/* NOTREACHED */
-	}
-	/* Fail if this symbol is already listed */
-	if (symlist_search(&(sym->info.minfo->symrefs),
-			   cur_symbol->name) != NULL) {
-		stop("Bitmask defined multiple times for register", EX_DATAERR);
-		/* NOTREACHED */
-	}
-	symlist_add(&(sym->info.minfo->symrefs), cur_symbol,
-		    SYMLIST_INSERT_HEAD);
-	cur_symbol->info.rinfo->valid_bitmask |= mask;
-	cur_symbol->info.rinfo->typecheck_masks = TRUE;
-}
-
-static void
-initialize_symbol(symbol)
-	symbol_t *symbol;
-{
-	switch (symbol->type) {
-        case UNINITIALIZED:
-		stop("Call to initialize_symbol with type field unset",
-		     EX_SOFTWARE);
-		/* NOTREACHED */
-		break;
-        case REGISTER:
-        case SRAMLOC:
-        case SCBLOC:
-		symbol->info.rinfo =
-		    (struct reg_info *)malloc(sizeof(struct reg_info));
-		if (symbol->info.rinfo == NULL) {
-			stop("Can't create register info", EX_SOFTWARE);
-			/* NOTREACHED */
-		}
-		memset(symbol->info.rinfo, 0,
-		       sizeof(struct reg_info));
-		break;
-        case ALIAS:
-		symbol->info.ainfo =
-		    (struct alias_info *)malloc(sizeof(struct alias_info));
-		if (symbol->info.ainfo == NULL) {
-			stop("Can't create alias info", EX_SOFTWARE);
-			/* NOTREACHED */
-		}
-		memset(symbol->info.ainfo, 0,
-		       sizeof(struct alias_info));
-		break;
-        case MASK:
-        case BIT:
-		symbol->info.minfo =
-		    (struct mask_info *)malloc(sizeof(struct mask_info));
-		if (symbol->info.minfo == NULL) {
-			stop("Can't create bitmask info", EX_SOFTWARE);
-			/* NOTREACHED */
-		}
-		memset(symbol->info.minfo, 0, sizeof(struct mask_info));
-		SLIST_INIT(&(symbol->info.minfo->symrefs));
-		break;
-        case CONST:
-        case DOWNLOAD_CONST:
-		symbol->info.cinfo =
-		    (struct const_info *)malloc(sizeof(struct const_info));
-		if (symbol->info.cinfo == NULL) {
-			stop("Can't create alias info", EX_SOFTWARE);
-			/* NOTREACHED */
-		}
-		memset(symbol->info.cinfo, 0,
-		       sizeof(struct const_info));
-		break;
-	case LABEL:
-		symbol->info.linfo =
-		    (struct label_info *)malloc(sizeof(struct label_info));
-		if (symbol->info.linfo == NULL) {
-			stop("Can't create label info", EX_SOFTWARE);
-			/* NOTREACHED */
-		}
-		memset(symbol->info.linfo, 0,
-		       sizeof(struct label_info));
-		break;
-	case CONDITIONAL:
-		symbol->info.condinfo =
-		    (struct cond_info *)malloc(sizeof(struct cond_info));
-		if (symbol->info.condinfo == NULL) {
-			stop("Can't create conditional info", EX_SOFTWARE);
-			/* NOTREACHED */
-		}
-		memset(symbol->info.condinfo, 0,
-		       sizeof(struct cond_info));
-		break;
-	default:
-		stop("Call to initialize_symbol with invalid symbol type",
-		     EX_SOFTWARE);
-		/* NOTREACHED */
-		break;
-	}
-}
-
-static void
-process_register(p_symbol)
-	symbol_t **p_symbol;
-{
-	char buf[255];
-	symbol_t *symbol = *p_symbol;
-
-	if (symbol->type == UNINITIALIZED) {
-		snprintf(buf, sizeof(buf), "Undefined register %s",
-			 symbol->name);
-		stop(buf, EX_DATAERR);
-		/* NOTREACHED */
-	} else if (symbol->type == ALIAS) {
-		*p_symbol = symbol->info.ainfo->parent;
-	} else if ((symbol->type != REGISTER)
-		&& (symbol->type != SCBLOC)
-		&& (symbol->type != SRAMLOC)) {
-		snprintf(buf, sizeof(buf),
-			 "Specified symbol %s is not a register",
-			 symbol->name);
-		stop(buf, EX_DATAERR);
-	}
-}
-
-static void
-format_1_instr(opcode, dest, immed, src, ret)
-	int	     opcode;
-	symbol_ref_t *dest;
-	expression_t *immed;
-	symbol_ref_t *src;
-	int	     ret;
-{
-	struct instruction *instr;
-	struct ins_format1 *f1_instr;
-
-	if (src->symbol == NULL)
-		src = dest;
-
-	/* Test register permissions */
-	test_writable_symbol(dest->symbol);
-	test_readable_symbol(src->symbol);
-
-	/* Ensure that immediate makes sense for this destination */
-	type_check(dest->symbol, immed, opcode);
-
-	/* Allocate sequencer space for the instruction and fill it out */
-	instr = seq_alloc();
-	f1_instr = &instr->format.format1;
-	f1_instr->ret = ret ? 1 : 0;
-	f1_instr->opcode = opcode;
-	f1_instr->destination = dest->symbol->info.rinfo->address
-			      + dest->offset;
-	f1_instr->source = src->symbol->info.rinfo->address
-			 + src->offset;
-	f1_instr->immediate = immed->value;
-
-	if (is_download_const(immed))
-		f1_instr->parity = 1;
-
-	symlist_free(&immed->referenced_syms);
-	instruction_ptr++;
-}
-
-static void
-format_2_instr(opcode, dest, places, src, ret)
-	int	     opcode;
-	symbol_ref_t *dest;
-	expression_t *places;
-	symbol_ref_t *src;
-	int	     ret;
-{
-	struct instruction *instr;
-	struct ins_format2 *f2_instr;
-	u_int8_t shift_control;
-
-	if (src->symbol == NULL)
-		src = dest;
-
-	/* Test register permissions */
-	test_writable_symbol(dest->symbol);
-	test_readable_symbol(src->symbol);
-
-	/* Allocate sequencer space for the instruction and fill it out */
-	instr = seq_alloc();
-	f2_instr = &instr->format.format2;
-	f2_instr->ret = ret ? 1 : 0;
-	f2_instr->opcode = AIC_OP_ROL;
-	f2_instr->destination = dest->symbol->info.rinfo->address
-			      + dest->offset;
-	f2_instr->source = src->symbol->info.rinfo->address
-			 + src->offset;
-	if (places->value > 8 || places->value <= 0) {
-		stop("illegal shift value", EX_DATAERR);
-		/* NOTREACHED */
-	}
-	switch (opcode) {
-	case AIC_OP_SHL:
-		if (places->value == 8)
-			shift_control = 0xf0;
-		else
-			shift_control = (places->value << 4) | places->value;
-		break;
-	case AIC_OP_SHR:
-		if (places->value == 8) {
-			shift_control = 0xf8;
-		} else {
-			shift_control = (places->value << 4)
-				      | (8 - places->value)
-				      | 0x08;
-		}
-		break;
-	case AIC_OP_ROL:
-		shift_control = places->value & 0x7;
-		break;
-	case AIC_OP_ROR:
-		shift_control = (8 - places->value) | 0x08;
-		break;
-	default:
-		shift_control = 0; /* Quiet Compiler */
-		stop("Invalid shift operation specified", EX_SOFTWARE);
-		/* NOTREACHED */
-		break;
-	};
-	f2_instr->shift_control = shift_control;
-	symlist_free(&places->referenced_syms);
-	instruction_ptr++;
-}
-
-static void
-format_3_instr(opcode, src, immed, address)
-	int	     opcode;
-	symbol_ref_t *src;
-	expression_t *immed;
-	symbol_ref_t *address;
-{
-	struct instruction *instr;
-	struct ins_format3 *f3_instr;
-	int addr;
-
-	/* Test register permissions */
-	test_readable_symbol(src->symbol);
-
-	/* Ensure that immediate makes sense for this source */
-	type_check(src->symbol, immed, opcode);
-
-	/* Allocate sequencer space for the instruction and fill it out */
-	instr = seq_alloc();
-	f3_instr = &instr->format.format3;
-	if (address->symbol == NULL) {
-		/* 'dot' referrence.  Use the current instruction pointer */
-		addr = instruction_ptr + address->offset;
-	} else if (address->symbol->type == UNINITIALIZED) {
-		/* forward reference */
-		addr = address->offset;
-		instr->patch_label = address->symbol;
-	} else
-		addr = address->symbol->info.linfo->address + address->offset;
-	f3_instr->opcode = opcode;
-	f3_instr->address = addr;
-	f3_instr->source = src->symbol->info.rinfo->address
-			 + src->offset;
-	f3_instr->immediate = immed->value;
-
-	if (is_download_const(immed))
-		f3_instr->parity = 1;
-
-	symlist_free(&immed->referenced_syms);
-	instruction_ptr++;
-}
-
-static void
-test_readable_symbol(symbol)
-	symbol_t *symbol;
-{
-	if (symbol->info.rinfo->mode == WO) {
-		stop("Write Only register specified as source",
-		     EX_DATAERR);
-		/* NOTREACHED */
-	}
-}
-
-static void
-test_writable_symbol(symbol)
-	symbol_t *symbol;
-{
-	if (symbol->info.rinfo->mode == RO) {
-		stop("Read Only register specified as destination",
-		     EX_DATAERR);
-		/* NOTREACHED */
-	}
-}
-
-static void
-type_check(symbol, expression, opcode)
-	symbol_t     *symbol;
-	expression_t *expression;
-	int	     opcode;
-{
-	symbol_node_t *node;
-	int and_op;
-	char buf[255];
-
-	and_op = FALSE;
-	if (opcode == AIC_OP_AND || opcode == AIC_OP_JNZ || AIC_OP_JZ)
-		and_op = TRUE;
-
-	/*
-	 * Make sure that we aren't attempting to write something
-	 * that hasn't been defined.  If this is an and operation,
-	 * this is a mask, so "undefined" bits are okay.
-	 */
-	if (and_op == FALSE
-	 && (expression->value & ~symbol->info.rinfo->valid_bitmask) != 0) {
-		snprintf(buf, sizeof(buf),
-			 "Invalid bit(s) 0x%x in immediate written to %s",
-			 expression->value & ~symbol->info.rinfo->valid_bitmask,
-			 symbol->name);
-		stop(buf, EX_DATAERR);
-		/* NOTREACHED */
-	}
-
-	/*
-	 * Now make sure that all of the symbols referenced by the
-	 * expression are defined for this register.
-	 */
-	if(symbol->info.rinfo->typecheck_masks != FALSE) {
-		for(node = expression->referenced_syms.slh_first;
-		    node != NULL;
-		    node = node->links.sle_next) {
-			if ((node->symbol->type == MASK
-			  || node->symbol->type == BIT)
-			 && symlist_search(&node->symbol->info.minfo->symrefs,
-					   symbol->name) == NULL) {
-				snprintf(buf, sizeof(buf),
-					 "Invalid bit or mask %s "
-					 "for register %s",
-					 node->symbol->name, symbol->name);
-				stop(buf, EX_DATAERR);
-				/* NOTREACHED */
-			}
-		}
-	}
-}
-
-static void
-make_expression(immed, value)
-	expression_t *immed;
-	int	     value;
-{
-	SLIST_INIT(&immed->referenced_syms);
-	immed->value = value & 0xff;
-}
-
-static void
-add_conditional(symbol)
-	symbol_t *symbol;
-{
-	static int numfuncs;
-
-	if (numfuncs == 0) {
-		/* add a special conditional, "0" */
-		symbol_t *false_func;
-
-		false_func = symtable_get("0");
-		if (false_func->type != UNINITIALIZED) {
-			stop("Conditional expression '0' "
-			     "conflicts with a symbol", EX_DATAERR);
-			/* NOTREACHED */
-		}
-		false_func->type = CONDITIONAL;
-		initialize_symbol(false_func);
-		false_func->info.condinfo->func_num = numfuncs++;
-		symlist_add(&patch_functions, false_func, SYMLIST_INSERT_HEAD);
-	}
-
-	/* This condition has occurred before */
-	if (symbol->type == CONDITIONAL)
-		return;
-
-	if (symbol->type != UNINITIALIZED) {
-		stop("Conditional expression conflicts with a symbol",
-		     EX_DATAERR);
-		/* NOTREACHED */
-	}
-
-	symbol->type = CONDITIONAL;
-	initialize_symbol(symbol);
-	symbol->info.condinfo->func_num = numfuncs++;
-	symlist_add(&patch_functions, symbol, SYMLIST_INSERT_HEAD);
-}
-
-void
-yyerror(string)
-	const char *string;
-{
-	stop(string, EX_DATAERR);
-}
-
-static int
-is_download_const(immed)
-	expression_t *immed;
-{
-	if ((immed->referenced_syms.slh_first != NULL)
-	 && (immed->referenced_syms.slh_first->symbol->type == DOWNLOAD_CONST))
-		return (TRUE);
-
-	return (FALSE);
-}
diff --git a/sys/dev/aic7xxx/aicasm_scan.l b/sys/dev/aic7xxx/aicasm_scan.l
deleted file mode 100644
index 28689cbd4996..000000000000
--- a/sys/dev/aic7xxx/aicasm_scan.l
+++ /dev/null
@@ -1,283 +0,0 @@
-%{
-/*
- * Lexical Analyzer for the Aic7xxx SCSI Host adapter sequencer assembler.
- *
- * Copyright (c) 1997-1998 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/types.h>
-
-#include <limits.h>
-#include <stdio.h>
-#include <string.h>
-#include <sysexits.h>
-#include <sys/queue.h>
-
-#include "aicasm.h"
-#include "aicasm_symbol.h"
-#include "y.tab.h"
-
-#define MAX_STR_CONST 256
-char string_buf[MAX_STR_CONST];
-char *string_buf_ptr;
-int  parren_count;
-%}
-
-PATH		[-/A-Za-z0-9_.]*[./][-/A-Za-z0-9_.]*
-WORD		[A-Za-z_][-A-Za-z_0-9]*
-SPACE		[ \t]+
-
-%x COMMENT
-%x CEXPR
-%x INCLUDE
-
-%%
-\n			{ ++yylineno; }
-"/*"			{ BEGIN COMMENT;  /* Enter comment eating state */ }
-<COMMENT>"/*"		{ fprintf(stderr, "Warning! Comment within comment."); }
-<COMMENT>\n		{ ++yylineno; }
-<COMMENT>[^*/\n]*	;
-<COMMENT>"*"+[^*/\n]*	;
-<COMMENT>"/"+[^*/\n]*	;
-<COMMENT>"*"+"/"	{ BEGIN INITIAL; }
-if[ \t]*\(		{
-				string_buf_ptr = string_buf;
-				parren_count = 1;
-				BEGIN CEXPR;
-				return T_IF;
-			}
-<CEXPR>\(		{	*string_buf_ptr++ = '('; parren_count++; }
-<CEXPR>\)		{
-				parren_count--;
-				if (parren_count == 0) {
-					/* All done */
-					BEGIN INITIAL;
-					*string_buf_ptr = '\0';
-					yylval.sym = symtable_get(string_buf);
-					return T_CEXPR;
-				} else {
-					*string_buf_ptr++ = ')';
-				}
-			}
-<CEXPR>\n		{ ++yylineno; }
-<CEXPR>[^()\n]+		{
-				char *yptr = yytext;
-
-				while (*yptr != '\0')
-					*string_buf_ptr++ = *yptr++;
-			}
-
-{SPACE}			;
-
-	/* Register/SCB/SRAM definition keywords */
-register		{ return T_REGISTER; }
-const			{ yylval.value = FALSE; return T_CONST; }
-download		{ return T_DOWNLOAD; }
-address			{ return T_ADDRESS; }
-access_mode		{ return T_ACCESS_MODE; }
-RW|RO|WO		{
-				 if (strcmp(yytext, "RW") == 0)
-					yylval.value = RW;
-				 else if (strcmp(yytext, "RO") == 0)
-					yylval.value = RO;
-				 else
-					yylval.value = WO;
-				 return T_MODE;
-			}
-bit			{ return T_BIT; }
-mask			{ return T_MASK; }
-alias			{ return T_ALIAS; }
-size			{ return T_SIZE; }
-scb			{ return T_SCB; }
-scratch_ram		{ return T_SRAM; }
-accumulator		{ return T_ACCUM; }
-allones			{ return T_ALLONES; }
-allzeros		{ return T_ALLZEROS; }
-none			{ return T_NONE; }
-sindex			{ return T_SINDEX; }
-A			{ return T_A; }
-
-	/* Opcodes */
-shl			{ return T_SHL; }
-shr			{ return T_SHR; }
-ror			{ return T_ROR; }
-rol			{ return T_ROL; }
-mvi			{ return T_MVI; }
-mov			{ return T_MOV; }
-clr			{ return T_CLR; }
-jmp			{ return T_JMP; }
-jc			{ return T_JC;	}
-jnc			{ return T_JNC;	}
-je			{ return T_JE;	}
-jne			{ return T_JNE;	}
-jz			{ return T_JZ;	}
-jnz			{ return T_JNZ;	}
-call			{ return T_CALL; }
-add			{ return T_ADD; }
-adc			{ return T_ADC; }
-bmov			{ return T_BMOV; }
-inc			{ return T_INC; }
-dec			{ return T_DEC; }
-stc			{ return T_STC;	}
-clc			{ return T_CLC; }
-cmp			{ return T_CMP;	}
-xor			{ return T_XOR;	}
-test			{ return T_TEST;}
-and			{ return T_AND;	}
-or			{ return T_OR;	}
-ret			{ return T_RET; }
-nop			{ return T_NOP; }
-else			{ return T_ELSE; }
-
-	/* Allowed Symbols */
-[-+,:()~|&."{};<>[\]!]	{ return yytext[0]; }
-
-	/* Number processing */
-0[0-7]*			{
-				yylval.value = strtol(yytext, NULL, 8);
-				return T_NUMBER;
-			}
-
-0[xX][0-9a-fA-F]+	{
-				yylval.value = strtoul(yytext + 2, NULL, 16);
-				return T_NUMBER;
-			}
-
-[1-9][0-9]*		{
-				yylval.value = strtol(yytext, NULL, 10);
-				return T_NUMBER;
-			}
-
-	/* Include Files */
-#include		{ return T_INCLUDE; BEGIN INCLUDE;}
-<INCLUDE>[<>\"]		{ return yytext[0]; }
-<INCLUDE>{PATH}		{ yylval.str = strdup(yytext); return T_PATH; }
-<INCLUDE>;		{ BEGIN INITIAL; return yytext[0]; }
-<INCLUDE>.		{ stop("Invalid include line", EX_DATAERR); }
-
-	/* For parsing C include files with #define foo */
-#define			{ yylval.value = TRUE; return T_CONST; }
-	/* Throw away macros */
-#define[^\n]*[()]+[^\n]* ;
-{PATH}			{ yylval.str = strdup(yytext); return T_PATH; }
-
-{WORD}			{ yylval.sym = symtable_get(yytext);  return T_SYMBOL; }
-
-.			{ 
-				char buf[255];
-
-				snprintf(buf, sizeof(buf), "Invalid character "
-					 "'%c'", yytext[0]);
-				stop(buf, EX_DATAERR);
-			}
-%%
-
-typedef struct include {
-        YY_BUFFER_STATE  buffer;
-        int              lineno;
-        char            *filename;
-	SLIST_ENTRY(include) links;
-}include_t;
-
-SLIST_HEAD(, include) include_stack;
-
-void
-include_file(file_name, type)
-	char	*file_name;
-	include_type type;
-{
-	FILE *newfile;
-	include_t *include;
-
-	newfile = NULL;
-	/* Try the current directory first */
-	if (includes_search_curdir != 0 || type == SOURCE_FILE)
-		newfile = fopen(file_name, "r");
-
-	if (newfile == NULL && type != SOURCE_FILE) {
-                path_entry_t include_dir;
-                for (include_dir = search_path.slh_first;
-                     include_dir != NULL;                
-                     include_dir = include_dir->links.sle_next) {
-			char fullname[PATH_MAX];
-
-			if ((include_dir->quoted_includes_only == TRUE)
-			 && (type != QUOTED_INCLUDE))
-				continue;
-
-			snprintf(fullname, sizeof(fullname),
-				 "%s/%s", include_dir->directory, file_name);
-
-			if ((newfile = fopen(fullname, "r")) != NULL)
-				break;
-                }
-        }
-
-	if (newfile == NULL) {
-		perror(file_name);
-		stop("Unable to open input file", EX_SOFTWARE);
-		/* NOTREACHED */
-	}
-
-	if (type != SOURCE_FILE) {
-		include = (include_t *)malloc(sizeof(include_t));
-		if (include == NULL) {
-			stop("Unable to allocate include stack entry",
-			     EX_SOFTWARE);
-			/* NOTREACHED */
-		}
-		include->buffer = YY_CURRENT_BUFFER;
-		include->lineno = yylineno;
-		include->filename = yyfilename;
-		SLIST_INSERT_HEAD(&include_stack, include, links);
-	}
-	yy_switch_to_buffer(yy_create_buffer(newfile, YY_BUF_SIZE));
-	yylineno = 1;
-	yyfilename = strdup(file_name);
-}
-
-int
-yywrap()
-{
-	include_t *include;
-
-	yy_delete_buffer(YY_CURRENT_BUFFER);
-	(void)fclose(yyin);
-	if (yyfilename != NULL)
-		free(yyfilename);
-	yyfilename = NULL;
-	include = include_stack.slh_first;
-	if (include != NULL) {
-		yy_switch_to_buffer(include->buffer);
-		yylineno = include->lineno;
-		yyfilename = include->filename;
-		SLIST_REMOVE_HEAD(&include_stack, links);
-		free(include);
-		return (0);
-	}
-	return (1);
-}
diff --git a/sys/dev/aic7xxx/aicasm_symbol.c b/sys/dev/aic7xxx/aicasm_symbol.c
deleted file mode 100644
index 8c250d2317ec..000000000000
--- a/sys/dev/aic7xxx/aicasm_symbol.c
+++ /dev/null
@@ -1,472 +0,0 @@
-/*
- * Aic7xxx SCSI host adapter firmware asssembler symbol table implementation
- *
- * Copyright (c) 1997 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-
-#include <sys/types.h>
-
-#include <db.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sysexits.h>
-
-#include "aicasm_symbol.h"
-#include "aicasm.h"
-
-static DB *symtable;
-
-symbol_t *
-symbol_create(name)
-	char *name;
-{
-	symbol_t *new_symbol;
-
-	new_symbol = (symbol_t *)malloc(sizeof(symbol_t));
-	if (new_symbol == NULL) {
-		perror("Unable to create new symbol");
-		exit(EX_SOFTWARE);
-	}
-	memset(new_symbol, 0, sizeof(*new_symbol));
-	new_symbol->name = strdup(name);
-	new_symbol->type = UNINITIALIZED;
-	return (new_symbol);
-}
-
-void
-symbol_delete(symbol)
-	symbol_t *symbol;
-{
-	if (symtable != NULL) {
-		DBT	 key;
-
-		key.data = symbol->name;
-		key.size = strlen(symbol->name);
-		symtable->del(symtable, &key, /*flags*/0);
-	}
-	switch(symbol->type) {
-	case SCBLOC:
-	case SRAMLOC:
-	case REGISTER:
-		if (symbol->info.rinfo != NULL)
-			free(symbol->info.rinfo);
-		break;
-	case ALIAS:
-		if (symbol->info.ainfo != NULL)
-			free(symbol->info.ainfo);
-		break;
-	case MASK:
-	case BIT:
-		if (symbol->info.minfo != NULL) {
-			symlist_free(&symbol->info.minfo->symrefs);
-			free(symbol->info.minfo);
-		}
-		break;
-	case DOWNLOAD_CONST:
-	case CONST:
-		if (symbol->info.cinfo != NULL)
-			free(symbol->info.cinfo);
-		break;
-	case LABEL:
-		if (symbol->info.linfo != NULL)
-			free(symbol->info.linfo);
-		break;
-	case UNINITIALIZED:
-	default:
-		break;
-	}
-	free(symbol->name);
-	free(symbol);
-}
-
-void
-symtable_open()
-{
-	symtable = dbopen(/*filename*/NULL,
-			  O_CREAT | O_NONBLOCK | O_RDWR, /*mode*/0, DB_HASH,
-			  /*openinfo*/NULL);
-
-	if (symtable == NULL) {
-		perror("Symbol table creation failed");
-		exit(EX_SOFTWARE);
-		/* NOTREACHED */
-	}
-}
-
-void
-symtable_close()
-{
-	if (symtable != NULL) {
-		DBT	 key;
-		DBT	 data;
-
-		while (symtable->seq(symtable, &key, &data, R_FIRST) == 0) {
-			symbol_t *stored_ptr;
-
-			memcpy(&stored_ptr, data.data, sizeof(stored_ptr));
-			symbol_delete(stored_ptr);
-		}
-		symtable->close(symtable);
-	}
-}
-
-/*
- * The semantics of get is to return an uninitialized symbol entry
- * if a lookup fails.
- */
-symbol_t *
-symtable_get(name)
-	char *name;
-{
-	symbol_t *stored_ptr;
-	DBT	  key;
-	DBT	  data;
-	int	  retval;
-
-	key.data = (void *)name;
-	key.size = strlen(name);
-
-	if ((retval = symtable->get(symtable, &key, &data, /*flags*/0)) != 0) {
-		if (retval == -1) {
-			perror("Symbol table get operation failed");
-			exit(EX_SOFTWARE);
-			/* NOTREACHED */
-		} else if (retval == 1) {
-			/* Symbol wasn't found, so create a new one */
-			symbol_t *new_symbol;
-
-			new_symbol = symbol_create(name);
-			data.data = &new_symbol;
-			data.size = sizeof(new_symbol);
-			if (symtable->put(symtable, &key, &data,
-					  /*flags*/0) !=0) {
-				perror("Symtable put failed");
-				exit(EX_SOFTWARE);
-			}
-			return (new_symbol);
-		} else {
-			perror("Unexpected return value from db get routine");
-			exit(EX_SOFTWARE);
-			/* NOTREACHED */
-		}
-	}
-	memcpy(&stored_ptr, data.data, sizeof(stored_ptr));
-	return (stored_ptr);
-}
-
-symbol_node_t *
-symlist_search(symlist, symname)
-	symlist_t *symlist;
-	char	  *symname;
-{
-	symbol_node_t *curnode;
-
-	curnode = symlist->slh_first;
-	while(curnode != NULL) {
-		if (strcmp(symname, curnode->symbol->name) == 0)
-			break;
-		curnode = curnode->links.sle_next;
-	}
-	return (curnode);
-}
-
-void
-symlist_add(symlist, symbol, how)
-	symlist_t *symlist;
-	symbol_t  *symbol;
-	int	  how;
-{
-	symbol_node_t *newnode;
-
-	newnode = (symbol_node_t *)malloc(sizeof(symbol_node_t));
-	if (newnode == NULL) {
-		stop("symlist_add: Unable to malloc symbol_node", EX_SOFTWARE);
-		/* NOTREACHED */
-	}
-	newnode->symbol = symbol;
-	if (how == SYMLIST_SORT) {
-		symbol_node_t *curnode;
-		int mask;
-
-		mask = FALSE;
-		switch(symbol->type) {
-		case REGISTER:
-		case SCBLOC:
-		case SRAMLOC:
-			break;
-		case BIT:
-		case MASK:
-			mask = TRUE;
-			break;
-		default:
-			stop("symlist_add: Invalid symbol type for sorting",
-			     EX_SOFTWARE);
-			/* NOTREACHED */
-		}
-
-		curnode = symlist->slh_first;
-		if (curnode == NULL
-		 || (mask && (curnode->symbol->info.minfo->mask >
-		              newnode->symbol->info.minfo->mask))
-		 || (!mask && (curnode->symbol->info.rinfo->address >
-		               newnode->symbol->info.rinfo->address))) {
-			SLIST_INSERT_HEAD(symlist, newnode, links);
-			return;
-		}
-
-		while (1) {
-			if (curnode->links.sle_next == NULL) {
-				SLIST_INSERT_AFTER(curnode, newnode,
-						   links);
-				break;
-			} else {
-				symbol_t *cursymbol;
-
-				cursymbol = curnode->links.sle_next->symbol;
-				if ((mask && (cursymbol->info.minfo->mask >
-				              symbol->info.minfo->mask))
-				 || (!mask &&(cursymbol->info.rinfo->address >
-				              symbol->info.rinfo->address))){
-					SLIST_INSERT_AFTER(curnode, newnode,
-							   links);
-					break;
-				}
-			}
-			curnode = curnode->links.sle_next;
-		}
-	} else {
-		SLIST_INSERT_HEAD(symlist, newnode, links);
-	}
-}
-
-void
-symlist_free(symlist)
-	symlist_t *symlist;
-{
-	symbol_node_t *node1, *node2;
-
-	node1 = symlist->slh_first;
-	while (node1 != NULL) {
-		node2 = node1->links.sle_next;
-		free(node1);
-		node1 = node2;
-	}
-	SLIST_INIT(symlist);
-}
-
-void
-symlist_merge(symlist_dest, symlist_src1, symlist_src2)
-	symlist_t *symlist_dest;
-	symlist_t *symlist_src1;
-	symlist_t *symlist_src2;
-{
-	symbol_node_t *node;
-
-	*symlist_dest = *symlist_src1;
-	while((node = symlist_src2->slh_first) != NULL) {
-		SLIST_REMOVE_HEAD(symlist_src2, links);
-		SLIST_INSERT_HEAD(symlist_dest, node, links);
-	}
-
-	/* These are now empty */
-	SLIST_INIT(symlist_src1);
-	SLIST_INIT(symlist_src2);
-}
-
-void
-symtable_dump(ofile)
-	FILE *ofile;
-{
-	/*
-	 * Sort the registers by address with a simple insertion sort.
-	 * Put bitmasks next to the first register that defines them.
-	 * Put constants at the end.
-	 */
-	symlist_t registers;
-	symlist_t masks;
-	symlist_t constants;
-	symlist_t download_constants;
-	symlist_t aliases;
-
-	SLIST_INIT(&registers);
-	SLIST_INIT(&masks);
-	SLIST_INIT(&constants);
-	SLIST_INIT(&download_constants);
-	SLIST_INIT(&aliases);
-
-	if (symtable != NULL) {
-		DBT	 key;
-		DBT	 data;
-		int	 flag = R_FIRST;
-
-		while (symtable->seq(symtable, &key, &data, flag) == 0) {
-			symbol_t *cursym;
-
-			memcpy(&cursym, data.data, sizeof(cursym));
-			switch(cursym->type) {
-			case REGISTER:
-			case SCBLOC:
-			case SRAMLOC:
-				symlist_add(&registers, cursym, SYMLIST_SORT);
-				break;
-			case MASK:
-			case BIT:
-				symlist_add(&masks, cursym, SYMLIST_SORT);
-				break;
-			case CONST:
-				if (cursym->info.cinfo->define == FALSE) {
-					symlist_add(&constants, cursym,
-						    SYMLIST_INSERT_HEAD);
-				}
-				break;
-			case DOWNLOAD_CONST:
-				symlist_add(&download_constants, cursym,
-					    SYMLIST_INSERT_HEAD);
-				break;
-			case ALIAS:
-				symlist_add(&aliases, cursym,
-					    SYMLIST_INSERT_HEAD);
-				break;
-			default:
-				break;
-			}
-			flag = R_NEXT;
-		}
-
-		/* Put in the masks and bits */
-		while (masks.slh_first != NULL) {
-			symbol_node_t *curnode;
-			symbol_node_t *regnode;
-			char *regname;
-
-			curnode = masks.slh_first;
-			SLIST_REMOVE_HEAD(&masks, links);
-
-			regnode =
-			    curnode->symbol->info.minfo->symrefs.slh_first;
-			regname = regnode->symbol->name;
-			regnode = symlist_search(&registers, regname);
-			SLIST_INSERT_AFTER(regnode, curnode, links);
-		}
-
-		/* Add the aliases */
-		while (aliases.slh_first != NULL) {
-			symbol_node_t *curnode;
-			symbol_node_t *regnode;
-			char *regname;
-
-			curnode = aliases.slh_first;
-			SLIST_REMOVE_HEAD(&aliases, links);
-
-			regname = curnode->symbol->info.ainfo->parent->name;
-			regnode = symlist_search(&registers, regname);
-			SLIST_INSERT_AFTER(regnode, curnode, links);
-		}
-
-		/* Output what we have */
-		fprintf(ofile,
-"/*
-  * DO NOT EDIT - This file is automatically generated.
-  */\n");
-		while (registers.slh_first != NULL) {
-			symbol_node_t *curnode;
-			u_int8_t value;
-			char *tab_str;
-			char *tab_str2;
-
-			curnode = registers.slh_first;
-			SLIST_REMOVE_HEAD(&registers, links);
-			switch(curnode->symbol->type) {
-			case REGISTER:
-			case SCBLOC:
-			case SRAMLOC:
-				fprintf(ofile, "\n");
-				value = curnode->symbol->info.rinfo->address;
-				tab_str = "\t";
-				tab_str2 = "\t\t";
-				break;
-			case ALIAS:
-			{
-				symbol_t *parent;
-
-				parent = curnode->symbol->info.ainfo->parent;
-				value = parent->info.rinfo->address;
-				tab_str = "\t";
-				tab_str2 = "\t\t";
-				break;
-			}
-			case MASK:
-			case BIT:
-				value = curnode->symbol->info.minfo->mask;
-				tab_str = "\t\t";
-				tab_str2 = "\t";
-				break;
-			default:
-				value = 0; /* Quiet compiler */
-				tab_str = NULL;
-				tab_str2 = NULL;
-				stop("symtable_dump: Invalid symbol type "
-				     "encountered", EX_SOFTWARE);
-				break;
-			}
-			fprintf(ofile, "#define%s%-16s%s0x%02x\n",
-				tab_str, curnode->symbol->name, tab_str2,
-				value);
-			free(curnode);
-		}
-		fprintf(ofile, "\n\n");
-
-		while (constants.slh_first != NULL) {
-			symbol_node_t *curnode;
-
-			curnode = constants.slh_first;
-			SLIST_REMOVE_HEAD(&constants, links);
-			fprintf(ofile, "#define\t%-8s\t0x%02x\n",
-				curnode->symbol->name,
-				curnode->symbol->info.cinfo->value);
-			free(curnode);
-		}
-
-		
-		fprintf(ofile, "\n\n/* Downloaded Constant Definitions */\n");
-
-		while (download_constants.slh_first != NULL) {
-			symbol_node_t *curnode;
-
-			curnode = download_constants.slh_first;
-			SLIST_REMOVE_HEAD(&download_constants, links);
-			fprintf(ofile, "#define\t%-8s\t0x%02x\n",
-				curnode->symbol->name,
-				curnode->symbol->info.cinfo->value);
-			free(curnode);
-		}
-	}
-}
-
diff --git a/sys/dev/aic7xxx/aicasm_symbol.h b/sys/dev/aic7xxx/aicasm_symbol.h
deleted file mode 100644
index 79809db8e6a5..000000000000
--- a/sys/dev/aic7xxx/aicasm_symbol.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * Aic7xxx SCSI host adapter firmware asssembler symbol table definitions
- *
- * Copyright (c) 1997 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <sys/queue.h>
-
-typedef enum {
-	UNINITIALIZED,
-	REGISTER,
-	ALIAS,
-	SCBLOC,
-	SRAMLOC,
-	MASK,
-	BIT,
-	CONST,
-	DOWNLOAD_CONST,
-	LABEL,
-	CONDITIONAL
-}symtype;
-
-typedef enum {
-	RO = 0x01,
-	WO = 0x02,
-	RW = 0x03
-}amode_t;
-
-struct reg_info {
-	u_int8_t address;
-	int	 size;
-	amode_t	 mode;
-	u_int8_t valid_bitmask;
-	int	 typecheck_masks;
-};
-
-typedef SLIST_HEAD(symlist, symbol_node) symlist_t;
-
-struct mask_info {
-	symlist_t symrefs;
-	u_int8_t mask;
-};
-
-struct const_info {
-	u_int8_t value;
-	int	 define;
-};
-
-struct alias_info {
-	struct symbol *parent;
-};
-
-struct label_info {
-	int	address;
-};
-
-struct cond_info {
-	int	func_num;
-};
-
-typedef struct expression_info {
-        symlist_t       referenced_syms;
-        int             value;
-} expression_t;
-
-typedef struct symbol {
-	char	*name;
-	symtype	type;
-	union	{
-		struct reg_info *rinfo;
-		struct mask_info *minfo;
-		struct const_info *cinfo;
-		struct alias_info *ainfo;
-		struct label_info *linfo;
-		struct cond_info *condinfo;
-	}info;
-} symbol_t;
-
-typedef struct symbol_ref {
-	symbol_t *symbol;
-	int	 offset;
-} symbol_ref_t;
-
-typedef struct symbol_node {
-	SLIST_ENTRY(symbol_node) links;
-	symbol_t *symbol;
-}symbol_node_t;
-
-typedef enum {
-	SCOPE_ROOT,
-	SCOPE_IF,
-	SCOPE_ELSE_IF,
-	SCOPE_ELSE
-} scope_type;
-
-typedef struct patch_info {
-	int skip_patch;
-	int skip_instr;
-} patch_info_t;
-
-typedef struct scope {
-	SLIST_ENTRY(scope) scope_stack_links;
-	TAILQ_ENTRY(scope) scope_links;
-	TAILQ_HEAD(, scope) inner_scope;
-	scope_type type;
-	int inner_scope_patches;
-	int begin_addr;
-        int end_addr;
-	patch_info_t patches[2];
-	int func_num;
-} scope_t;
-
-SLIST_HEAD(scope_list, scope);
-TAILQ_HEAD(scope_tailq, scope);
-
-void	symbol_delete __P((symbol_t *symbol));
-
-void	symtable_open __P((void));
-
-void	symtable_close __P((void));
-
-symbol_t *
-	symtable_get __P((char *name));
-
-symbol_node_t *
-	symlist_search __P((symlist_t *symlist, char *symname));
-
-void
-	symlist_add __P((symlist_t *symlist, symbol_t *symbol, int how));
-#define SYMLIST_INSERT_HEAD	0x00
-#define SYMLIST_SORT		0x01
-
-void	symlist_free __P((symlist_t *symlist));
-
-void	symlist_merge __P((symlist_t *symlist_dest, symlist_t *symlist_src1,
-			   symlist_t *symlist_src2));
-void	symtable_dump __P((FILE *ofile));
diff --git a/sys/dev/aic7xxx/sequencer.h b/sys/dev/aic7xxx/sequencer.h
deleted file mode 100644
index 4f054916ebe8..000000000000
--- a/sys/dev/aic7xxx/sequencer.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Instruction formats for the sequencer program downloaded to
- * Aic7xxx SCSI host adapters
- *
- * Copyright (c) 1997, 1998 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions, and the following disclaimer,
- *    without modification.
- * 2. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * Alternatively, this software may be distributed under the terms of the
- * the GNU Public License ("GPL").
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-struct ins_format1 {
-	u_int32_t	immediate	: 8,
-			source		: 9,
-			destination	: 9,
-			ret		: 1,
-			opcode		: 4,
-			parity		: 1;
-};
-
-struct ins_format2 {
-	u_int32_t	shift_control	: 8,
-			source		: 9,
-			destination	: 9,
-			ret		: 1,
-			opcode		: 4,
-			parity		: 1;
-};
-
-struct ins_format3 {
-	u_int32_t	immediate	: 8,
-			source		: 9,
-			address		: 10,
-			opcode		: 4,
-			parity		: 1;
-};
-
-union ins_formats {
-		struct ins_format1 format1;
-		struct ins_format2 format2;
-		struct ins_format3 format3;
-		u_int8_t	   bytes[4];
-		u_int32_t	   integer;
-};
-struct instruction {
-	union	ins_formats format;
-	u_int	srcline;
-	struct symbol *patch_label;
-	STAILQ_ENTRY(instruction) links;
-};
-
-#define	AIC_OP_OR	0x0
-#define	AIC_OP_AND	0x1
-#define AIC_OP_XOR	0x2
-#define	AIC_OP_ADD	0x3
-#define	AIC_OP_ADC	0x4
-#define	AIC_OP_ROL	0x5
-#define	AIC_OP_BMOV	0x6
-
-#define	AIC_OP_JMP	0x8
-#define AIC_OP_JC	0x9
-#define AIC_OP_JNC	0xa
-#define AIC_OP_CALL	0xb
-#define	AIC_OP_JNE	0xc
-#define	AIC_OP_JNZ	0xd
-#define	AIC_OP_JE	0xe
-#define	AIC_OP_JZ	0xf
-
-/* Pseudo Ops */
-#define	AIC_OP_SHL	0x10
-#define	AIC_OP_SHR	0x20
-#define	AIC_OP_ROR	0x30