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authorYoshihiro Takahashi <nyan@FreeBSD.org>2002-02-03 14:08:47 +0000
committerYoshihiro Takahashi <nyan@FreeBSD.org>2002-02-03 14:08:47 +0000
commit2c3fdf40dd1ff02032023b2914b7cb2e3cd130f4 (patch)
tree1bbf7b871aca5057f2effd3b4a786b7395cbf051 /sys
parent8457377a5af8790c783920eaf121bc4043567b39 (diff)
Notes
Diffstat (limited to 'sys')
-rw-r--r--sys/isa/fdc.h17
-rw-r--r--sys/pc98/pc98/fd.c105
-rw-r--r--sys/pc98/pc98/fdreg.h29
3 files changed, 106 insertions, 45 deletions
diff --git a/sys/isa/fdc.h b/sys/isa/fdc.h
index a1d408d5b49a..c9a4121253d1 100644
--- a/sys/isa/fdc.h
+++ b/sys/isa/fdc.h
@@ -60,23 +60,40 @@ struct fdc_data
int fdu; /* the active drive */
int state;
int retry;
+#ifndef PC98
int fdout; /* mirror of the w/o digital output reg */
+#endif
u_int status[7]; /* copy of the registers */
enum fdc_type fdct; /* chip version of FDC */
int fdc_errs; /* number of logged errors */
struct buf_queue_head head;
struct buf *bp; /* active buffer */
int dma_overruns; /* number of DMA overruns */
+#ifdef PC98
+ struct resource *res_ioport, *res_fdsio, *res_fdemsio;
+ struct resource *res_irq, *res_drq;
+ int rid_ioport, rid_irq, rid_drq;
+#else
struct resource *res_ioport, *res_ctl, *res_irq, *res_drq;
int rid_ioport, rid_ctl, rid_irq, rid_drq;
+#endif
int port_off;
bus_space_tag_t portt;
bus_space_handle_t porth;
+#ifdef PC98
+ bus_space_tag_t sc_fdsiot;
+ bus_space_handle_t sc_fdsioh;
+ bus_space_tag_t sc_fdemsiot;
+ bus_space_handle_t sc_fdemsioh;
+#else
bus_space_tag_t ctlt;
bus_space_handle_t ctlh;
+#endif
void *fdc_intr;
struct device *fdc_dev;
+#ifndef PC98
void (*fdctl_wr)(struct fdc_data *fdc, u_int8_t v);
+#endif
};
/***********************************************************************\
diff --git a/sys/pc98/pc98/fd.c b/sys/pc98/pc98/fd.c
index 64e92b7df1e8..3754178177a2 100644
--- a/sys/pc98/pc98/fd.c
+++ b/sys/pc98/pc98/fd.c
@@ -198,6 +198,10 @@ static struct fd_type fd_types[NUMTYPES] =
};
#ifdef PC98
+static bus_addr_t fdc_iat[] = {0, 2, 4};
+#endif
+
+#ifdef PC98
#define DRVS_PER_CTLR 4 /* 4 floppies */
#else
#define DRVS_PER_CTLR 2 /* 2 floppies */
@@ -287,13 +291,8 @@ static inline u_short
nrd_info(addr)
nrd_t addr;
{
- u_short tmp;
-
nrd_addr(addr);
- outb(0x43f, 0x42);
- tmp = (short)inw(P_NRD_DATA);
- outb(0x43f, 0x40);
- return ((u_short)tmp);
+ return (epson_inw(P_NRD_DATA));
}
#endif /* EPSON_NRDISK */
@@ -375,11 +374,13 @@ static int volatile fd_debug = 0;
#define TRACE1(arg1, arg2)
#endif /* FDC_DEBUG */
+#ifndef PC98
static void
fdout_wr(fdc_p fdc, u_int8_t v)
{
bus_space_write_1(fdc->portt, fdc->porth, FDOUT+fdc->port_off, v);
}
+#endif
static u_int8_t
fdsts_rd(fdc_p fdc)
@@ -399,6 +400,14 @@ fddata_rd(fdc_p fdc)
return bus_space_read_1(fdc->portt, fdc->porth, FDDATA+fdc->port_off);
}
+#ifdef PC98
+static void
+fdctl_wr(fdc_p fdc, u_int8_t v)
+{
+ bus_space_write_1(fdc->portt, fdc->porth, FDCTL, v);
+}
+#endif
+
#ifndef PC98
static void
fdctl_wr_isa(fdc_p fdc, u_int8_t v)
@@ -667,9 +676,10 @@ static int pc98_trans_prev = 0;
static void set_density(fdc_p fdc)
{
/* always motor on */
- outb(IO_FDPORT, (pc98_trans != 1 ? FDP_FDDEXC : 0) | FDP_PORTEXC);
+ bus_space_write_1(fdc->sc_fdsiot, fdc->sc_fdsioh, 0,
+ (pc98_trans != 1 ? FDP_FDDEXC : 0) | FDP_PORTEXC);
DELAY(100);
- fdout_wr(fdc, FDO_RST | FDO_DMAE);
+ fdctl_wr(fdc, FDC_RST | FDC_DMAE);
/* in the case of note W, always inhibit 100ms timer */
}
@@ -692,7 +702,7 @@ static int pc98_fd_check_ready(fdu_t fdu)
out_fdc(fdc, fdu); /* Drive number */
DELAY(100);
if ((in_fdc(fdc) & NE7_ST3_RD)){
- fdout_wr(fdc, FDO_DMAE | FDO_MTON);
+ fdctl_wr(fdc, FDC_DMAE | FDC_MTON);
DELAY(10);
return 0;
}
@@ -706,7 +716,9 @@ fdc_alloc_resources(struct fdc_data *fdc)
{
device_t dev;
int ispnp, ispcmcia;
-
+#ifdef PC98
+ int rid;
+#endif
dev = fdc->fdc_dev;
ispnp = (fdc->flags & FDC_ISPNP) != 0;
ispcmcia = (fdc->flags & FDC_ISPCMCIA) != 0;
@@ -714,10 +726,9 @@ fdc_alloc_resources(struct fdc_data *fdc)
fdc->res_ioport = fdc->res_irq = fdc->res_drq = 0;
#ifdef PC98
- fdc->res_ioport = bus_alloc_resource(dev, SYS_RES_IOPORT,
- &fdc->rid_ioport, 0ul, ~0ul,
- ispnp ? 1 : IO_FDCSIZE,
- RF_ACTIVE);
+ fdc->res_ioport = isa_alloc_resourcev(dev, SYS_RES_IOPORT,
+ &fdc->rid_ioport, fdc_iat,
+ 3, RF_ACTIVE);
#else
/*
* On standard ISA, we don't just use an 8 port range
@@ -739,9 +750,32 @@ fdc_alloc_resources(struct fdc_data *fdc)
device_printf(dev, "cannot reserve I/O port range\n");
return ENXIO;
}
+#ifdef PC98
+ isa_load_resourcev(fdc->res_ioport, fdc_iat, 3);
+#endif
fdc->portt = rman_get_bustag(fdc->res_ioport);
fdc->porth = rman_get_bushandle(fdc->res_ioport);
+#ifdef PC98
+ rid = 3;
+ bus_set_resource(dev, SYS_RES_IOPORT, rid, IO_FDPORT, 1);
+ fdc->res_fdsio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0,
+ 1, RF_ACTIVE);
+ if (fdc->res_fdsio == 0)
+ return ENXIO;
+ fdc->sc_fdsiot = rman_get_bustag(fdc->res_fdsio);
+ fdc->sc_fdsioh = rman_get_bushandle(fdc->res_fdsio);
+
+ rid = 4;
+ bus_set_resource(dev, SYS_RES_IOPORT, rid, 0x4be, 1);
+ fdc->res_fdemsio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0,
+ 1, RF_ACTIVE);
+ if (fdc->res_fdemsio == 0)
+ return ENXIO;
+ fdc->sc_fdemsiot = rman_get_bustag(fdc->res_fdemsio);
+ fdc->sc_fdemsioh = rman_get_bushandle(fdc->res_fdemsio);
+#endif
+
#ifndef PC98
if (!ispcmcia) {
/*
@@ -835,6 +869,18 @@ fdc_release_resources(struct fdc_data *fdc)
fdc->res_ctl);
}
#endif
+#ifdef PC98
+ if (fdc->res_fdsio != 0) {
+ bus_deactivate_resource(dev, SYS_RES_IOPORT, 3,
+ fdc->res_fdsio);
+ bus_release_resource(dev, SYS_RES_IOPORT, 3, fdc->res_fdsio);
+ }
+ if (fdc->res_fdemsio != 0) {
+ bus_deactivate_resource(dev, SYS_RES_IOPORT, 4,
+ fdc->res_fdemsio);
+ bus_release_resource(dev, SYS_RES_IOPORT, 4, fdc->res_fdemsio);
+ }
+#endif
if (fdc->res_ioport != 0) {
bus_deactivate_resource(dev, SYS_RES_IOPORT, fdc->rid_ioport,
fdc->res_ioport);
@@ -1342,8 +1388,10 @@ fd_probe(device_t dev)
case FDT_144M:
/* Check 3mode I/F */
fd->pc98_trans = 0;
- outb(0x4be, (fd->fdu << 5) | 0x10);
- if (!(inb(0x4be) & 0x01)) {
+ bus_space_write_1(fdc->sc_fdemsiot, fdc->sc_fdemsioh, 0,
+ (fd->fdu << 5) | 0x10);
+ if (!(bus_space_read_1(fdc->sc_fdemsiot, fdc->sc_fdemsioh, 0) &
+ 0x01)) {
device_set_desc(dev, "1.44M FDD");
fd->type = FD_1440;
break;
@@ -1473,14 +1521,15 @@ DRIVER_MODULE(fd, fdc, fd_driver, fd_devclass, 0, 0);
static void
set_motor(struct fdc_data *fdc, int fdsu, int turnon)
{
- int fdout = fdc->fdout;
- int needspecify = 0;
-
#ifdef PC98
- outb(IO_FDPORT, (pc98_trans != 1 ? FDP_FDDEXC : 0)|FDP_PORTEXC);
+ bus_space_write_1(fdc->sc_fdsiot, fdc->sc_fdsioh, 0,
+ (pc98_trans != 1 ? FDP_FDDEXC : 0) | FDP_PORTEXC);
DELAY(10);
- fdout = FDO_DMAE|FDO_MTON;
+ fdctl_wr(fdc, FDC_DMAE | FDC_MTON);
#else
+ int fdout = fdc->fdout;
+ int needspecify = 0;
+
if(turnon) {
fdout &= ~FDO_FDSEL;
fdout |= (FDO_MOEN0 << fdsu) + fdsu;
@@ -1497,7 +1546,6 @@ set_motor(struct fdc_data *fdc, int fdsu, int turnon)
needspecify = 1;
fdout |= (FDO_FRST|FDO_FDMAEN);
}
-#endif
fdout_wr(fdc, fdout);
fdc->fdout = fdout;
@@ -1522,6 +1570,7 @@ set_motor(struct fdc_data *fdc, int fdsu, int turnon)
if (fdc->flags & FDC_HAS_FIFO)
(void) enable_fifo(fdc);
}
+#endif
}
static void
@@ -1585,11 +1634,11 @@ fdc_reset(fdc_p fdc)
#ifdef PC98
set_density(fdc);
if (pc98_machine_type & M_EPSON_PC98)
- fdout_wr(fdc, 0xe8);
+ fdctl_wr(fdc, FDC_RST | FDC_RDY | FDC_DD | FDC_MTON);
else
- fdout_wr(fdc, 0xd8);
+ fdctl_wr(fdc, FDC_RST | FDC_RDY | FDC_DMAE | FDC_MTON);
DELAY(200);
- fdout_wr(fdc, 0x18);
+ fdctl_wr(fdc, FDC_DMAE | FDC_MTON);
DELAY(10);
#else
fdout_wr(fdc, fdc->fdout & ~(FDO_FRST|FDO_FDMAEN));
@@ -2082,7 +2131,11 @@ fdstate(fdc_p fdc)
}
if (pc98_trans != fd->pc98_trans) {
if (fd->type == FD_1440) {
- outb(0x4be, (fdu << 5) | 0x10 | (pc98_trans >> 1));
+ bus_space_write_1(fdc->sc_fdemsiot,
+ fdc->sc_fdemsioh,
+ 0,
+ (fdu << 5) | 0x10 |
+ (pc98_trans >> 1));
outb(0x5f, 0);
outb(0x5f, 0);
}
diff --git a/sys/pc98/pc98/fdreg.h b/sys/pc98/pc98/fdreg.h
index 1a8d2b0d2868..c09ac3c8ea41 100644
--- a/sys/pc98/pc98/fdreg.h
+++ b/sys/pc98/pc98/fdreg.h
@@ -44,24 +44,15 @@
#ifdef PC98
/* registers */
#define FDSTS 0 /* NEC 765 Main Status Register (R) */
-#define FDDATA 2 /* NEC 765 Data Register (R/W) */
-#define FDOUT 4 /* Digital Output Register (W) */
-#define FDO_RST 0x80 /* FDC RESET */
-#define FDO_FRY 0x40 /* force READY */
-#define FDO_AIE 0x20 /* Attention Interrupt Enable */
-#define FDO_DD 0x20 /* FDD Mode Exchange 0:1M 1:640K */
-#define FDO_DMAE 0x10 /* enable floppy DMA */
-#define FDO_MTON 0x08 /* MOTOR ON (when EMTON=1)*/
-#define FDO_TMSK 0x04 /* TIMER MASK */
-#define FDO_TTRG 0x01 /* TIMER TRIGER */
-
-#define FDIN 4 /* Digital Input Register (R) */
-#define FDI_TYP0 0x04 /* FDD #1/#2 TYPE */
-#define FDI_TYP1 0x08 /* FDD #3/#4 TYPE */
-#define FDI_RDY 0x10 /* Ready */
-#define FDI_DMACH 0x20 /* DMA Channel */
-#define FDI_FINT0 0x40 /* Interrupt */
-#define FDI_FINT1 0x80 /* Interrupt */
+#define FDDATA 1 /* NEC 765 Data Register (R/W) */
+#define FDCTL 2 /* FD Control Register */
+#define FDC_RST 0x80 /* FDC RESET */
+#define FDC_RDY 0x40 /* force READY */
+#define FDC_DD 0x20 /* FDD Mode Exchange 0:1M 1:640K */
+#define FDC_DMAE 0x10 /* enable floppy DMA */
+#define FDC_MTON 0x08 /* MOTOR ON (when EMTON=1)*/
+#define FDC_TMSK 0x04 /* TIMER MASK */
+#define FDC_TTRG 0x01 /* TIMER TRIGER */
#define FDP_EMTON 0x04 /* enable MTON */
#define FDP_FDDEXC 0x02 /* FDD Mode Exchange 1:1M 0:640K */
@@ -81,6 +72,7 @@
#define FDSTS 4 /* NEC 765 Main Status Register (R) */
#define FDDATA 5 /* NEC 765 Data Register (R/W) */
#define FDCTL 7 /* Control Register (W) */
+#endif /* PC98 */
#ifndef FDC_500KBPS
# define FDC_500KBPS 0x00 /* 500KBPS MFM drive transfer rate */
@@ -89,7 +81,6 @@
# define FDC_125KBPS 0x03 /* 125KBPS FM drive transfer rate */
/* for some controllers 1MPBS instead */
#endif /* FDC_500KBPS */
-#endif /* PC98 */
/*
* this is the secret PIO data port (offset from base)