vendor/llvm/llvm-trunk-r257626

3 files changed, 313 insertions, 0 deletions

diff --git a/test/CodeGen/AArch64/arm64-misched-memdep-bug.ll b/test/CodeGen/AArch64/arm64-misched-memdep-bug.ll
new file mode 100644
index 000000000000..770521b75280
--- /dev/null
+++ b/test/CodeGen/AArch64/arm64-misched-memdep-bug.ll
@@ -0,0 +1,22 @@
+; REQUIRES: asserts
+; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a57 -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s
+;
+; Test for bug in misched memory dependency calculation.
+;
+; CHECK: ********** MI Scheduling **********
+; CHECK: misched_bug:BB#0 entry
+; CHECK: SU(2):   %vreg2<def> = LDRWui %vreg0, 1; mem:LD4[%ptr1_plus1] GPR32:%vreg2 GPR64common:%vreg0
+; CHECK:   Successors:
+; CHECK-NEXT:    val SU(5): Latency=4 Reg=%vreg2
+; CHECK-NEXT:    ch  SU(4): Latency=0
+; CHECK: SU(4):   STRWui %WZR, %vreg1, 0; mem:ST4[%ptr2] GPR64common:%vreg1
+; CHECK: SU(5):   %W0<def> = COPY %vreg2; GPR32:%vreg2
+; CHECK: ** ScheduleDAGMI::schedule picking next node
+define i32 @misched_bug(i32* %ptr1, i32* %ptr2) {
+entry:
+  %ptr1_plus1 = getelementptr inbounds i32, i32* %ptr1, i64 1
+  %val1 = load i32, i32* %ptr1_plus1, align 4
+  store i32 0, i32* %ptr1, align 4
+  store i32 0, i32* %ptr2, align 4
+  ret i32 %val1
+}
diff --git a/test/CodeGen/AArch64/branch-folder-merge-mmos.ll b/test/CodeGen/AArch64/branch-folder-merge-mmos.ll
new file mode 100644
index 000000000000..3f9c0239fe41
--- /dev/null
+++ b/test/CodeGen/AArch64/branch-folder-merge-mmos.ll
@@ -0,0 +1,33 @@
+; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o /dev/null < %s | FileCheck %s
+target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
+
+; Function Attrs: norecurse nounwind
+define void @foo(i32 %a, i32 %b, float* nocapture %foo_arr) #0 {
+; CHECK: (load 4 from %ir.arrayidx1.{{i[1-2]}}), (load 4 from %ir.arrayidx1.{{i[1-2]}})
+entry:
+  %cmp = icmp sgt i32 %a, 0
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+  %0 = load float, float* %foo_arr, align 4
+  %arrayidx1.i1 = getelementptr inbounds float, float* %foo_arr, i64 1
+  %1 = load float, float* %arrayidx1.i1, align 4
+  %sub.i = fsub float %0, %1
+  store float %sub.i, float* %foo_arr, align 4
+  br label %if.end3
+
+if.end:                                           ; preds = %entry
+  %cmp1 = icmp sgt i32 %b, 0
+  br i1 %cmp1, label %if.then2, label %if.end3
+
+if.then2:                                         ; preds = %if.end
+  %2 = load float, float* %foo_arr, align 4
+  %arrayidx1.i2 = getelementptr inbounds float, float* %foo_arr, i64 1
+  %3 = load float, float* %arrayidx1.i2, align 4
+  %sub.i3 = fsub float %2, %3
+  store float %sub.i3, float* %foo_arr, align 4
+  br label %if.end3
+
+if.end3:                                          ; preds = %if.then2, %if.end, %if.then
+  ret void
+}
diff --git a/test/CodeGen/AArch64/machine-combiner.ll b/test/CodeGen/AArch64/machine-combiner.ll
new file mode 100644
index 000000000000..56a742fd6c3a
--- /dev/null
+++ b/test/CodeGen/AArch64/machine-combiner.ll
@@ -0,0 +1,258 @@
+; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=cortex-a57 -enable-unsafe-fp-math < %s | FileCheck %s 
+
+; Verify that the first two adds are independent regardless of how the inputs are
+; commuted. The destination registers are used as source registers for the third add.
+
+define float @reassociate_adds1(float %x0, float %x1, float %x2, float %x3) {
+; CHECK-LABEL:   reassociate_adds1:
+; CHECK:         fadd  s0, s0, s1
+; CHECK-NEXT:    fadd  s1, s2, s3
+; CHECK-NEXT:    fadd  s0, s0, s1
+; CHECK-NEXT:    ret
+  %t0 = fadd float %x0, %x1
+  %t1 = fadd float %t0, %x2
+  %t2 = fadd float %t1, %x3
+  ret float %t2
+}
+
+define float @reassociate_adds2(float %x0, float %x1, float %x2, float %x3) {
+; CHECK-LABEL:   reassociate_adds2:
+; CHECK:         fadd  s0, s0, s1
+; CHECK-NEXT:    fadd  s1, s2, s3
+; CHECK-NEXT:    fadd  s0, s0, s1
+; CHECK-NEXT:    ret
+  %t0 = fadd float %x0, %x1
+  %t1 = fadd float %x2, %t0
+  %t2 = fadd float %t1, %x3
+  ret float %t2
+}
+
+define float @reassociate_adds3(float %x0, float %x1, float %x2, float %x3) {
+; CHECK-LABEL:   reassociate_adds3:
+; CHECK:         s0, s0, s1
+; CHECK-NEXT:    s1, s2, s3
+; CHECK-NEXT:    s0, s0, s1
+; CHECK-NEXT:    ret
+  %t0 = fadd float %x0, %x1
+  %t1 = fadd float %t0, %x2
+  %t2 = fadd float %x3, %t1
+  ret float %t2
+}
+
+define float @reassociate_adds4(float %x0, float %x1, float %x2, float %x3) {
+; CHECK-LABEL:   reassociate_adds4:
+; CHECK:         s0, s0, s1
+; CHECK-NEXT:    s1, s2, s3
+; CHECK-NEXT:    s0, s0, s1
+; CHECK-NEXT:    ret
+  %t0 = fadd float %x0, %x1
+  %t1 = fadd float %x2, %t0
+  %t2 = fadd float %x3, %t1
+  ret float %t2
+}
+
+; Verify that we reassociate some of these ops. The optimal balanced tree of adds is not
+; produced because that would cost more compile time.
+
+define float @reassociate_adds5(float %x0, float %x1, float %x2, float %x3, float %x4, float %x5, float %x6, float %x7) {
+; CHECK-LABEL:   reassociate_adds5:
+; CHECK:         fadd  s0, s0, s1
+; CHECK-NEXT:    fadd  s1, s2, s3
+; CHECK-NEXT:    fadd  s0, s0, s1
+; CHECK-NEXT:    fadd  s1, s4, s5
+; CHECK-NEXT:    fadd  s1, s1, s6
+; CHECK-NEXT:    fadd  s0, s0, s1
+; CHECK-NEXT:    fadd  s0, s0, s7
+; CHECK-NEXT:    ret
+  %t0 = fadd float %x0, %x1
+  %t1 = fadd float %t0, %x2
+  %t2 = fadd float %t1, %x3
+  %t3 = fadd float %t2, %x4
+  %t4 = fadd float %t3, %x5
+  %t5 = fadd float %t4, %x6
+  %t6 = fadd float %t5, %x7
+  ret float %t6
+}
+
+; Verify that we only need two associative operations to reassociate the operands.
+; Also, we should reassociate such that the result of the high latency division
+; is used by the final 'add' rather than reassociating the %x3 operand with the
+; division. The latter reassociation would not improve anything.
+
+define float @reassociate_adds6(float %x0, float %x1, float %x2, float %x3) {
+; CHECK-LABEL:   reassociate_adds6:
+; CHECK:         fdiv  s0, s0, s1
+; CHECK-NEXT:    fadd  s1, s2, s3
+; CHECK-NEXT:    fadd  s0, s0, s1
+; CHECK-NEXT:    ret
+  %t0 = fdiv float %x0, %x1
+  %t1 = fadd float %x2, %t0
+  %t2 = fadd float %x3, %t1
+  ret float %t2
+}
+
+; Verify that scalar single-precision multiplies are reassociated.
+
+define float @reassociate_muls1(float %x0, float %x1, float %x2, float %x3) {
+; CHECK-LABEL:   reassociate_muls1:
+; CHECK:         fdiv  s0, s0, s1
+; CHECK-NEXT:    fmul  s1, s2, s3
+; CHECK-NEXT:    fmul  s0, s0, s1
+; CHECK-NEXT:    ret
+  %t0 = fdiv float %x0, %x1
+  %t1 = fmul float %x2, %t0
+  %t2 = fmul float %x3, %t1
+  ret float %t2
+}
+
+; Verify that scalar double-precision adds are reassociated.
+
+define double @reassociate_adds_double(double %x0, double %x1, double %x2, double %x3) {
+; CHECK-LABEL:   reassociate_adds_double:
+; CHECK:         fdiv  d0, d0, d1
+; CHECK-NEXT:    fadd  d1, d2, d3
+; CHECK-NEXT:    fadd  d0, d0, d1
+; CHECK-NEXT:    ret
+  %t0 = fdiv double %x0, %x1
+  %t1 = fadd double %x2, %t0
+  %t2 = fadd double %x3, %t1
+  ret double %t2
+}
+
+; Verify that scalar double-precision multiplies are reassociated.
+
+define double @reassociate_muls_double(double %x0, double %x1, double %x2, double %x3) {
+; CHECK-LABEL:   reassociate_muls_double:
+; CHECK:         fdiv  d0, d0, d1
+; CHECK-NEXT:    fmul  d1, d2, d3
+; CHECK-NEXT:    fmul  d0, d0, d1
+; CHECK-NEXT:    ret
+  %t0 = fdiv double %x0, %x1
+  %t1 = fmul double %x2, %t0
+  %t2 = fmul double %x3, %t1
+  ret double %t2
+}
+
+; Verify that we reassociate vector instructions too.
+
+define <4 x float> @vector_reassociate_adds1(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {
+; CHECK-LABEL:   vector_reassociate_adds1:
+; CHECK:         fadd  v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    fadd  v1.4s, v2.4s, v3.4s
+; CHECK-NEXT:    fadd  v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    ret
+  %t0 = fadd <4 x float> %x0, %x1
+  %t1 = fadd <4 x float> %t0, %x2
+  %t2 = fadd <4 x float> %t1, %x3
+  ret <4 x float> %t2
+}
+
+define <4 x float> @vector_reassociate_adds2(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {
+; CHECK-LABEL:   vector_reassociate_adds2:
+; CHECK:         fadd  v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    fadd  v1.4s, v2.4s, v3.4s
+; CHECK-NEXT:    fadd  v0.4s, v0.4s, v1.4s
+  %t0 = fadd <4 x float> %x0, %x1
+  %t1 = fadd <4 x float> %x2, %t0
+  %t2 = fadd <4 x float> %t1, %x3
+  ret <4 x float> %t2
+}
+
+define <4 x float> @vector_reassociate_adds3(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {
+; CHECK-LABEL:   vector_reassociate_adds3:
+; CHECK:         fadd  v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    fadd  v1.4s, v2.4s, v3.4s
+; CHECK-NEXT:    fadd  v0.4s, v0.4s, v1.4s
+  %t0 = fadd <4 x float> %x0, %x1
+  %t1 = fadd <4 x float> %t0, %x2
+  %t2 = fadd <4 x float> %x3, %t1
+  ret <4 x float> %t2
+}
+
+define <4 x float> @vector_reassociate_adds4(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {
+; CHECK-LABEL:   vector_reassociate_adds4:
+; CHECK:         fadd  v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    fadd  v1.4s, v2.4s, v3.4s
+; CHECK-NEXT:    fadd  v0.4s, v0.4s, v1.4s
+  %t0 = fadd <4 x float> %x0, %x1
+  %t1 = fadd <4 x float> %x2, %t0
+  %t2 = fadd <4 x float> %x3, %t1
+  ret <4 x float> %t2
+}
+; Verify that 128-bit vector single-precision multiplies are reassociated.
+
+define <4 x float> @reassociate_muls_v4f32(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, <4 x float> %x3) {
+; CHECK-LABEL:   reassociate_muls_v4f32:
+; CHECK:         fadd  v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    fmul  v1.4s, v2.4s, v3.4s
+; CHECK-NEXT:    fmul  v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    ret
+  %t0 = fadd <4 x float> %x0, %x1
+  %t1 = fmul <4 x float> %x2, %t0
+  %t2 = fmul <4 x float> %x3, %t1
+  ret <4 x float> %t2
+}
+
+; Verify that 128-bit vector double-precision multiplies are reassociated.
+
+define <2 x double> @reassociate_muls_v2f64(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, <2 x double> %x3) {
+; CHECK-LABEL:   reassociate_muls_v2f64:
+; CHECK:         fadd  v0.2d, v0.2d, v1.2d
+; CHECK-NEXT:    fmul  v1.2d, v2.2d, v3.2d
+; CHECK-NEXT:    fmul  v0.2d, v0.2d, v1.2d
+; CHECK-NEXT:    ret
+  %t0 = fadd <2 x double> %x0, %x1
+  %t1 = fmul <2 x double> %x2, %t0
+  %t2 = fmul <2 x double> %x3, %t1
+  ret <2 x double> %t2
+}
+
+; PR25016: https://llvm.org/bugs/show_bug.cgi?id=25016
+; Verify that reassociation is not happening needlessly or wrongly.
+
+declare double @bar()
+
+define double @reassociate_adds_from_calls() {
+; CHECK-LABEL: reassociate_adds_from_calls:
+; CHECK:       bl   bar
+; CHECK-NEXT:  mov  v8.16b, v0.16b 
+; CHECK-NEXT:  bl   bar
+; CHECK-NEXT:  mov  v9.16b, v0.16b
+; CHECK-NEXT:  bl   bar
+; CHECK-NEXT:  mov  v10.16b, v0.16b 
+; CHECK-NEXT:  bl   bar
+; CHECK:       fadd d1, d8, d9 
+; CHECK-NEXT:  fadd d0, d10, d0
+; CHECK-NEXT:  fadd d0, d1, d0
+  %x0 = call double @bar()
+  %x1 = call double @bar()
+  %x2 = call double @bar()
+  %x3 = call double @bar()
+  %t0 = fadd double %x0, %x1
+  %t1 = fadd double %t0, %x2
+  %t2 = fadd double %t1, %x3
+  ret double %t2
+}
+
+define double @already_reassociated() {
+; CHECK-LABEL: already_reassociated:
+; CHECK:       bl   bar
+; CHECK-NEXT:  mov  v8.16b, v0.16b 
+; CHECK-NEXT:  bl   bar
+; CHECK-NEXT:  mov  v9.16b, v0.16b
+; CHECK-NEXT:  bl   bar
+; CHECK-NEXT:  mov  v10.16b, v0.16b 
+; CHECK-NEXT:  bl   bar
+; CHECK:       fadd d1, d8, d9 
+; CHECK-NEXT:  fadd d0, d10, d0
+; CHECK-NEXT:  fadd d0, d1, d0
+  %x0 = call double @bar()
+  %x1 = call double @bar()
+  %x2 = call double @bar()
+  %x3 = call double @bar()
+  %t0 = fadd double %x0, %x1
+  %t1 = fadd double %x2, %x3
+  %t2 = fadd double %t0, %t1
+  ret double %t2
+}
+