diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2017-05-02 18:30:13 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-05-02 18:30:13 +0000 |
| commit | a303c417bbdb53703c2c17398b08486bde78f1f6 (patch) | |
| tree | 98366d6b93d863cefdc53f16c66c0c5ae7fb2261 /test/CodeGen/AMDGPU/inline-asm.ll | |
| parent | 12f3ca4cdb95b193af905a00e722a4dcb40b3de3 (diff) | |
Notes
Diffstat (limited to 'test/CodeGen/AMDGPU/inline-asm.ll')
| -rw-r--r-- | test/CodeGen/AMDGPU/inline-asm.ll | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/test/CodeGen/AMDGPU/inline-asm.ll b/test/CodeGen/AMDGPU/inline-asm.ll index 0d7e07b9a624..636b45db698d 100644 --- a/test/CodeGen/AMDGPU/inline-asm.ll +++ b/test/CodeGen/AMDGPU/inline-asm.ll @@ -232,3 +232,17 @@ entry: call void asm sideeffect "; use $0 $1 ", "{VGPR0}, {VGPR1}"(i1 %val0, i1 %val1) ret void } + +; CHECK-LABEL: {{^}}muliple_def_phys_vgpr: +; CHECK: ; def v0 +; CHECK: v_mov_b32_e32 v1, v0 +; CHECK: ; def v0 +; CHECK: v_lshlrev_b32_e32 v{{[0-9]+}}, v0, v1 +define amdgpu_kernel void @muliple_def_phys_vgpr() { +entry: + %def0 = call i32 asm sideeffect "; def $0 ", "={VGPR0}"() + %def1 = call i32 asm sideeffect "; def $0 ", "={VGPR0}"() + %add = shl i32 %def0, %def1 + store i32 %add, i32 addrspace(1)* undef + ret void +} |