Vendor import of llvm trunk r300422: - src

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author	Dimitry Andric <dim@FreeBSD.org>	2017-04-16 16:01:22 +0000
committer	Dimitry Andric <dim@FreeBSD.org>	2017-04-16 16:01:22 +0000
commit	71d5a2540a98c81f5bcaeb48805e0e2881f530ef (patch)
tree	5343938942df402b49ec7300a1c25a2d4ccd5821 /test/CodeGen/AMDGPU/sub.i16.ll
parent	31bbf64f3a4974a2d6c8b3b27ad2f519caf74057 (diff)

vendor/llvm/llvm-trunk-r300422

Notes

Diffstat (limited to 'test/CodeGen/AMDGPU/sub.i16.ll')

-rw-r--r--

test/CodeGen/AMDGPU/sub.i16.ll

1 files changed, 11 insertions, 11 deletions

diff --git a/test/CodeGen/AMDGPU/sub.i16.ll b/test/CodeGen/AMDGPU/sub.i16.ll
index b5d5f56b2796..6642411f7a63 100644
--- a/test/CodeGen/AMDGPU/sub.i16.ll
+++ b/test/CodeGen/AMDGPU/sub.i16.ll

@@ -7,7 +7,7 @@

; VI: flat_load_ushort [[B:v[0-9]+]]

; VI: v_subrev_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]]

; VI-NEXT: buffer_store_short [[ADD]]

-define void @v_test_sub_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {

+define amdgpu_kernel void @v_test_sub_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {

%tid = call i32 @llvm.amdgcn.workitem.id.x()

%gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid

%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid

@@ -24,7 +24,7 @@ define void @v_test_sub_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in0, i16

; VI: flat_load_ushort [[A:v[0-9]+]]

; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0xffffff85, [[A]]

; VI-NEXT: buffer_store_short [[ADD]]

-define void @v_test_sub_i16_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {

+define amdgpu_kernel void @v_test_sub_i16_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {

%tid = call i32 @llvm.amdgcn.workitem.id.x()

%gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid

%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid

@@ -39,7 +39,7 @@ define void @v_test_sub_i16_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %

; VI: flat_load_ushort [[A:v[0-9]+]]

; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0x34d, [[A]]

; VI-NEXT: buffer_store_short [[ADD]]

-define void @v_test_sub_i16_neg_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {

+define amdgpu_kernel void @v_test_sub_i16_neg_constant(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {

%tid = call i32 @llvm.amdgcn.workitem.id.x()

%gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid

%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid

@@ -52,9 +52,9 @@ define void @v_test_sub_i16_neg_constant(i16 addrspace(1)* %out, i16 addrspace(1

; FIXME: Need to handle non-uniform case for function below (load without gep).

; GCN-LABEL: {{^}}v_test_sub_i16_inline_63:

; VI: flat_load_ushort [[A:v[0-9]+]]

-; VI: v_add_u16_e32 [[ADD:v[0-9]+]], 0xffffffc1, [[A]]

+; VI: v_subrev_u16_e32 [[ADD:v[0-9]+]], 63, [[A]]

; VI-NEXT: buffer_store_short [[ADD]]

-define void @v_test_sub_i16_inline_63(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {

+define amdgpu_kernel void @v_test_sub_i16_inline_63(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {

%tid = call i32 @llvm.amdgcn.workitem.id.x()

%gep.out = getelementptr inbounds i16, i16 addrspace(1)* %out, i32 %tid

%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid

@@ -70,7 +70,7 @@ define void @v_test_sub_i16_inline_63(i16 addrspace(1)* %out, i16 addrspace(1)*

; VI: flat_load_ushort [[B:v[0-9]+]]

; VI: v_subrev_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]]

; VI-NEXT: buffer_store_dword [[ADD]]

-define void @v_test_sub_i16_zext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {

+define amdgpu_kernel void @v_test_sub_i16_zext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {

%tid = call i32 @llvm.amdgcn.workitem.id.x()

%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid

%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid

@@ -85,12 +85,12 @@ define void @v_test_sub_i16_zext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)

; FIXME: Need to handle non-uniform case for function below (load without gep).

; GCN-LABEL: {{^}}v_test_sub_i16_zext_to_i64:

+; VI-DAG: v_mov_b32_e32 v[[VZERO:[0-9]+]], 0

; VI: flat_load_ushort [[A:v[0-9]+]]

; VI: flat_load_ushort [[B:v[0-9]+]]

; VI-DAG: v_subrev_u16_e32 v[[ADD:[0-9]+]], [[B]], [[A]]

-; VI-DAG: v_mov_b32_e32 v[[VZERO:[0-9]+]], 0

; VI: buffer_store_dwordx2 v{{\[}}[[ADD]]:[[VZERO]]{{\]}}, off, {{s\[[0-9]+:[0-9]+\]}}, 0{{$}}

-define void @v_test_sub_i16_zext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {

+define amdgpu_kernel void @v_test_sub_i16_zext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {

%tid = call i32 @llvm.amdgcn.workitem.id.x()

%gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid

%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid

@@ -110,7 +110,7 @@ define void @v_test_sub_i16_zext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)

; VI: v_subrev_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]]

; VI-NEXT: v_bfe_i32 [[SEXT:v[0-9]+]], [[ADD]], 0, 16

; VI-NEXT: buffer_store_dword [[SEXT]]

-define void @v_test_sub_i16_sext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {

+define amdgpu_kernel void @v_test_sub_i16_sext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {

%tid = call i32 @llvm.amdgcn.workitem.id.x()

%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid

%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid

@@ -131,7 +131,7 @@ define void @v_test_sub_i16_sext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)

; VI-NEXT: v_bfe_i32 v[[LO:[0-9]+]], [[ADD]], 0, 16

; VI-NEXT: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]

; VI-NEXT: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}

-define void @v_test_sub_i16_sext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {

+define amdgpu_kernel void @v_test_sub_i16_sext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {

%tid = call i32 @llvm.amdgcn.workitem.id.x()

%gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid

%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid

@@ -149,7 +149,7 @@ define void @v_test_sub_i16_sext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)

; GCN-LABEL: {{^}}v_test_sub_i16_constant_commute:

; VI: v_subrev_u16_e32 v{{[0-9]+}}, 0x800, v{{[0-9]+}}

; CI: v_subrev_i32_e32 v{{[0-9]+}}, vcc, 0x800, v{{[0-9]+}}

-define void @v_test_sub_i16_constant_commute(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {

+define amdgpu_kernel void @v_test_sub_i16_constant_commute(i16 addrspace(1)* %out, i16 addrspace(1)* %in0) #1 {

%size = call i32 @llvm.amdgcn.groupstaticsize()

%size.trunc = trunc i32 %size to i16

call void asm sideeffect "; $0", "v"([512 x i32] addrspace(3)* @lds)