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| author | Dimitry Andric <dim@FreeBSD.org> | 2013-04-08 18:41:23 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2013-04-08 18:41:23 +0000 |
| commit | 4a16efa3e43e35f0cc9efe3a67f620f0017c3d36 (patch) | |
| tree | 06099edc18d30894081a822b756f117cbe0b8207 /test/CodeGen/ARM/alloc-no-stack-realign.ll | |
| parent | 482e7bddf617ae804dc47133cb07eb4aa81e45de (diff) | |
Diffstat (limited to 'test/CodeGen/ARM/alloc-no-stack-realign.ll')
| -rw-r--r-- | test/CodeGen/ARM/alloc-no-stack-realign.ll | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/alloc-no-stack-realign.ll b/test/CodeGen/ARM/alloc-no-stack-realign.ll new file mode 100644 index 000000000000..273041dee34e --- /dev/null +++ b/test/CodeGen/ARM/alloc-no-stack-realign.ll @@ -0,0 +1,48 @@ +; RUN: llc < %s -mtriple=armv7-apple-ios -O0 -realign-stack=0 | FileCheck %s -check-prefix=NO-REALIGN +; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s + +; rdar://12713765 +; When realign-stack is set to false, make sure we are not creating stack +; objects that are assumed to be 64-byte aligned. +@T3_retval = common global <16 x float> zeroinitializer, align 16 + +define void @test(<16 x float>* noalias sret %agg.result) nounwind ssp { +entry: +; CHECK: test +; CHECK: bic sp, sp, #63 +; CHECK: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48 +; CHECK: vst1.64 +; CHECK: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32 +; CHECK: vst1.64 +; CHECK: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16 +; CHECK: vst1.64 +; CHECK: vst1.64 +; CHECK: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48 +; CHECK: vst1.64 +; CHECK: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32 +; CHECK: vst1.64 +; CHECK: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16 +; CHECK: vst1.64 +; CHECK: vst1.64 +; NO-REALIGN: test +; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48 +; NO-REALIGN: vst1.64 +; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32 +; NO-REALIGN: vst1.64 +; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16 +; NO-REALIGN: vst1.64 +; NO-REALIGN: vst1.64 +; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48 +; NO-REALIGN: vst1.64 +; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32 +; NO-REALIGN: vst1.64 +; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16 +; NO-REALIGN: vst1.64 +; NO-REALIGN: vst1.64 + %retval = alloca <16 x float>, align 16 + %0 = load <16 x float>* @T3_retval, align 16 + store <16 x float> %0, <16 x float>* %retval + %1 = load <16 x float>* %retval + store <16 x float> %1, <16 x float>* %agg.result, align 16 + ret void +} |