diff options
| author | Roman Divacky <rdivacky@FreeBSD.org> | 2010-01-23 11:09:33 +0000 |
|---|---|---|
| committer | Roman Divacky <rdivacky@FreeBSD.org> | 2010-01-23 11:09:33 +0000 |
| commit | 989df958a10f0beb90b89ccadd8351cbe51d90b1 (patch) | |
| tree | 74eecbae571601ec6a626a53374b1eddc7b164a5 /test/CodeGen/ARM | |
| parent | 829000e035f46f2a227a5466e4e427a2f3cc00a9 (diff) | |
Notes
Diffstat (limited to 'test/CodeGen/ARM')
| -rw-r--r-- | test/CodeGen/ARM/ctz.ll | 11 | ||||
| -rw-r--r-- | test/CodeGen/ARM/indirectbr.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/ARM/vbits.ll | 12 |
3 files changed, 21 insertions, 6 deletions
diff --git a/test/CodeGen/ARM/ctz.ll b/test/CodeGen/ARM/ctz.ll new file mode 100644 index 000000000000..1d2ced37b035 --- /dev/null +++ b/test/CodeGen/ARM/ctz.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s + +declare i32 @llvm.cttz.i32(i32) + +define i32 @f1(i32 %a) { +; CHECK: f1: +; CHECK: rbit +; CHECK: clz + %tmp = call i32 @llvm.cttz.i32( i32 %a ) + ret i32 %tmp +} diff --git a/test/CodeGen/ARM/indirectbr.ll b/test/CodeGen/ARM/indirectbr.ll index cd16084dbdb3..5135d036e24b 100644 --- a/test/CodeGen/ARM/indirectbr.ll +++ b/test/CodeGen/ARM/indirectbr.ll @@ -12,6 +12,10 @@ define internal arm_apcscc i32 @foo(i32 %i) nounwind { entry: %0 = load i8** @nextaddr, align 4 ; <i8*> [#uses=2] %1 = icmp eq i8* %0, null ; <i1> [#uses=1] +; indirect branch gets duplicated here +; ARM: bx +; THUMB: mov pc, r1 +; THUMB2: mov pc, r1 br i1 %1, label %bb3, label %bb2 bb2: ; preds = %entry, %bb3 diff --git a/test/CodeGen/ARM/vbits.ll b/test/CodeGen/ARM/vbits.ll index e1d23a17b4cb..293d22938a76 100644 --- a/test/CodeGen/ARM/vbits.ll +++ b/test/CodeGen/ARM/vbits.ll @@ -442,7 +442,7 @@ define <2 x i64> @v_ornQi64(<2 x i64>* %A, <2 x i64>* %B) nounwind { define <8 x i8> @vtsti8(<8 x i8>* %A, <8 x i8>* %B) nounwind { ;CHECK: vtsti8: -;CHECK: vtst.i8 +;CHECK: vtst.8 %tmp1 = load <8 x i8>* %A %tmp2 = load <8 x i8>* %B %tmp3 = and <8 x i8> %tmp1, %tmp2 @@ -453,7 +453,7 @@ define <8 x i8> @vtsti8(<8 x i8>* %A, <8 x i8>* %B) nounwind { define <4 x i16> @vtsti16(<4 x i16>* %A, <4 x i16>* %B) nounwind { ;CHECK: vtsti16: -;CHECK: vtst.i16 +;CHECK: vtst.16 %tmp1 = load <4 x i16>* %A %tmp2 = load <4 x i16>* %B %tmp3 = and <4 x i16> %tmp1, %tmp2 @@ -464,7 +464,7 @@ define <4 x i16> @vtsti16(<4 x i16>* %A, <4 x i16>* %B) nounwind { define <2 x i32> @vtsti32(<2 x i32>* %A, <2 x i32>* %B) nounwind { ;CHECK: vtsti32: -;CHECK: vtst.i32 +;CHECK: vtst.32 %tmp1 = load <2 x i32>* %A %tmp2 = load <2 x i32>* %B %tmp3 = and <2 x i32> %tmp1, %tmp2 @@ -475,7 +475,7 @@ define <2 x i32> @vtsti32(<2 x i32>* %A, <2 x i32>* %B) nounwind { define <16 x i8> @vtstQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind { ;CHECK: vtstQi8: -;CHECK: vtst.i8 +;CHECK: vtst.8 %tmp1 = load <16 x i8>* %A %tmp2 = load <16 x i8>* %B %tmp3 = and <16 x i8> %tmp1, %tmp2 @@ -486,7 +486,7 @@ define <16 x i8> @vtstQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind { define <8 x i16> @vtstQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind { ;CHECK: vtstQi16: -;CHECK: vtst.i16 +;CHECK: vtst.16 %tmp1 = load <8 x i16>* %A %tmp2 = load <8 x i16>* %B %tmp3 = and <8 x i16> %tmp1, %tmp2 @@ -497,7 +497,7 @@ define <8 x i16> @vtstQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind { define <4 x i32> @vtstQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind { ;CHECK: vtstQi32: -;CHECK: vtst.i32 +;CHECK: vtst.32 %tmp1 = load <4 x i32>* %A %tmp2 = load <4 x i32>* %B %tmp3 = and <4 x i32> %tmp1, %tmp2 |
