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| author | Dimitry Andric <dim@FreeBSD.org> | 2011-07-17 15:36:56 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2011-07-17 15:36:56 +0000 |
| commit | 411bd29eea3c360d5b48a18a17b5e87f5671af0e (patch) | |
| tree | c8086addb211fa670a9d2b1038d8c2e453229755 /test/CodeGen/CellSPU/mul-with-overflow.ll | |
| parent | 56fe8f14099930935e3870e3e823c322a85c1c89 (diff) | |
Diffstat (limited to 'test/CodeGen/CellSPU/mul-with-overflow.ll')
| -rw-r--r-- | test/CodeGen/CellSPU/mul-with-overflow.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/CellSPU/mul-with-overflow.ll b/test/CodeGen/CellSPU/mul-with-overflow.ll index d15da12649ea..c04e69e3e193 100644 --- a/test/CodeGen/CellSPU/mul-with-overflow.ll +++ b/test/CodeGen/CellSPU/mul-with-overflow.ll @@ -1,14 +1,14 @@ ; RUN: llc < %s -march=cellspu declare {i16, i1} @llvm.smul.with.overflow.i16(i16 %a, i16 %b) -define i1 @a(i16 %x) zeroext nounwind { +define zeroext i1 @a(i16 %x) nounwind { %res = call {i16, i1} @llvm.smul.with.overflow.i16(i16 %x, i16 3) %obil = extractvalue {i16, i1} %res, 1 ret i1 %obil } declare {i16, i1} @llvm.umul.with.overflow.i16(i16 %a, i16 %b) -define i1 @b(i16 %x) zeroext nounwind { +define zeroext i1 @b(i16 %x) nounwind { %res = call {i16, i1} @llvm.umul.with.overflow.i16(i16 %x, i16 3) %obil = extractvalue {i16, i1} %res, 1 ret i1 %obil |