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| author | Dimitry Andric <dim@FreeBSD.org> | 2013-12-22 00:07:40 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2013-12-22 00:07:40 +0000 |
| commit | bfef399519ca9b8a4b4c6b563253bad7e0eeffe0 (patch) | |
| tree | df8df0b0067b381eab470a3b8f28d14a552a6340 /test/CodeGen/mips-constraints-mem.c | |
| parent | 6a0372513edbc473b538d2f724efac50405d6fef (diff) | |
Diffstat (limited to 'test/CodeGen/mips-constraints-mem.c')
| -rw-r--r-- | test/CodeGen/mips-constraints-mem.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/mips-constraints-mem.c b/test/CodeGen/mips-constraints-mem.c index ea6bcaff9730..2c3c01ac11e2 100644 --- a/test/CodeGen/mips-constraints-mem.c +++ b/test/CodeGen/mips-constraints-mem.c @@ -9,7 +9,7 @@ int foo() // 'R': An address that can be used in a non-macro load or stor' // This test will result in the higher and lower nibbles being // switched due to the lwl/lwr instruction pairs. - // CHECK: %{{[0-9]+}} = call i32 asm sideeffect "lwl $0, 1 + $1\0A\09lwr $0, 2 + $1\0A\09", "=r,*R"(i32* %{{[0-9,a-f]+}}) #1, !srcloc !0 + // CHECK: %{{[0-9]+}} = call i32 asm sideeffect "lwl $0, 1 + $1\0A\09lwr $0, 2 + $1\0A\09", "=r,*R"(i32* %{{[0-9,a-f]+}}) #1, int c = 0xffbbccdd; |