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authorDimitry Andric <dim@FreeBSD.org>2019-08-20 20:50:12 +0000
committerDimitry Andric <dim@FreeBSD.org>2019-08-20 20:50:12 +0000
commite6d1592492a3a379186bfb02bd0f4eda0669c0d5 (patch)
tree599ab169a01f1c86eda9adc774edaedde2f2db5b /utils/TableGen/CodeGenSchedule.cpp
parent1a56a5ead7a2e84bee8240f5f6b033b5f1707154 (diff)
Notes
Diffstat (limited to 'utils/TableGen/CodeGenSchedule.cpp')
-rw-r--r--utils/TableGen/CodeGenSchedule.cpp52
1 files changed, 26 insertions, 26 deletions
diff --git a/utils/TableGen/CodeGenSchedule.cpp b/utils/TableGen/CodeGenSchedule.cpp
index 6d259cbb33ee..fd007044a16e 100644
--- a/utils/TableGen/CodeGenSchedule.cpp
+++ b/utils/TableGen/CodeGenSchedule.cpp
@@ -1,9 +1,8 @@
//===- CodeGenSchedule.cpp - Scheduling MachineModels ---------------------===//
//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
@@ -369,24 +368,22 @@ processSTIPredicate(STIPredicateFunction &Fn,
[&](const OpcodeMapPair &Lhs, const OpcodeMapPair &Rhs) {
unsigned LhsIdx = Opcode2Index[Lhs.first];
unsigned RhsIdx = Opcode2Index[Rhs.first];
- std::pair<APInt, APInt> &LhsMasks = OpcodeMasks[LhsIdx];
- std::pair<APInt, APInt> &RhsMasks = OpcodeMasks[RhsIdx];
-
- if (LhsMasks.first != RhsMasks.first) {
- if (LhsMasks.first.countPopulation() <
- RhsMasks.first.countPopulation())
- return true;
- return LhsMasks.first.countLeadingZeros() >
- RhsMasks.first.countLeadingZeros();
- }
-
- if (LhsMasks.second != RhsMasks.second) {
- if (LhsMasks.second.countPopulation() <
- RhsMasks.second.countPopulation())
- return true;
- return LhsMasks.second.countLeadingZeros() >
- RhsMasks.second.countLeadingZeros();
- }
+ const std::pair<APInt, APInt> &LhsMasks = OpcodeMasks[LhsIdx];
+ const std::pair<APInt, APInt> &RhsMasks = OpcodeMasks[RhsIdx];
+
+ auto LessThan = [](const APInt &Lhs, const APInt &Rhs) {
+ unsigned LhsCountPopulation = Lhs.countPopulation();
+ unsigned RhsCountPopulation = Rhs.countPopulation();
+ return ((LhsCountPopulation < RhsCountPopulation) ||
+ ((LhsCountPopulation == RhsCountPopulation) &&
+ (Lhs.countLeadingZeros() > Rhs.countLeadingZeros())));
+ };
+
+ if (LhsMasks.first != RhsMasks.first)
+ return LessThan(LhsMasks.first, RhsMasks.first);
+
+ if (LhsMasks.second != RhsMasks.second)
+ return LessThan(LhsMasks.second, RhsMasks.second);
return LhsIdx < RhsIdx;
});
@@ -1936,8 +1933,10 @@ void CodeGenSchedModels::checkCompleteness() {
unsigned SCIdx = getSchedClassIdx(*Inst);
if (!SCIdx) {
if (Inst->TheDef->isValueUnset("SchedRW") && !HadCompleteModel) {
- PrintError("No schedule information for instruction '"
- + Inst->TheDef->getName() + "'");
+ PrintError(Inst->TheDef->getLoc(),
+ "No schedule information for instruction '" +
+ Inst->TheDef->getName() + "' in SchedMachineModel '" +
+ ProcModel.ModelDef->getName() + "'");
Complete = false;
}
continue;
@@ -1955,8 +1954,9 @@ void CodeGenSchedModels::checkCompleteness() {
return R->getValueAsDef("SchedModel") == ProcModel.ModelDef;
});
if (I == InstRWs.end()) {
- PrintError("'" + ProcModel.ModelName + "' lacks information for '" +
- Inst->TheDef->getName() + "'");
+ PrintError(Inst->TheDef->getLoc(), "'" + ProcModel.ModelName +
+ "' lacks information for '" +
+ Inst->TheDef->getName() + "'");
Complete = false;
}
}