diff options
Diffstat (limited to 'Bindings/net')
45 files changed, 937 insertions, 20 deletions
diff --git a/Bindings/net/adi,adin.yaml b/Bindings/net/adi,adin.yaml index d95cc691a65f..1129f2b58e98 100644 --- a/Bindings/net/adi,adin.yaml +++ b/Bindings/net/adi,adin.yaml @@ -36,6 +36,8 @@ properties: enum: [ 4, 8, 12, 16, 20, 24 ] default: 8 +unevaluatedProperties: false + examples: - | ethernet { diff --git a/Bindings/net/amlogic,meson-dwmac.yaml b/Bindings/net/amlogic,meson-dwmac.yaml index 85fefe3a0444..6b057b117aa0 100644 --- a/Bindings/net/amlogic,meson-dwmac.yaml +++ b/Bindings/net/amlogic,meson-dwmac.yaml @@ -120,6 +120,8 @@ required: - clock-names - phy-mode +unevaluatedProperties: false + examples: - | ethmac: ethernet@c9410000 { diff --git a/Bindings/net/aspeed,ast2600-mdio.yaml b/Bindings/net/aspeed,ast2600-mdio.yaml index 71808e78a495..1c88820cbcdf 100644 --- a/Bindings/net/aspeed,ast2600-mdio.yaml +++ b/Bindings/net/aspeed,ast2600-mdio.yaml @@ -30,6 +30,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | mdio0: mdio@1e650000 { diff --git a/Bindings/net/brcm,bcm7445-switch-v4.0.txt b/Bindings/net/brcm,bcm7445-switch-v4.0.txt index 88b57b0ca1f4..97ca62b0e14d 100644 --- a/Bindings/net/brcm,bcm7445-switch-v4.0.txt +++ b/Bindings/net/brcm,bcm7445-switch-v4.0.txt @@ -50,6 +50,13 @@ Optional properties: - reset-names: If the "reset" property is specified, this property should have the value "switch" to denote the switch reset line. +- clocks: when provided, the first phandle is to the switch's main clock and + is valid for both BCM7445 and BCM7278. The second phandle is only applicable + to BCM7445 and is to support dividing the switch core clock. + +- clock-names: when provided, the first phandle must be "sw_switch", and the + second must be named "sw_switch_mdiv". + Port subnodes: Optional properties: diff --git a/Bindings/net/brcm,systemport.txt b/Bindings/net/brcm,systemport.txt index 83f29e0e11ba..75736739bfdd 100644 --- a/Bindings/net/brcm,systemport.txt +++ b/Bindings/net/brcm,systemport.txt @@ -20,6 +20,11 @@ Optional properties: - systemport,num-tier1-arb: number of tier 1 arbiters, an integer - systemport,num-txq: number of HW transmit queues, an integer - systemport,num-rxq: number of HW receive queues, an integer +- clocks: When provided, must be two phandles to the functional clocks nodes of + the SYSTEMPORT block. The first phandle is the main SYSTEMPORT clock used + during normal operation, while the second phandle is the Wake-on-LAN clock. +- clock-names: When provided, names of the functional clock phandles, first + name should be "sw_sysport" and second should be "sw_sysportwol". Example: ethernet@f04a0000 { diff --git a/Bindings/net/can/can-controller.yaml b/Bindings/net/can/can-controller.yaml new file mode 100644 index 000000000000..9cf2ae097156 --- /dev/null +++ b/Bindings/net/can/can-controller.yaml @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/can-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CAN Controller Generic Binding + +maintainers: + - Marc Kleine-Budde <mkl@pengutronix.de> + +properties: + $nodename: + pattern: "^can(@.*)?$" + +additionalProperties: true + +... diff --git a/Bindings/net/can/can-transceiver.yaml b/Bindings/net/can/can-transceiver.yaml index 6396977d29e5..d1ef1fe6ab29 100644 --- a/Bindings/net/can/can-transceiver.yaml +++ b/Bindings/net/can/can-transceiver.yaml @@ -16,3 +16,5 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: a positive non 0 value that determines the max speed that CAN/CAN-FD can run. minimum: 1 + +additionalProperties: true diff --git a/Bindings/net/can/fsl,flexcan.yaml b/Bindings/net/can/fsl,flexcan.yaml new file mode 100644 index 000000000000..13875eab2ed6 --- /dev/null +++ b/Bindings/net/can/fsl,flexcan.yaml @@ -0,0 +1,139 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC). + +maintainers: + - Marc Kleine-Budde <mkl@pengutronix.de> + +allOf: + - $ref: can-controller.yaml# + +properties: + compatible: + oneOf: + - enum: + - fsl,imx8qm-flexcan + - fsl,imx8mp-flexcan + - fsl,imx6q-flexcan + - fsl,imx28-flexcan + - fsl,imx25-flexcan + - fsl,p1010-flexcan + - fsl,vf610-flexcan + - fsl,ls1021ar2-flexcan + - fsl,lx2160ar1-flexcan + - items: + - enum: + - fsl,imx53-flexcan + - fsl,imx35-flexcan + - const: fsl,imx25-flexcan + - items: + - enum: + - fsl,imx7d-flexcan + - fsl,imx6ul-flexcan + - fsl,imx6sx-flexcan + - const: fsl,imx6q-flexcan + - items: + - enum: + - fsl,ls1028ar1-flexcan + - const: fsl,lx2160ar1-flexcan + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: ipg + - const: per + + clock-frequency: + description: | + The oscillator frequency driving the flexcan device, filled in by the + boot loader. This property should only be used the used operating system + doesn't support the clocks and clock-names property. + + xceiver-supply: + description: Regulator that powers the CAN transceiver. + + big-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: | + This means the registers of FlexCAN controller are big endian. This is + optional property.i.e. if this property is not present in device tree + node then controller is assumed to be little endian. If this property is + present then controller is assumed to be big endian. + + fsl,stop-mode: + description: | + Register bits of stop mode control. + + The format should be as follows: + <gpr req_gpr req_bit> + gpr is the phandle to general purpose register node. + req_gpr is the gpr register offset of CAN stop request. + req_bit is the bit offset of CAN stop request. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: The 'gpr' is the phandle to general purpose register node. + - description: The 'req_gpr' is the gpr register offset of CAN stop request. + maximum: 0xff + - description: The 'req_bit' is the bit offset of CAN stop request. + maximum: 0x1f + + fsl,clk-source: + description: | + Select the clock source to the CAN Protocol Engine (PE). It's SoC + implementation dependent. Refer to RM for detailed definition. If this + property is not set in device tree node then driver selects clock source 1 + by default. + 0: clock source 0 (oscillator clock) + 1: clock source 1 (peripheral clock) + $ref: /schemas/types.yaml#/definitions/uint32 + default: 1 + minimum: 0 + maximum: 1 + + wakeup-source: + $ref: /schemas/types.yaml#/definitions/flag + description: + Enable CAN remote wakeup. + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + can@1c000 { + compatible = "fsl,p1010-flexcan"; + reg = <0x1c000 0x1000>; + interrupts = <48 0x2>; + interrupt-parent = <&mpic>; + clock-frequency = <200000000>; + fsl,clk-source = <0>; + }; + - | + #include <dt-bindings/interrupt-controller/irq.h> + + can@2090000 { + compatible = "fsl,imx6q-flexcan"; + reg = <0x02090000 0x4000>; + interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 1>, <&clks 2>; + clock-names = "ipg", "per"; + fsl,stop-mode = <&gpr 0x34 28>; + }; diff --git a/Bindings/net/can/microchip,mcp251x.txt b/Bindings/net/can/microchip,mcp251x.txt index 5a0111d4de58..381f8fb3e865 100644 --- a/Bindings/net/can/microchip,mcp251x.txt +++ b/Bindings/net/can/microchip,mcp251x.txt @@ -12,6 +12,9 @@ Required properties: Optional properties: - vdd-supply: Regulator that powers the CAN controller. - xceiver-supply: Regulator that powers the CAN transceiver. + - gpio-controller: Indicates this device is a GPIO controller. + - #gpio-cells: Should be two. The first cell is the pin number and + the second cell is used to specify the gpio polarity. Example: can0: can@1 { @@ -19,7 +22,9 @@ Example: reg = <1>; clocks = <&clk24m>; interrupt-parent = <&gpio4>; - interrupts = <13 0x2>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; vdd-supply = <®5v0>; xceiver-supply = <®5v0>; + gpio-controller; + #gpio-cells = <2>; }; diff --git a/Bindings/net/can/microchip,mcp251xfd.yaml b/Bindings/net/can/microchip,mcp251xfd.yaml new file mode 100644 index 000000000000..2a884c1fe0e0 --- /dev/null +++ b/Bindings/net/can/microchip,mcp251xfd.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/microchip,mcp251xfd.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Microchip MCP2517FD and MCP2518FD stand-alone CAN controller device tree + bindings + +maintainers: + - Marc Kleine-Budde <mkl@pengutronix.de> + +properties: + compatible: + oneOf: + - const: microchip,mcp2517fd + description: for MCP2517FD + - const: microchip,mcp2518fd + description: for MCP2518FD + - const: microchip,mcp251xfd + description: to autodetect chip variant + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + vdd-supply: + description: Regulator that powers the CAN controller. + + xceiver-supply: + description: Regulator that powers the CAN transceiver. + + microchip,rx-int-gpios: + description: + GPIO phandle of GPIO connected to to INT1 pin of the MCP251XFD, which + signals a pending RX interrupt. + maxItems: 1 + + spi-max-frequency: + description: + Must be half or less of "clocks" frequency. + maximum: 20000000 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + can@0 { + compatible = "microchip,mcp251xfd"; + reg = <0>; + clocks = <&can0_osc>; + pinctrl-names = "default"; + pinctrl-0 = <&can0_pins>; + spi-max-frequency = <20000000>; + interrupts-extended = <&gpio 13 IRQ_TYPE_LEVEL_LOW>; + microchip,rx-int-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + vdd-supply = <®5v0>; + xceiver-supply = <®5v0>; + }; + }; diff --git a/Bindings/net/can/rcar_can.txt b/Bindings/net/can/rcar_can.txt index 85c6551b602a..6a5956347816 100644 --- a/Bindings/net/can/rcar_can.txt +++ b/Bindings/net/can/rcar_can.txt @@ -2,13 +2,15 @@ Renesas R-Car CAN controller Device Tree Bindings ------------------------------------------------- Required properties: -- compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC. +- compatible: "renesas,can-r8a7742" if CAN controller is a part of R8A7742 SoC. + "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC. "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC. "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC. "renesas,can-r8a77470" if CAN controller is a part of R8A77470 SoC. "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC. "renesas,can-r8a774b1" if CAN controller is a part of R8A774B1 SoC. "renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC. + "renesas,can-r8a774e1" if CAN controller is a part of R8A774E1 SoC. "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC. "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC. "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC. @@ -37,8 +39,8 @@ Required properties: - pinctrl-0: pin control group to be used for this controller. - pinctrl-names: must be "default". -Required properties for R8A774A1, R8A774B1, R8A774C0, R8A7795, R8A7796, -R8A77965, R8A77990, and R8A77995: +Required properties for R8A774A1, R8A774B1, R8A774C0, R8A774E1, R8A7795, +R8A7796, R8A77965, R8A77990, and R8A77995: For the denoted SoCs, "clkp2" can be CANFD clock. This is a div6 clock and can be used by both CAN and CAN FD controller at the same time. It needs to be scaled to maximum frequency if any of these controllers use it. This is done diff --git a/Bindings/net/can/rcar_canfd.txt b/Bindings/net/can/rcar_canfd.txt index 13a4e34c0c73..22cf2a889b2c 100644 --- a/Bindings/net/can/rcar_canfd.txt +++ b/Bindings/net/can/rcar_canfd.txt @@ -7,6 +7,7 @@ Required properties: - "renesas,r8a774a1-canfd" for R8A774A1 (RZ/G2M) compatible controller. - "renesas,r8a774b1-canfd" for R8A774B1 (RZ/G2N) compatible controller. - "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller. + - "renesas,r8a774e1-canfd" for R8A774E1 (RZ/G2H) compatible controller. - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller. - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller. - "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible controller. @@ -32,8 +33,8 @@ The name of the child nodes are "channel0" and "channel1" respectively. Each child node supports the "status" property only, which is used to enable/disable the respective channel. -Required properties for R8A774A1, R8A774B1, R8A774C0, R8A7795, R8A7796, -R8A77965, R8A77990, and R8A77995: +Required properties for R8A774A1, R8A774B1, R8A774C0, R8A774E1, R8A7795, +R8A7796, R8A77965, R8A77990, and R8A77995: In the denoted SoCs, canfd clock is a div6 clock and can be used by both CAN and CAN FD controller at the same time. It needs to be scaled to maximum frequency if any of these controllers use it. This is done using the below diff --git a/Bindings/net/can/tcan4x5x.txt b/Bindings/net/can/tcan4x5x.txt index 3613c2c8f75d..0968b40aef1e 100644 --- a/Bindings/net/can/tcan4x5x.txt +++ b/Bindings/net/can/tcan4x5x.txt @@ -33,7 +33,7 @@ tcan4x5x: tcan4x5x@0 { spi-max-frequency = <10000000>; bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; interrupt-parent = <&gpio1>; - interrupts = <14 GPIO_ACTIVE_LOW>; + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; diff --git a/Bindings/net/dsa/b53.txt b/Bindings/net/dsa/b53.txt index cfd1afdc6e94..f1487a751b1a 100644 --- a/Bindings/net/dsa/b53.txt +++ b/Bindings/net/dsa/b53.txt @@ -95,7 +95,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: fixed-link { speed = <1000>; - duplex-full; + full-duplex; }; }; @@ -104,8 +104,9 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: #address-cells = <1>; #size-cells = <0>; - switch0: ethernet-switch@30 { + switch0: ethernet-switch@1e { compatible = "brcm,bcm53125"; + reg = <30>; #address-cells = <1>; #size-cells = <0>; @@ -128,7 +129,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: label = "cable-modem"; fixed-link { speed = <1000>; - duplex-full; + full-duplex; }; phy-mode = "rgmii-txid"; }; @@ -138,7 +139,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: label = "cpu"; fixed-link { speed = <1000>; - duplex-full; + full-duplex; }; phy-mode = "rgmii-txid"; ethernet = <ð0>; diff --git a/Bindings/net/dsa/dsa.yaml b/Bindings/net/dsa/dsa.yaml index 6a1ec50ad4fd..a765ceba28c6 100644 --- a/Bindings/net/dsa/dsa.yaml +++ b/Bindings/net/dsa/dsa.yaml @@ -89,4 +89,6 @@ oneOf: - required: - ethernet-ports +additionalProperties: true + ... diff --git a/Bindings/net/dsa/mt7530.txt b/Bindings/net/dsa/mt7530.txt index c5ed5d25f642..560369efad6c 100644 --- a/Bindings/net/dsa/mt7530.txt +++ b/Bindings/net/dsa/mt7530.txt @@ -5,6 +5,7 @@ Required properties: - compatible: may be compatible = "mediatek,mt7530" or compatible = "mediatek,mt7621" + or compatible = "mediatek,mt7531" - #address-cells: Must be 1. - #size-cells: Must be 0. - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part @@ -32,10 +33,14 @@ Required properties for the child nodes within ports container: - reg: Port address described must be 6 for CPU port and from 0 to 5 for user ports. -- phy-mode: String, must be either "trgmii" or "rgmii" for port labeled - "cpu". +- phy-mode: String, the following values are acceptable for port labeled + "cpu": + If compatible mediatek,mt7530 or mediatek,mt7621 is set, + must be either "trgmii" or "rgmii" + If compatible mediatek,mt7531 is set, + must be either "sgmii", "1000base-x" or "2500base-x" -Port 5 of the switch is muxed between: +Port 5 of mt7530 and mt7621 switch is muxed between: 1. GMAC5: GMAC5 can interface with another external MAC or PHY. 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC of the SOC. Used in many setups where port 0/4 becomes the WAN port. diff --git a/Bindings/net/ethernet-controller.yaml b/Bindings/net/ethernet-controller.yaml index fa2baca8c726..fdf709817218 100644 --- a/Bindings/net/ethernet-controller.yaml +++ b/Bindings/net/ethernet-controller.yaml @@ -120,6 +120,13 @@ properties: and is useful for determining certain configuration settings such as flow control thresholds. + rx-internal-delay-ps: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + RGMII Receive Clock Delay defined in pico seconds. + This is used for controllers that have configurable RX internal delays. + If this property is present then the MAC applies the RX delay. + sfp: $ref: /schemas/types.yaml#definitions/phandle description: @@ -131,6 +138,13 @@ properties: The size of the controller\'s transmit fifo in bytes. This is used for components that can have configurable fifo sizes. + tx-internal-delay-ps: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + RGMII Transmit Clock Delay defined in pico seconds. + This is used for controllers that have configurable TX internal delays. + If this property is present then the MAC applies the TX delay. + managed: description: Specifies the PHY management type. If auto is set and fixed-link @@ -205,4 +219,6 @@ properties: required: - speed +additionalProperties: true + ... diff --git a/Bindings/net/ethernet-phy.yaml b/Bindings/net/ethernet-phy.yaml index a9e547ac7905..6dd72faebd89 100644 --- a/Bindings/net/ethernet-phy.yaml +++ b/Bindings/net/ethernet-phy.yaml @@ -177,6 +177,8 @@ properties: required: - reg +additionalProperties: true + examples: - | ethernet { diff --git a/Bindings/net/intel,dwmac-plat.yaml b/Bindings/net/intel,dwmac-plat.yaml new file mode 100644 index 000000000000..c1948ce00081 --- /dev/null +++ b/Bindings/net/intel,dwmac-plat.yaml @@ -0,0 +1,132 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel DWMAC glue layer Device Tree Bindings + +maintainers: + - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> + +select: + properties: + compatible: + contains: + enum: + - intel,keembay-dwmac + required: + - compatible + +allOf: + - $ref: "snps,dwmac.yaml#" + +properties: + compatible: + oneOf: + - items: + - enum: + - intel,keembay-dwmac + - const: snps,dwmac-4.10a + + clocks: + items: + - description: GMAC main clock + - description: PTP reference clock + - description: Tx clock + + clock-names: + items: + - const: stmmaceth + - const: ptp_ref + - const: tx_clk + +required: + - compatible + - clocks + - clock-names + +unevaluatedProperties: false + +examples: +# FIXME: Remove defines and include the correct header file +# once it is available in mainline. + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/interrupt-controller/irq.h> + #define MOVISOC_KMB_PSS_GBE + #define MOVISOC_KMB_PSS_AUX_GBE_PTP + #define MOVISOC_KMB_PSS_AUX_GBE_TX + + stmmac_axi_setup: stmmac-axi-config { + snps,lpi_en; + snps,wr_osr_lmt = <0x0>; + snps,rd_osr_lmt = <0x2>; + snps,blen = <0 0 0 0 16 8 4>; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <2>; + snps,rx-sched-sp; + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,priority = <0x0>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,priority = <0x1>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <2>; + snps,tx-sched-wrr; + queue0 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,priority = <0x0>; + }; + + queue1 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,priority = <0x1>; + }; + }; + + gmac0: ethernet@3a000000 { + compatible = "intel,keembay-dwmac", "snps,dwmac-4.10a"; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + reg = <0x3a000000 0x8000>; + snps,perfect-filter-entries = <128>; + phy-handle = <ð_phy0>; + phy-mode = "rgmii"; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + clock-names = "stmmaceth", "ptp_ref", "tx_clk"; + clocks = <&scmi_clk MOVISOC_KMB_PSS_GBE>, + <&scmi_clk MOVISOC_KMB_PSS_AUX_GBE_PTP>, + <&scmi_clk MOVISOC_KMB_PSS_AUX_GBE_TX>; + snps,pbl = <0x4>; + snps,axi-config = <&stmmac_axi_setup>; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + snps,tso; + status = "okay"; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + ethernet-phy@0 { + reg = <0>; + }; + }; + }; + +... diff --git a/Bindings/net/marvell,mvusb.yaml b/Bindings/net/marvell,mvusb.yaml index 68573762294b..8e288ab38fd7 100644 --- a/Bindings/net/marvell,mvusb.yaml +++ b/Bindings/net/marvell,mvusb.yaml @@ -35,6 +35,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | /* USB host controller */ diff --git a/Bindings/net/marvell,prestera.txt b/Bindings/net/marvell,prestera.txt index 83370ebf5b89..e28938ddfdf5 100644 --- a/Bindings/net/marvell,prestera.txt +++ b/Bindings/net/marvell,prestera.txt @@ -45,3 +45,37 @@ dfx-server { ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>; reg = <MBUS_ID(0x08, 0x00) 0 0x100000>; }; + +Marvell Prestera SwitchDev bindings +----------------------------------- +Optional properties: +- compatible: must be "marvell,prestera" +- base-mac-provider: describes handle to node which provides base mac address, + might be a static base mac address or nvme cell provider. + +Example: + +eeprom_mac_addr: eeprom-mac-addr { + compatible = "eeprom,mac-addr-cell"; + status = "okay"; + + nvmem = <&eeprom_at24>; +}; + +prestera { + compatible = "marvell,prestera"; + status = "okay"; + + base-mac-provider = <&eeprom_mac_addr>; +}; + +The current implementation of Prestera Switchdev PCI interface driver requires +that BAR2 is assigned to 0xf6000000 as base address from the PCI IO range: + +&cp0_pcie0 { + ranges = <0x81000000 0x0 0xfb000000 0x0 0xfb000000 0x0 0xf0000 + 0x82000000 0x0 0xf6000000 0x0 0xf6000000 0x0 0x2000000 + 0x82000000 0x0 0xf9000000 0x0 0xf9000000 0x0 0x100000>; + phys = <&cp0_comphy0 0>; + status = "okay"; +}; diff --git a/Bindings/net/mdio.yaml b/Bindings/net/mdio.yaml index 26afb556dfae..e811e0fd851c 100644 --- a/Bindings/net/mdio.yaml +++ b/Bindings/net/mdio.yaml @@ -100,6 +100,8 @@ patternProperties: required: - reg +additionalProperties: true + examples: - | davinci_mdio: mdio@5c030000 { diff --git a/Bindings/net/mediatek,star-emac.yaml b/Bindings/net/mediatek,star-emac.yaml index aea88e621792..0bbd598704e9 100644 --- a/Bindings/net/mediatek,star-emac.yaml +++ b/Bindings/net/mediatek,star-emac.yaml @@ -61,6 +61,8 @@ required: - mediatek,pericfg - phy-handle +unevaluatedProperties: false + examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> diff --git a/Bindings/net/nfc/nxp-nci.txt b/Bindings/net/nfc/nxp-nci.txt index cfaf88998918..9e4dc510a40a 100644 --- a/Bindings/net/nfc/nxp-nci.txt +++ b/Bindings/net/nfc/nxp-nci.txt @@ -25,7 +25,7 @@ Example (for ARM-based BeagleBone with NPC100 NFC controller on I2C2): clock-frequency = <100000>; interrupt-parent = <&gpio1>; - interrupts = <29 GPIO_ACTIVE_HIGH>; + interrupts = <29 IRQ_TYPE_LEVEL_HIGH>; enable-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; firmware-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; diff --git a/Bindings/net/nfc/pn544.txt b/Bindings/net/nfc/pn544.txt index 92f399ec22b8..2bd82562ce8e 100644 --- a/Bindings/net/nfc/pn544.txt +++ b/Bindings/net/nfc/pn544.txt @@ -25,7 +25,7 @@ Example (for ARM-based BeagleBone with PN544 on I2C2): clock-frequency = <400000>; interrupt-parent = <&gpio1>; - interrupts = <17 GPIO_ACTIVE_HIGH>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; enable-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; firmware-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; diff --git a/Bindings/net/nfc/samsung,s3fwrn5.yaml b/Bindings/net/nfc/samsung,s3fwrn5.yaml new file mode 100644 index 000000000000..cb0b8a560282 --- /dev/null +++ b/Bindings/net/nfc/samsung,s3fwrn5.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nfc/samsung,s3fwrn5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S3FWRN5 NCI NFC Controller + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + - Krzysztof Opasiak <k.opasiak@samsung.com> + +properties: + compatible: + const: samsung,s3fwrn5-i2c + + en-gpios: + maxItems: 1 + description: + Output GPIO pin used for enabling/disabling the chip + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + wake-gpios: + maxItems: 1 + description: + Output GPIO pin used to enter firmware mode and sleep/wakeup control + + s3fwrn5,en-gpios: + maxItems: 1 + deprecated: true + description: + Use en-gpios + + s3fwrn5,fw-gpios: + maxItems: 1 + deprecated: true + description: + Use wake-gpios + +additionalProperties: false + +required: + - compatible + - en-gpios + - interrupts + - reg + - wake-gpios + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c4 { + #address-cells = <1>; + #size-cells = <0>; + + s3fwrn5@27 { + compatible = "samsung,s3fwrn5-i2c"; + reg = <0x27>; + + interrupt-parent = <&gpa1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + + en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; + wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; + }; + }; diff --git a/Bindings/net/nxp,tja11xx.yaml b/Bindings/net/nxp,tja11xx.yaml index 42be0255512b..d51da24f3505 100644 --- a/Bindings/net/nxp,tja11xx.yaml +++ b/Bindings/net/nxp,tja11xx.yaml @@ -34,6 +34,8 @@ patternProperties: required: - reg +unevaluatedProperties: false + examples: - | mdio { diff --git a/Bindings/net/qca,ar71xx.yaml b/Bindings/net/qca,ar71xx.yaml index f99a5aabe923..f0db22645d73 100644 --- a/Bindings/net/qca,ar71xx.yaml +++ b/Bindings/net/qca,ar71xx.yaml @@ -72,6 +72,8 @@ required: - resets - reset-names +unevaluatedProperties: false + examples: # Lager board - | diff --git a/Bindings/net/qca,ar803x.yaml b/Bindings/net/qca,ar803x.yaml index 1788884b8c28..64b3357ade8a 100644 --- a/Bindings/net/qca,ar803x.yaml +++ b/Bindings/net/qca,ar803x.yaml @@ -59,6 +59,8 @@ properties: regulator to VDDIO. $ref: /schemas/regulator/regulator.yaml +unevaluatedProperties: false + examples: - | #include <dt-bindings/net/qca-ar803x.h> diff --git a/Bindings/net/qcom,ipa.yaml b/Bindings/net/qcom,ipa.yaml index 8594f114f016..4d8464b2676d 100644 --- a/Bindings/net/qcom,ipa.yaml +++ b/Bindings/net/qcom,ipa.yaml @@ -144,6 +144,8 @@ oneOf: - required: - memory-region +additionalProperties: false + examples: - | #include <dt-bindings/interrupt-controller/irq.h> diff --git a/Bindings/net/qcom,ipq4019-mdio.yaml b/Bindings/net/qcom,ipq4019-mdio.yaml index 13555a89975f..0c973310ada0 100644 --- a/Bindings/net/qcom,ipq4019-mdio.yaml +++ b/Bindings/net/qcom,ipq4019-mdio.yaml @@ -31,6 +31,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | mdio@90000 { diff --git a/Bindings/net/qcom,ipq8064-mdio.yaml b/Bindings/net/qcom,ipq8064-mdio.yaml index 67df3fe861ee..948677ade6d1 100644 --- a/Bindings/net/qcom,ipq8064-mdio.yaml +++ b/Bindings/net/qcom,ipq8064-mdio.yaml @@ -33,6 +33,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | #include <dt-bindings/clock/qcom,gcc-ipq806x.h> diff --git a/Bindings/net/realtek-bluetooth.yaml b/Bindings/net/realtek-bluetooth.yaml index c488f24ed38f..4f485df69ac3 100644 --- a/Bindings/net/realtek-bluetooth.yaml +++ b/Bindings/net/realtek-bluetooth.yaml @@ -37,6 +37,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | #include <dt-bindings/gpio/gpio.h> @@ -49,6 +51,6 @@ examples: bluetooth { compatible = "realtek,rtl8723bs-bt"; device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ - host-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ + host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ }; }; diff --git a/Bindings/net/renesas,etheravb.yaml b/Bindings/net/renesas,etheravb.yaml new file mode 100644 index 000000000000..244befb6402a --- /dev/null +++ b/Bindings/net/renesas,etheravb.yaml @@ -0,0 +1,262 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/renesas,etheravb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Ethernet AVB + +maintainers: + - Sergei Shtylyov <sergei.shtylyov@gmail.com> + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,etheravb-r8a7742 # RZ/G1H + - renesas,etheravb-r8a7743 # RZ/G1M + - renesas,etheravb-r8a7744 # RZ/G1N + - renesas,etheravb-r8a7745 # RZ/G1E + - renesas,etheravb-r8a77470 # RZ/G1C + - renesas,etheravb-r8a7790 # R-Car H2 + - renesas,etheravb-r8a7791 # R-Car M2-W + - renesas,etheravb-r8a7792 # R-Car V2H + - renesas,etheravb-r8a7793 # R-Car M2-N + - renesas,etheravb-r8a7794 # R-Car E2 + - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1 + + - items: + - enum: + - renesas,etheravb-r8a774a1 # RZ/G2M + - renesas,etheravb-r8a774b1 # RZ/G2N + - renesas,etheravb-r8a774c0 # RZ/G2E + - renesas,etheravb-r8a774e1 # RZ/G2H + - renesas,etheravb-r8a7795 # R-Car H3 + - renesas,etheravb-r8a7796 # R-Car M3-W + - renesas,etheravb-r8a77961 # R-Car M3-W+ + - renesas,etheravb-r8a77965 # R-Car M3-N + - renesas,etheravb-r8a77970 # R-Car V3M + - renesas,etheravb-r8a77980 # R-Car V3H + - renesas,etheravb-r8a77990 # R-Car E3 + - renesas,etheravb-r8a77995 # R-Car D3 + - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 + + reg: true + + interrupts: true + + interrupt-names: true + + clocks: + maxItems: 1 + + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + phy-mode: true + + phy-handle: true + + '#address-cells': + description: Number of address cells for the MDIO bus. + const: 1 + + '#size-cells': + description: Number of size cells on the MDIO bus. + const: 0 + + renesas,no-ether-link: + type: boolean + description: + Specify when a board does not provide a proper AVB_LINK signal. + + renesas,ether-link-active-low: + type: boolean + description: + Specify when the AVB_LINK signal is active-low instead of normal + active-high. + + rx-internal-delay-ps: + enum: [0, 1800] + + tx-internal-delay-ps: + enum: [0, 2000] + +patternProperties: + "^ethernet-phy@[0-9a-f]$": + type: object + $ref: ethernet-phy.yaml# + +required: + - compatible + - reg + - interrupts + - clocks + - power-domains + - resets + - phy-mode + - phy-handle + - '#address-cells' + - '#size-cells' + +allOf: + - $ref: ethernet-controller.yaml# + + - if: + properties: + compatible: + contains: + enum: + - renesas,etheravb-rcar-gen2 + - renesas,etheravb-r8a7795 + - renesas,etheravb-r8a7796 + - renesas,etheravb-r8a77961 + - renesas,etheravb-r8a77965 + then: + properties: + reg: + items: + - description: MAC register block + - description: Stream buffer + else: + properties: + reg: + items: + - description: MAC register block + + - if: + properties: + compatible: + contains: + const: renesas,etheravb-rcar-gen2 + then: + properties: + interrupts: + maxItems: 1 + interrupt-names: + items: + - const: mux + rx-internal-delay-ps: false + else: + properties: + interrupts: + minItems: 25 + maxItems: 25 + interrupt-names: + items: + pattern: '^ch[0-9]+$' + required: + - interrupt-names + - rx-internal-delay-ps + + - if: + properties: + compatible: + contains: + enum: + - renesas,etheravb-r8a774a1 + - renesas,etheravb-r8a774b1 + - renesas,etheravb-r8a7795 + - renesas,etheravb-r8a7796 + - renesas,etheravb-r8a77961 + - renesas,etheravb-r8a77965 + - renesas,etheravb-r8a77970 + - renesas,etheravb-r8a77980 + then: + required: + - tx-internal-delay-ps + else: + properties: + tx-internal-delay-ps: false + + - if: + properties: + compatible: + contains: + const: renesas,etheravb-r8a77995 + then: + properties: + rx-internal-delay-ps: + const: 1800 + + - if: + properties: + compatible: + contains: + const: renesas,etheravb-r8a77980 + then: + properties: + tx-internal-delay-ps: + const: 2000 + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/r8a7795-cpg-mssr.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/power/r8a7795-sysc.h> + #include <dt-bindings/gpio/gpio.h> + aliases { + ethernet0 = &avb; + }; + + avb: ethernet@e6800000 { + compatible = "renesas,etheravb-r8a7795", + "renesas,etheravb-rcar-gen3"; + reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", + "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", + "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", + "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; + clocks = <&cpg CPG_MOD 812>; + iommus = <&ipmmu_ds0 16>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 812>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + rx-internal-delay-ps = <0>; + tx-internal-delay-ps = <2000>; + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + }; + }; diff --git a/Bindings/net/smsc-lan87xx.txt b/Bindings/net/smsc-lan87xx.txt index 8b7c719b0bb9..a8d0dc9a8c0e 100644 --- a/Bindings/net/smsc-lan87xx.txt +++ b/Bindings/net/smsc-lan87xx.txt @@ -5,6 +5,10 @@ through an Ethernet OF device node. Optional properties: +- clocks: + The clock used as phy reference clock and is connected to phy + pin XTAL1/CLKIN. + - smsc,disable-energy-detect: If set, do not enable energy detect mode for the SMSC phy. default: enable energy detect mode diff --git a/Bindings/net/snps,dwmac.yaml b/Bindings/net/snps,dwmac.yaml index 30a1efd26626..11a6fdb657c9 100644 --- a/Bindings/net/snps,dwmac.yaml +++ b/Bindings/net/snps,dwmac.yaml @@ -356,6 +356,8 @@ allOf: Enables the TSO feature otherwise it will be managed by MAC HW capability register. +additionalProperties: true + examples: - | stmmac_axi_setup: stmmac-axi-config { diff --git a/Bindings/net/socionext-netsec.txt b/Bindings/net/socionext-netsec.txt index 9d6c9feb12ff..a3c1dffaa4bb 100644 --- a/Bindings/net/socionext-netsec.txt +++ b/Bindings/net/socionext-netsec.txt @@ -30,7 +30,9 @@ Optional properties: (See ethernet.txt file in the same directory) - max-frame-size: See ethernet.txt in the same directory. The MAC address will be determined using the optional properties -defined in ethernet.txt. +defined in ethernet.txt. The 'phy-mode' property is required, but may +be set to the empty string if the PHY configuration is programmed by +the firmware or set by hardware straps, and needs to be preserved. Example: eth0: ethernet@522d0000 { diff --git a/Bindings/net/stm32-dwmac.yaml b/Bindings/net/stm32-dwmac.yaml index e5dff66df481..27eb6066793f 100644 --- a/Bindings/net/stm32-dwmac.yaml +++ b/Bindings/net/stm32-dwmac.yaml @@ -88,6 +88,8 @@ required: - clock-names - st,syscon +unevaluatedProperties: false + examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> diff --git a/Bindings/net/ti,davinci-mdio.yaml b/Bindings/net/ti,davinci-mdio.yaml index d454c1fab930..5728fe23f530 100644 --- a/Bindings/net/ti,davinci-mdio.yaml +++ b/Bindings/net/ti,davinci-mdio.yaml @@ -58,6 +58,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | davinci_mdio: mdio@4a101000 { diff --git a/Bindings/net/ti,dp83822.yaml b/Bindings/net/ti,dp83822.yaml new file mode 100644 index 000000000000..75e8712e903a --- /dev/null +++ b/Bindings/net/ti,dp83822.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) +# Copyright (C) 2020 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/net/ti,dp83822.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: TI DP83822 ethernet PHY + +maintainers: + - Dan Murphy <dmurphy@ti.com> + +description: | + The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It + provides all of the physical layer functions needed to transmit and receive + data over standard, twisted-pair cables or to connect to an external, + fiber-optic transceiver. Additionally, the DP83822 provides flexibility to + connect to a MAC through a standard MII, RMII, or RGMII interface + + Specifications about the Ethernet PHY can be found at: + http://www.ti.com/lit/ds/symlink/dp83822i.pdf + +allOf: + - $ref: "ethernet-phy.yaml#" + +properties: + reg: + maxItems: 1 + + ti,link-loss-low: + type: boolean + description: | + DP83822 PHY in Fiber mode only. + Sets the DP83822 to detect a link drop condition when the signal goes + high. If not set then link drop will occur when the signal goes low. + This property is only applicable if the fiber mode support is strapped + to on. + + ti,fiber-mode: + type: boolean + description: | + DP83822 PHY only. + If present the DP83822 PHY is configured to operate in fiber mode + Fiber mode support can also be strapped. If the strap pin is not set + correctly or not set at all then this boolean can be used to enable it. + If the fiber mode is not strapped then signal detection for the PHY + is disabled. + In fiber mode, auto-negotiation is disabled and the PHY can only work in + 100base-fx (full and half duplex) modes. + + rx-internal-delay-ps: + description: | + DP83822 PHY only. + Setting this property to a non-zero number sets the RX internal delay + for the PHY. The internal delay for the PHY is fixed to 3.5ns relative + to receive data. + + tx-internal-delay-ps: + description: | + DP83822 PHY only. + Setting this property to a non-zero number sets the TX internal delay + for the PHY. The internal delay for the PHY is fixed to 3.5ns relative + to transmit data. + +required: + - reg + +unevaluatedProperties: false + +examples: + - | + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + ethphy0: ethernet-phy@0 { + reg = <0>; + rx-internal-delay-ps = <1>; + tx-internal-delay-ps = <1>; + }; + }; + +... diff --git a/Bindings/net/ti,dp83867.yaml b/Bindings/net/ti,dp83867.yaml index c6716ac6cbcc..4050a3608658 100644 --- a/Bindings/net/ti,dp83867.yaml +++ b/Bindings/net/ti,dp83867.yaml @@ -109,6 +109,8 @@ properties: required: - reg +unevaluatedProperties: false + examples: - | #include <dt-bindings/net/ti-dp83867.h> diff --git a/Bindings/net/ti,dp83869.yaml b/Bindings/net/ti,dp83869.yaml index cf40b469c719..c3235f08e326 100644 --- a/Bindings/net/ti,dp83869.yaml +++ b/Bindings/net/ti,dp83869.yaml @@ -79,6 +79,8 @@ properties: required: - reg +unevaluatedProperties: false + examples: - | #include <dt-bindings/net/ti-dp83869.h> diff --git a/Bindings/net/wireless/microchip,wilc1000.yaml b/Bindings/net/wireless/microchip,wilc1000.yaml index 2c320eb2a8c4..6c35682377e6 100644 --- a/Bindings/net/wireless/microchip,wilc1000.yaml +++ b/Bindings/net/wireless/microchip,wilc1000.yaml @@ -18,6 +18,8 @@ properties: compatible: const: microchip,wilc1000 + reg: true + spi-max-frequency: true interrupts: @@ -34,6 +36,8 @@ required: - compatible - interrupts +additionalProperties: false + examples: - | spi { diff --git a/Bindings/net/wireless/qcom,ath10k.txt b/Bindings/net/wireless/qcom,ath10k.txt index 65ee68efd574..b61c2d5a0ff7 100644 --- a/Bindings/net/wireless/qcom,ath10k.txt +++ b/Bindings/net/wireless/qcom,ath10k.txt @@ -65,7 +65,8 @@ Optional properties: the length can vary between hw versions. - <supply-name>-supply: handle to the regulator device tree node optional "supply-name" are "vdd-0.8-cx-mx", - "vdd-1.8-xo", "vdd-1.3-rfa" and "vdd-3.3-ch0". + "vdd-1.8-xo", "vdd-1.3-rfa", "vdd-3.3-ch0", + and "vdd-3.3-ch1". - memory-region: Usage: optional Value type: <phandle> @@ -204,6 +205,7 @@ wifi@18000000 { vdd-1.8-xo-supply = <&vreg_l7a_1p8>; vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; + vdd-3.3-ch1-supply = <&vreg_l26a_3p3>; memory-region = <&wifi_msa_mem>; iommus = <&apps_smmu 0x0040 0x1>; qcom,msa-fixed-perm; diff --git a/Bindings/net/wireless/qcom,ath11k.yaml b/Bindings/net/wireless/qcom,ath11k.yaml index a1717db36dba..4b365c9d9378 100644 --- a/Bindings/net/wireless/qcom,ath11k.yaml +++ b/Bindings/net/wireless/qcom,ath11k.yaml @@ -17,7 +17,9 @@ description: | properties: compatible: - const: qcom,ipq8074-wifi + enum: + - qcom,ipq8074-wifi + - qcom,ipq6018-wifi reg: maxItems: 1 |