diff options
Diffstat (limited to 'Bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml')
| -rw-r--r-- | Bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 48 |
1 files changed, 34 insertions, 14 deletions
diff --git a/Bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml index 624e14f00790..f7ec8a4f664f 100644 --- a/Bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml +++ b/Bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml @@ -4,15 +4,14 @@ $id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS) - Low Power Island (LPI) TLMM block +title: Qualcomm SC7280 SoC LPASS LPI TLMM maintainers: - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> -description: | - This binding describes the Top Level Mode Multiplexer block found in the - LPASS LPI IP on most Qualcomm SoCs +description: + Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem + (LPASS) Low Power Island (LPI) of Qualcomm SC7280 SoC. properties: compatible: @@ -24,12 +23,11 @@ properties: type: boolean reg: - minItems: 2 maxItems: 2 gpio-controller: true - '#gpio-cells': + "#gpio-cells": description: Specifying the pin number and flags, as defined in include/dt-bindings/gpio/gpio.h const: 2 @@ -37,9 +35,17 @@ properties: gpio-ranges: maxItems: 1 -#PIN CONFIGURATION NODES patternProperties: - '-pins$': + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sc7280-lpass-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sc7280-lpass-state" + additionalProperties: false + +$defs: + qcom-sc7280-lpass-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. @@ -83,13 +89,10 @@ patternProperties: 3: Reserved (No adjustments) bias-pull-down: true - bias-pull-up: true - + bias-bus-hold: true bias-disable: true - output-high: true - output-low: true required: @@ -102,7 +105,7 @@ required: - compatible - reg - gpio-controller - - '#gpio-cells' + - "#gpio-cells" - gpio-ranges additionalProperties: false @@ -116,4 +119,21 @@ examples: gpio-controller; #gpio-cells = <2>; gpio-ranges = <&lpass_tlmm 0 0 15>; + + dmic01-state { + dmic01-clk-pins { + pins = "gpio6"; + function = "dmic1_clk"; + }; + + dmic01-clk-sleep-pins { + pins = "gpio6"; + function = "dmic1_clk"; + }; + }; + + tx-swr-data-sleep-state { + pins = "gpio1", "gpio2", "gpio14"; + function = "swr_tx_data"; + }; }; |