diff options
Diffstat (limited to 'Bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml')
| -rw-r--r-- | Bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml | 51 |
1 files changed, 41 insertions, 10 deletions
diff --git a/Bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml index 3694795ec793..01a0a4a40ba5 100644 --- a/Bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml +++ b/Bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml @@ -4,15 +4,14 @@ $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS) - Low Power Island (LPI) TLMM block +title: Qualcomm SM8450 SoC LPASS LPI TLMM maintainers: - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> -description: | - This binding describes the Top Level Mode Multiplexer block found in the - LPASS LPI IP on most Qualcomm SoCs +description: + Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem + (LPASS) Low Power Island (LPI) of Qualcomm SM8450 SoC. properties: compatible: @@ -35,7 +34,7 @@ properties: gpio-controller: true - '#gpio-cells': + "#gpio-cells": description: Specifying the pin number and flags, as defined in include/dt-bindings/gpio/gpio.h const: 2 @@ -43,9 +42,17 @@ properties: gpio-ranges: maxItems: 1 -#PIN CONFIGURATION NODES patternProperties: - '-pins$': + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sm8450-lpass-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sm8450-lpass-state" + additionalProperties: false + +$defs: + qcom-sm8450-lpass-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. @@ -58,7 +65,7 @@ patternProperties: List of gpio pins affected by the properties specified in this subnode. items: - pattern: "^gpio([0-9]|[1-2][0-9]])$" + pattern: "^gpio([0-9]|[1-2][0-9])$" function: enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data, @@ -114,7 +121,7 @@ required: - clocks - clock-names - gpio-controller - - '#gpio-cells' + - "#gpio-cells" - gpio-ranges additionalProperties: false @@ -132,4 +139,28 @@ examples: gpio-controller; #gpio-cells = <2>; gpio-ranges = <&lpi_tlmm 0 0 23>; + + wsa-swr-active-state { + clk-pins { + pins = "gpio10"; + function = "wsa_swr_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio11"; + function = "wsa_swr_data"; + drive-strength = <2>; + slew-rate = <1>; + }; + }; + + tx-swr-sleep-clk-state { + pins = "gpio0"; + function = "swr_tx_clk"; + drive-strength = <2>; + bias-pull-down; + }; }; |