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-rw-r--r--Bindings/serial/esp,esp32-acm.yaml42
-rw-r--r--Bindings/serial/esp,esp32-uart.yaml51
-rw-r--r--Bindings/serial/fsl-imx-uart.yaml2
-rw-r--r--Bindings/serial/fsl-mxs-auart.yaml13
-rw-r--r--Bindings/serial/maxim,max310x.yaml74
-rw-r--r--Bindings/serial/nvidia,tegra20-hsuart.yaml10
-rw-r--r--Bindings/serial/nxp,sc16is7xx.yaml127
-rw-r--r--Bindings/serial/qcom,msm-uart.yaml4
-rw-r--r--Bindings/serial/qcom,msm-uartdm.yaml4
-rw-r--r--Bindings/serial/renesas,em-uart.yaml14
-rw-r--r--Bindings/serial/renesas,hscif.yaml4
-rw-r--r--Bindings/serial/renesas,scif.yaml1
-rw-r--r--Bindings/serial/renesas,scifa.yaml4
-rw-r--r--Bindings/serial/renesas,scifb.yaml4
-rw-r--r--Bindings/serial/rs485.yaml4
-rw-r--r--Bindings/serial/samsung_uart.yaml8
-rw-r--r--Bindings/serial/serial.yaml18
17 files changed, 342 insertions, 42 deletions
diff --git a/Bindings/serial/esp,esp32-acm.yaml b/Bindings/serial/esp,esp32-acm.yaml
new file mode 100644
index 000000000000..77fbb2c72171
--- /dev/null
+++ b/Bindings/serial/esp,esp32-acm.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/esp,esp32-acm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ESP32S3 ACM gadget controller
+
+maintainers:
+ - Max Filippov <jcmvbkbc@gmail.com>
+
+description:
+ Fixed function USB CDC-ACM gadget controller of the Espressif ESP32S3 SoC.
+
+allOf:
+ - $ref: serial.yaml#
+
+properties:
+ compatible:
+ const: esp,esp32s3-acm
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ serial@60038000 {
+ compatible = "esp,esp32s3-acm";
+ reg = <0x60038000 0x1000>;
+ interrupts = <96 3 0>;
+ };
diff --git a/Bindings/serial/esp,esp32-uart.yaml b/Bindings/serial/esp,esp32-uart.yaml
new file mode 100644
index 000000000000..2a80ca997a0c
--- /dev/null
+++ b/Bindings/serial/esp,esp32-uart.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/esp,esp32-uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ESP32xx UART controllers
+
+maintainers:
+ - Max Filippov <jcmvbkbc@gmail.com>
+
+description:
+ ESP32 UART controller is a part of the ESP32 SoC.
+ ESP32S3 UART controller is a part of the ESP32S3 SoC.
+ Both SoCs are produced by Espressif Systems Co. Ltd.
+
+allOf:
+ - $ref: serial.yaml#
+
+properties:
+ compatible:
+ enum:
+ - esp,esp32-uart
+ - esp,esp32s3-uart
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ serial@60000000 {
+ compatible = "esp,esp32s3-uart";
+ reg = <0x60000000 0x80>;
+ interrupts = <27 1 0>;
+ clocks = <&serial_clk>;
+ };
diff --git a/Bindings/serial/fsl-imx-uart.yaml b/Bindings/serial/fsl-imx-uart.yaml
index 40414247d61a..83035553044a 100644
--- a/Bindings/serial/fsl-imx-uart.yaml
+++ b/Bindings/serial/fsl-imx-uart.yaml
@@ -70,6 +70,8 @@ properties:
interrupts:
maxItems: 1
+ wakeup-source: true
+
fsl,dte-mode:
$ref: /schemas/types.yaml#/definitions/flag
description: |
diff --git a/Bindings/serial/fsl-mxs-auart.yaml b/Bindings/serial/fsl-mxs-auart.yaml
index 6a400a5e6fc7..da032effffe6 100644
--- a/Bindings/serial/fsl-mxs-auart.yaml
+++ b/Bindings/serial/fsl-mxs-auart.yaml
@@ -14,10 +14,13 @@ allOf:
properties:
compatible:
- enum:
- - fsl,imx23-auart
- - fsl,imx28-auart
- - alphascale,asm9260-auart
+ oneOf:
+ - const: fsl,imx23-auart
+ - const: alphascale,asm9260-auart
+ - items:
+ - enum:
+ - fsl,imx28-auart
+ - const: fsl,imx23-auart
reg:
maxItems: 1
@@ -82,7 +85,7 @@ examples:
};
auart0: serial@8006a000 {
- compatible = "fsl,imx28-auart";
+ compatible = "fsl,imx28-auart", "fsl,imx23-auart";
reg = <0x8006a000 0x2000>;
interrupts = <112>;
dmas = <&dma_apbx 8>, <&dma_apbx 9>;
diff --git a/Bindings/serial/maxim,max310x.yaml b/Bindings/serial/maxim,max310x.yaml
new file mode 100644
index 000000000000..889eeaca64a0
--- /dev/null
+++ b/Bindings/serial/maxim,max310x.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/maxim,max310x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Maxim MAX310X Advanced Universal Asynchronous Receiver-Transmitter (UART)
+
+maintainers:
+ - Hugo Villeneuve <hvilleneuve@dimonoff.com>
+
+properties:
+ compatible:
+ enum:
+ - maxim,max3107
+ - maxim,max3108
+ - maxim,max3109
+ - maxim,max14830
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ enum:
+ - xtal # External crystal
+ - osc # External clock source
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-line-names:
+ minItems: 1
+ maxItems: 16
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+allOf:
+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
+ - $ref: /schemas/serial/serial.yaml#
+ - $ref: /schemas/serial/rs485.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ serial@2c {
+ compatible = "maxim,max3107";
+ reg = <0x2c>;
+ clocks = <&xtal4m>;
+ clock-names = "xtal";
+ interrupt-parent = <&gpio3>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
diff --git a/Bindings/serial/nvidia,tegra20-hsuart.yaml b/Bindings/serial/nvidia,tegra20-hsuart.yaml
index 04d55fecf47c..a5d67563cd53 100644
--- a/Bindings/serial/nvidia,tegra20-hsuart.yaml
+++ b/Bindings/serial/nvidia,tegra20-hsuart.yaml
@@ -91,11 +91,6 @@ properties:
- description: range upper bound
- description: adjustment (in permyriad, i.e. 0.01%)
-allOf:
- - $ref: serial.yaml
-
-unevaluatedProperties: false
-
required:
- compatible
- reg
@@ -106,6 +101,11 @@ required:
- dmas
- dma-names
+allOf:
+ - $ref: serial.yaml
+
+unevaluatedProperties: false
+
examples:
- |
#include <dt-bindings/clock/tegra30-car.h>
diff --git a/Bindings/serial/nxp,sc16is7xx.yaml b/Bindings/serial/nxp,sc16is7xx.yaml
new file mode 100644
index 000000000000..5dec15b7e7c3
--- /dev/null
+++ b/Bindings/serial/nxp,sc16is7xx.yaml
@@ -0,0 +1,127 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/nxp,sc16is7xx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP SC16IS7xx Advanced Universal Asynchronous Receiver-Transmitter (UART)
+
+maintainers:
+ - Hugo Villeneuve <hvilleneuve@dimonoff.com>
+
+properties:
+ compatible:
+ enum:
+ - nxp,sc16is740
+ - nxp,sc16is741
+ - nxp,sc16is750
+ - nxp,sc16is752
+ - nxp,sc16is760
+ - nxp,sc16is762
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-frequency:
+ description:
+ When there is no clock provider visible to the platform, this
+ is the source crystal or external clock frequency for the IC in Hz.
+ minimum: 1
+ maximum: 80000000
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-line-names:
+ minItems: 1
+ maxItems: 8
+
+ irda-mode-ports:
+ description: |
+ An array that lists the indices of the port that should operate in IrDA
+ mode:
+ 0: port A
+ 1: port B
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 2
+ items:
+ minimum: 0
+ maximum: 1
+
+ nxp,modem-control-line-ports:
+ description: |
+ An array that lists the indices of the port that should have shared GPIO
+ lines configured as modem control lines:
+ 0: port A
+ 1: port B
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 2
+ items:
+ minimum: 0
+ maximum: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+allOf:
+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
+ - $ref: /schemas/serial/serial.yaml#
+ - $ref: /schemas/serial/rs485.yaml#
+
+oneOf:
+ - required:
+ - clocks
+ - required:
+ - clock-frequency
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ serial@51 {
+ compatible = "nxp,sc16is750";
+ reg = <0x51>;
+ clocks = <&clk20m>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ serial@53 {
+ compatible = "nxp,sc16is752";
+ reg = <0x53>;
+ clocks = <&clk20m>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+ nxp,modem-control-line-ports = <1>; /* Port 1 as modem control lines */
+ gpio-controller; /* Port 0 as GPIOs */
+ #gpio-cells = <2>;
+ };
+
+ serial@54 {
+ compatible = "nxp,sc16is752";
+ reg = <0x54>;
+ clocks = <&clk20m>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+ nxp,modem-control-line-ports = <0 1>; /* Ports 0 and 1 as modem control lines */
+ };
+ };
diff --git a/Bindings/serial/qcom,msm-uart.yaml b/Bindings/serial/qcom,msm-uart.yaml
index a052aaef21f4..ea6abfe2d95e 100644
--- a/Bindings/serial/qcom,msm-uart.yaml
+++ b/Bindings/serial/qcom,msm-uart.yaml
@@ -40,11 +40,11 @@ required:
- interrupts
- reg
-unevaluatedProperties: false
-
allOf:
- $ref: /schemas/serial/serial.yaml#
+unevaluatedProperties: false
+
examples:
- |
serial@a9c00000 {
diff --git a/Bindings/serial/qcom,msm-uartdm.yaml b/Bindings/serial/qcom,msm-uartdm.yaml
index 484b9a51f6a9..ee52bf8e8917 100644
--- a/Bindings/serial/qcom,msm-uartdm.yaml
+++ b/Bindings/serial/qcom,msm-uartdm.yaml
@@ -78,8 +78,6 @@ required:
- interrupts
- reg
-unevaluatedProperties: false
-
allOf:
- $ref: /schemas/serial/serial.yaml#
@@ -97,6 +95,8 @@ allOf:
reg:
maxItems: 1
+unevaluatedProperties: false
+
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
diff --git a/Bindings/serial/renesas,em-uart.yaml b/Bindings/serial/renesas,em-uart.yaml
index 3fc2601f1338..89f1eb0f2c5a 100644
--- a/Bindings/serial/renesas,em-uart.yaml
+++ b/Bindings/serial/renesas,em-uart.yaml
@@ -38,6 +38,13 @@ properties:
- const: sclk
- const: pclk
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
allOf:
- $ref: serial.yaml#
@@ -53,13 +60,6 @@ allOf:
clock-names:
minItems: 2
-required:
- - compatible
- - reg
- - interrupts
- - clocks
- - clock-names
-
unevaluatedProperties: false
examples:
diff --git a/Bindings/serial/renesas,hscif.yaml b/Bindings/serial/renesas,hscif.yaml
index 1c7f1276aed6..2046e2dc0a3d 100644
--- a/Bindings/serial/renesas,hscif.yaml
+++ b/Bindings/serial/renesas,hscif.yaml
@@ -111,8 +111,6 @@ required:
- clock-names
- power-domains
-unevaluatedProperties: false
-
if:
properties:
compatible:
@@ -125,6 +123,8 @@ then:
required:
- resets
+unevaluatedProperties: false
+
examples:
- |
#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
diff --git a/Bindings/serial/renesas,scif.yaml b/Bindings/serial/renesas,scif.yaml
index 99030fc18c45..4610a5bd580c 100644
--- a/Bindings/serial/renesas,scif.yaml
+++ b/Bindings/serial/renesas,scif.yaml
@@ -79,6 +79,7 @@ properties:
- enum:
- renesas,scif-r9a07g043 # RZ/G2UL and RZ/Five
- renesas,scif-r9a07g054 # RZ/V2L
+ - renesas,scif-r9a08g045 # RZ/G3S
- const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback
reg:
diff --git a/Bindings/serial/renesas,scifa.yaml b/Bindings/serial/renesas,scifa.yaml
index 499507678cdf..c98657cf4666 100644
--- a/Bindings/serial/renesas,scifa.yaml
+++ b/Bindings/serial/renesas,scifa.yaml
@@ -77,8 +77,6 @@ required:
- clock-names
- power-domains
-unevaluatedProperties: false
-
if:
properties:
compatible:
@@ -89,6 +87,8 @@ then:
required:
- resets
+unevaluatedProperties: false
+
examples:
- |
#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
diff --git a/Bindings/serial/renesas,scifb.yaml b/Bindings/serial/renesas,scifb.yaml
index 810d8a991fdd..fb695b3111ac 100644
--- a/Bindings/serial/renesas,scifb.yaml
+++ b/Bindings/serial/renesas,scifb.yaml
@@ -77,8 +77,6 @@ required:
- clock-names
- power-domains
-unevaluatedProperties: false
-
if:
properties:
compatible:
@@ -89,6 +87,8 @@ then:
required:
- resets
+unevaluatedProperties: false
+
examples:
- |
#include <dt-bindings/clock/r8a7740-clock.h>
diff --git a/Bindings/serial/rs485.yaml b/Bindings/serial/rs485.yaml
index 303a443d9e29..9418fd66a8e9 100644
--- a/Bindings/serial/rs485.yaml
+++ b/Bindings/serial/rs485.yaml
@@ -29,6 +29,10 @@ properties:
default: 0
maximum: 100
+ rs485-rts-active-high:
+ description: drive RTS high when sending (this is the default).
+ $ref: /schemas/types.yaml#/definitions/flag
+
rs485-rts-active-low:
description: drive RTS low when sending (default is high).
$ref: /schemas/types.yaml#/definitions/flag
diff --git a/Bindings/serial/samsung_uart.yaml b/Bindings/serial/samsung_uart.yaml
index 8bd88d5cbb11..ac60ab1e35e3 100644
--- a/Bindings/serial/samsung_uart.yaml
+++ b/Bindings/serial/samsung_uart.yaml
@@ -24,9 +24,6 @@ properties:
- enum:
- apple,s5l-uart
- axis,artpec8-uart
- - samsung,s3c2410-uart
- - samsung,s3c2412-uart
- - samsung,s3c2440-uart
- samsung,s3c6400-uart
- samsung,s5pv210-uart
- samsung,exynos4210-uart
@@ -86,8 +83,6 @@ required:
- interrupts
- reg
-unevaluatedProperties: false
-
allOf:
- $ref: serial.yaml#
@@ -96,7 +91,6 @@ allOf:
compatible:
contains:
enum:
- - samsung,s3c2410-uart
- samsung,s5pv210-uart
then:
properties:
@@ -128,6 +122,8 @@ allOf:
- const: uart
- const: clk_uart_baud0
+unevaluatedProperties: false
+
examples:
- |
#include <dt-bindings/clock/samsung,s3c64xx-clock.h>
diff --git a/Bindings/serial/serial.yaml b/Bindings/serial/serial.yaml
index ea277560a596..65804ca274ae 100644
--- a/Bindings/serial/serial.yaml
+++ b/Bindings/serial/serial.yaml
@@ -87,16 +87,8 @@ properties:
description:
TX FIFO threshold configuration (in bytes).
-if:
- required:
- - uart-has-rtscts
-then:
- properties:
- cts-gpios: false
- rts-gpios: false
-
patternProperties:
- "^bluetooth|gnss|gps|mcu$":
+ "^(bluetooth|bluetooth-gnss|gnss|gps|mcu)$":
if:
type: object
then:
@@ -136,6 +128,14 @@ patternProperties:
required:
- compatible
+if:
+ required:
+ - uart-has-rtscts
+then:
+ properties:
+ cts-gpios: false
+ rts-gpios: false
+
additionalProperties: true
examples:
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-29 02:56:22 +0000