diff options
Diffstat (limited to 'contrib/llvm-project/clang/lib/Driver/ToolChains/Flang.cpp')
| -rw-r--r-- | contrib/llvm-project/clang/lib/Driver/ToolChains/Flang.cpp | 57 | 
1 files changed, 54 insertions, 3 deletions
diff --git a/contrib/llvm-project/clang/lib/Driver/ToolChains/Flang.cpp b/contrib/llvm-project/clang/lib/Driver/ToolChains/Flang.cpp index 41eaad3bbad0..03d68c3df7fb 100644 --- a/contrib/llvm-project/clang/lib/Driver/ToolChains/Flang.cpp +++ b/contrib/llvm-project/clang/lib/Driver/ToolChains/Flang.cpp @@ -7,6 +7,7 @@  //===----------------------------------------------------------------------===//  #include "Flang.h" +#include "Arch/RISCV.h"  #include "CommonArgs.h"  #include "clang/Basic/CodeGenOptions.h" @@ -14,6 +15,8 @@  #include "llvm/Frontend/Debug/Options.h"  #include "llvm/Support/FileSystem.h"  #include "llvm/Support/Path.h" +#include "llvm/Support/RISCVISAInfo.h" +#include "llvm/TargetParser/RISCVTargetParser.h"  #include <cassert> @@ -203,6 +206,51 @@ void Flang::AddAArch64TargetArgs(const ArgList &Args,    }  } +void Flang::AddRISCVTargetArgs(const ArgList &Args, +                               ArgStringList &CmdArgs) const { +  const llvm::Triple &Triple = getToolChain().getTriple(); +  // Handle -mrvv-vector-bits=<bits> +  if (Arg *A = Args.getLastArg(options::OPT_mrvv_vector_bits_EQ)) { +    StringRef Val = A->getValue(); +    const Driver &D = getToolChain().getDriver(); + +    // Get minimum VLen from march. +    unsigned MinVLen = 0; +    StringRef Arch = riscv::getRISCVArch(Args, Triple); +    auto ISAInfo = llvm::RISCVISAInfo::parseArchString( +        Arch, /*EnableExperimentalExtensions*/ true); +    // Ignore parsing error. +    if (!errorToBool(ISAInfo.takeError())) +      MinVLen = (*ISAInfo)->getMinVLen(); + +    // If the value is "zvl", use MinVLen from march. Otherwise, try to parse +    // as integer as long as we have a MinVLen. +    unsigned Bits = 0; +    if (Val.equals("zvl") && MinVLen >= llvm::RISCV::RVVBitsPerBlock) { +      Bits = MinVLen; +    } else if (!Val.getAsInteger(10, Bits)) { +      // Only accept power of 2 values beteen RVVBitsPerBlock and 65536 that +      // at least MinVLen. +      if (Bits < MinVLen || Bits < llvm::RISCV::RVVBitsPerBlock || +          Bits > 65536 || !llvm::isPowerOf2_32(Bits)) +        Bits = 0; +    } + +    // If we got a valid value try to use it. +    if (Bits != 0) { +      unsigned VScaleMin = Bits / llvm::RISCV::RVVBitsPerBlock; +      CmdArgs.push_back( +          Args.MakeArgString("-mvscale-max=" + llvm::Twine(VScaleMin))); +      CmdArgs.push_back( +          Args.MakeArgString("-mvscale-min=" + llvm::Twine(VScaleMin))); +    } else if (!Val.equals("scalable")) { +      // Handle the unsupported values passed to mrvv-vector-bits. +      D.Diag(diag::err_drv_unsupported_option_argument) +          << A->getSpelling() << Val; +    } +  } +} +  static void addVSDefines(const ToolChain &TC, const ArgList &Args,                           ArgStringList &CmdArgs) { @@ -321,6 +369,9 @@ void Flang::addTargetOptions(const ArgList &Args,      AddAMDGPUTargetArgs(Args, CmdArgs);      break;    case llvm::Triple::riscv64: +    getTargetFeatures(D, Triple, Args, CmdArgs, /*ForAs*/ false); +    AddRISCVTargetArgs(Args, CmdArgs); +    break;    case llvm::Triple::x86_64:      getTargetFeatures(D, Triple, Args, CmdArgs, /*ForAs*/ false);      break; @@ -352,12 +403,10 @@ void Flang::addTargetOptions(const ArgList &Args,          if (A->getValue() == StringRef{"Accelerate"}) {            CmdArgs.push_back("-framework");            CmdArgs.push_back("Accelerate"); -          A->render(Args, CmdArgs);          }        } -    } else { -      A->render(Args, CmdArgs);      } +    A->render(Args, CmdArgs);    }    if (Triple.isKnownWindowsMSVCEnvironment()) { @@ -428,6 +477,8 @@ void Flang::addOffloadOptions(Compilation &C, const InputInfoList &Inputs,        CmdArgs.push_back("-fopenmp-assume-no-thread-state");      if (Args.hasArg(options::OPT_fopenmp_assume_no_nested_parallelism))        CmdArgs.push_back("-fopenmp-assume-no-nested-parallelism"); +    if (Args.hasArg(options::OPT_nogpulib)) +      CmdArgs.push_back("-nogpulib");    }  }  | 
