diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/AllocationOrder.cpp')
-rw-r--r-- | contrib/llvm-project/llvm/lib/CodeGen/AllocationOrder.cpp | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/AllocationOrder.cpp b/contrib/llvm-project/llvm/lib/CodeGen/AllocationOrder.cpp index c99800659bfd..2aef1234ac0e 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/AllocationOrder.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/AllocationOrder.cpp @@ -26,17 +26,15 @@ using namespace llvm; #define DEBUG_TYPE "regalloc" // Compare VirtRegMap::getRegAllocPref(). -AllocationOrder::AllocationOrder(unsigned VirtReg, - const VirtRegMap &VRM, - const RegisterClassInfo &RegClassInfo, - const LiveRegMatrix *Matrix) - : Pos(0), HardHints(false) { +AllocationOrder AllocationOrder::create(unsigned VirtReg, const VirtRegMap &VRM, + const RegisterClassInfo &RegClassInfo, + const LiveRegMatrix *Matrix) { const MachineFunction &MF = VRM.getMachineFunction(); const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo(); - Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); - if (TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix)) - HardHints = true; - rewind(); + auto Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); + SmallVector<MCPhysReg, 16> Hints; + bool HardHints = + TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix); LLVM_DEBUG({ if (!Hints.empty()) { @@ -51,4 +49,5 @@ AllocationOrder::AllocationOrder(unsigned VirtReg, assert(is_contained(Order, Hints[I]) && "Target hint is outside allocation order."); #endif + return AllocationOrder(std::move(Hints), Order, HardHints); } |