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Diffstat (limited to 'contrib/llvm-project/llvm/lib/Support/Host.cpp')
-rw-r--r--contrib/llvm-project/llvm/lib/Support/Host.cpp97
1 files changed, 15 insertions, 82 deletions
diff --git a/contrib/llvm-project/llvm/lib/Support/Host.cpp b/contrib/llvm-project/llvm/lib/Support/Host.cpp
index ef38c1c09413..d491912bdc0c 100644
--- a/contrib/llvm-project/llvm/lib/Support/Host.cpp
+++ b/contrib/llvm-project/llvm/lib/Support/Host.cpp
@@ -35,7 +35,7 @@
#ifdef _MSC_VER
#include <intrin.h>
#endif
-#if defined(__APPLE__) && (!defined(__x86_64__))
+#if defined(__APPLE__) && (defined(__ppc__) || defined(__powerpc__))
#include <mach/host_info.h>
#include <mach/mach.h>
#include <mach/mach_host.h>
@@ -140,9 +140,6 @@ StringRef sys::detail::getHostCPUNameForPowerPC(StringRef ProcCpuinfoContent) {
.Case("POWER8E", "pwr8")
.Case("POWER8NVL", "pwr8")
.Case("POWER9", "pwr9")
- // FIXME: If we get a simulator or machine with the capabilities of
- // mcpu=future, we should revisit this and add the name reported by the
- // simulator/machine.
.Default(generic);
}
@@ -268,12 +265,14 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) {
unsigned Exynos = (Variant << 12) | Part;
switch (Exynos) {
default:
- // Default by falling through to Exynos M3.
+ // Default by falling through to Exynos M1.
LLVM_FALLTHROUGH;
- case 0x1002:
- return "exynos-m3";
- case 0x1003:
- return "exynos-m4";
+
+ case 0x1001:
+ return "exynos-m1";
+
+ case 0x4001:
+ return "exynos-m2";
}
}
@@ -317,7 +316,7 @@ StringRef sys::detail::getHostCPUNameForS390x(StringRef ProcCpuinfoContent) {
unsigned int Id;
if (!Lines[I].drop_front(Pos).getAsInteger(10, Id)) {
if (Id >= 8561 && HaveVectorSupport)
- return "z15";
+ return "arch13";
if (Id >= 3906 && HaveVectorSupport)
return "z14";
if (Id >= 2964 && HaveVectorSupport)
@@ -681,7 +680,7 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
// Skylake Xeon:
case 0x55:
*Type = X86::INTEL_COREI7;
- if (Features2 & (1 << (X86::FEATURE_AVX512BF16 - 32)))
+ if (Features3 & (1 << (X86::FEATURE_AVX512BF16 - 64)))
*Subtype = X86::INTEL_COREI7_COOPERLAKE; // "cooperlake"
else if (Features2 & (1 << (X86::FEATURE_AVX512VNNI - 32)))
*Subtype = X86::INTEL_COREI7_CASCADELAKE; // "cascadelake"
@@ -747,13 +746,6 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
break;
default: // Unknown family 6 CPU, try to guess.
- // TODO detect tigerlake host
- if (Features3 & (1 << (X86::FEATURE_AVX512VP2INTERSECT - 64))) {
- *Type = X86::INTEL_COREI7;
- *Subtype = X86::INTEL_COREI7_TIGERLAKE;
- break;
- }
-
if (Features & (1 << X86::FEATURE_AVX512VBMI2)) {
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_ICELAKE_CLIENT;
@@ -766,7 +758,7 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
break;
}
- if (Features2 & (1 << (X86::FEATURE_AVX512BF16 - 32))) {
+ if (Features3 & (1 << (X86::FEATURE_AVX512BF16 - 64))) {
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_COOPERLAKE;
break;
@@ -962,9 +954,9 @@ static void getAMDProcessorTypeAndSubtype(unsigned Family, unsigned Model,
break; // "btver2"
case 23:
*Type = X86::AMDFAM17H;
- if ((Model >= 0x30 && Model <= 0x3f) || Model == 0x71) {
+ if (Model >= 0x30 && Model <= 0x3f) {
*Subtype = X86::AMDFAM17H_ZNVER2;
- break; // "znver2"; 30h-3fh, 71h: Zen2
+ break; // "znver2"; 30h-3fh: Zen2
}
if (Model <= 0x0f) {
*Subtype = X86::AMDFAM17H_ZNVER1;
@@ -1030,15 +1022,7 @@ static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf,
const unsigned AVXBits = (1 << 27) | (1 << 28);
bool HasAVX = ((ECX & AVXBits) == AVXBits) && !getX86XCR0(&EAX, &EDX) &&
((EAX & 0x6) == 0x6);
-#if defined(__APPLE__)
- // Darwin lazily saves the AVX512 context on first use: trust that the OS will
- // save the AVX512 context if we use AVX512 instructions, even the bit is not
- // set right now.
- bool HasAVX512Save = true;
-#else
- // AVX512 requires additional context to be saved by the OS.
bool HasAVX512Save = HasAVX && ((EAX & 0xe0) == 0xe0);
-#endif
if (HasAVX)
setFeature(X86::FEATURE_AVX);
@@ -1050,7 +1034,7 @@ static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf,
setFeature(X86::FEATURE_BMI);
if (HasLeaf7 && ((EBX >> 5) & 1) && HasAVX)
setFeature(X86::FEATURE_AVX2);
- if (HasLeaf7 && ((EBX >> 8) & 1))
+ if (HasLeaf7 && ((EBX >> 9) & 1))
setFeature(X86::FEATURE_BMI2);
if (HasLeaf7 && ((EBX >> 16) & 1) && HasAVX512Save)
setFeature(X86::FEATURE_AVX512F);
@@ -1094,13 +1078,6 @@ static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf,
setFeature(X86::FEATURE_AVX5124VNNIW);
if (HasLeaf7 && ((EDX >> 3) & 1) && HasAVX512Save)
setFeature(X86::FEATURE_AVX5124FMAPS);
- if (HasLeaf7 && ((EDX >> 8) & 1) && HasAVX512Save)
- setFeature(X86::FEATURE_AVX512VP2INTERSECT);
-
- bool HasLeaf7Subleaf1 =
- MaxLeaf >= 7 && !getX86CpuIDAndInfoEx(0x7, 0x1, &EAX, &EBX, &ECX, &EDX);
- if (HasLeaf7Subleaf1 && ((EAX >> 5) & 1) && HasAVX512Save)
- setFeature(X86::FEATURE_AVX512BF16);
unsigned MaxExtLevel;
getX86CpuIDAndInfo(0x80000000, &MaxExtLevel, &EBX, &ECX, &EDX);
@@ -1231,33 +1208,6 @@ StringRef sys::getHostCPUName() {
StringRef Content = P ? P->getBuffer() : "";
return detail::getHostCPUNameForS390x(Content);
}
-#elif defined(__APPLE__) && defined(__aarch64__)
-StringRef sys::getHostCPUName() {
- return "cyclone";
-}
-#elif defined(__APPLE__) && defined(__arm__)
-StringRef sys::getHostCPUName() {
- host_basic_info_data_t hostInfo;
- mach_msg_type_number_t infoCount;
-
- infoCount = HOST_BASIC_INFO_COUNT;
- mach_port_t hostPort = mach_host_self();
- host_info(hostPort, HOST_BASIC_INFO, (host_info_t)&hostInfo,
- &infoCount);
- mach_port_deallocate(mach_task_self(), hostPort);
-
- if (hostInfo.cpu_type != CPU_TYPE_ARM) {
- assert(false && "CPUType not equal to ARM should not be possible on ARM");
- return "generic";
- }
- switch (hostInfo.cpu_subtype) {
- case CPU_SUBTYPE_ARM_V7S:
- return "swift";
- default:;
- }
-
- return "generic";
-}
#else
StringRef sys::getHostCPUName() { return "generic"; }
#endif
@@ -1375,15 +1325,8 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
// switch, then we have full AVX support.
bool HasAVXSave = ((ECX >> 27) & 1) && ((ECX >> 28) & 1) &&
!getX86XCR0(&EAX, &EDX) && ((EAX & 0x6) == 0x6);
-#if defined(__APPLE__)
- // Darwin lazily saves the AVX512 context on first use: trust that the OS will
- // save the AVX512 context if we use AVX512 instructions, even the bit is not
- // set right now.
- bool HasAVX512Save = true;
-#else
// AVX512 requires additional context to be saved by the OS.
bool HasAVX512Save = HasAVXSave && ((EAX & 0xe0) == 0xe0);
-#endif
Features["avx"] = HasAVXSave;
Features["fma"] = ((ECX >> 12) & 1) && HasAVXSave;
@@ -1426,6 +1369,7 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
Features["bmi2"] = HasLeaf7 && ((EBX >> 8) & 1);
Features["invpcid"] = HasLeaf7 && ((EBX >> 10) & 1);
Features["rtm"] = HasLeaf7 && ((EBX >> 11) & 1);
+ Features["mpx"] = HasLeaf7 && ((EBX >> 14) & 1);
// AVX512 is only supported if the OS supports the context save for it.
Features["avx512f"] = HasLeaf7 && ((EBX >> 16) & 1) && HasAVX512Save;
Features["avx512dq"] = HasLeaf7 && ((EBX >> 17) & 1) && HasAVX512Save;
@@ -1555,17 +1499,6 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
return true;
}
-#elif defined(_WIN32) && (defined(__aarch64__) || defined(_M_ARM64))
-bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
- if (IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE))
- Features["neon"] = true;
- if (IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE))
- Features["crc"] = true;
- if (IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE))
- Features["crypto"] = true;
-
- return true;
-}
#else
bool sys::getHostCPUFeatures(StringMap<bool> &Features) { return false; }
#endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-12-01 07:29:43 +0000