diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUGISel.td')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUGISel.td b/contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUGISel.td index 7fd94a977be7..5747fc0ca8e6 100644 --- a/contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUGISel.td +++ b/contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUGISel.td @@ -47,10 +47,30 @@ def gi_vop3pmods : GIComplexOperandMatcher<s32, "selectVOP3PMods">, GIComplexPatternEquiv<VOP3PMods>; +def gi_vop3pmodsdot : + GIComplexOperandMatcher<s32, "selectVOP3PModsDOT">, + GIComplexPatternEquiv<VOP3PModsDOT>; + +def gi_dotiuvop3pmods : + GIComplexOperandMatcher<s32, "selectDotIUVOP3PMods">, + GIComplexPatternEquiv<DotIUVOP3PMods>; + +def gi_wmmaopselvop3pmods : + GIComplexOperandMatcher<s32, "selectWMMAOpSelVOP3PMods">, + GIComplexPatternEquiv<WMMAOpSelVOP3PMods>; + def gi_vop3opselmods : GIComplexOperandMatcher<s32, "selectVOP3OpSelMods">, GIComplexPatternEquiv<VOP3OpSelMods>; +def gi_vinterpmods : + GIComplexOperandMatcher<s32, "selectVINTERPMods">, + GIComplexPatternEquiv<VINTERPMods>; + +def gi_vinterpmods_hi : + GIComplexOperandMatcher<s32, "selectVINTERPModsHi">, + GIComplexPatternEquiv<VINTERPModsHi>; + // FIXME: Why do we have both VOP3OpSel and VOP3OpSelMods? def gi_vop3opsel : GIComplexOperandMatcher<s32, "selectVOP3OpSelMods">, @@ -93,6 +113,10 @@ def gi_flat_scratch_saddr : GIComplexOperandMatcher<s32, "selectScratchSAddr">, GIComplexPatternEquiv<ScratchSAddr>; +def gi_flat_scratch_svaddr : + GIComplexOperandMatcher<s32, "selectScratchSVAddr">, + GIComplexPatternEquiv<ScratchSVAddr>; + def gi_ds_1addr_1offset : GIComplexOperandMatcher<s32, "selectDS1Addr1Offset">, GIComplexPatternEquiv<DS1Addr1Offset>; @@ -123,7 +147,7 @@ def gi_smrd_buffer_imm32 : // Separate load nodes are defined to glue m0 initialization in // SelectionDAG. The GISel selector can just insert m0 initialization -// directly before before selecting a glue-less load, so hide this +// directly before selecting a glue-less load, so hide this // distinction. def : GINodeEquiv<G_LOAD, AMDGPUld_glue> { @@ -222,6 +246,9 @@ def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_FMAX, SIbuffer_atomic_fmax>; def : GINodeEquiv<G_AMDGPU_BUFFER_ATOMIC_CMPSWAP, SIbuffer_atomic_cmpswap>; def : GINodeEquiv<G_AMDGPU_S_BUFFER_LOAD, SIsbuffer_load>; +def : GINodeEquiv<G_FPTRUNC_ROUND_UPWARD, SIfptrunc_round_upward>; +def : GINodeEquiv<G_FPTRUNC_ROUND_DOWNWARD, SIfptrunc_round_downward>; + class GISelSop2Pat < SDPatternOperator node, Instruction inst, |