diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 1287 |
1 files changed, 762 insertions, 525 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index c3df7dc88d79..9acd49292268 100644 --- a/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -13,8 +13,8 @@ #include "TargetInfo/ARMTargetInfo.h" #include "Utils/ARMBaseInfo.h" #include "llvm/MC/MCContext.h" +#include "llvm/MC/MCDecoderOps.h" #include "llvm/MC/MCDisassembler/MCDisassembler.h" -#include "llvm/MC/MCFixedLenDisassembler.h" #include "llvm/MC/MCInst.h" #include "llvm/MC/MCInstrDesc.h" #include "llvm/MC/MCSubtargetInfo.h" @@ -175,408 +175,529 @@ static bool Check(DecodeStatus &Out, DecodeStatus In) { // Forward declare these because the autogenerated code will reference them. // Definitions are further down. static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeGPRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); -static DecodeStatus DecodeGPRwithAPSRRegisterClass(MCInst &Inst, - unsigned RegNo, uint64_t Address, - const void *Decoder); -static DecodeStatus DecodeGPRwithZRRegisterClass(MCInst &Inst, - unsigned RegNo, uint64_t Address, - const void *Decoder); -static DecodeStatus DecodeGPRwithZRnospRegisterClass( - MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder); + const MCDisassembler *Decoder); +static DecodeStatus +DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus +DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus +DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeHPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst, - unsigned RegNo, + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeMQPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeMQQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeMQQQQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeDPairSpacedRegisterClass(MCInst &Inst, - unsigned RegNo, uint64_t Address, - const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus +DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeAddrMode2IdxInstruction(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus +DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst,unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); -static DecodeStatus DecodeMemMultipleWritebackInstruction(MCInst & Inst, - unsigned Insn, - uint64_t Adddress, - const void *Decoder); +static DecodeStatus +DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, + uint64_t Adddress, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeAddrMode7Operand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst,unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst,unsigned Val, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst,unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Val, + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst, unsigned Val, + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeShiftRight8Imm(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeShiftRight16Imm(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeShiftRight32Imm(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeShiftRight64Imm(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -template<int shift> + uint64_t Address, + const MCDisassembler *Decoder); +template <int shift> static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVCVTImmOperand(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeNEONComplexLane64Instruction(MCInst &Inst, - unsigned Val, - uint64_t Address, - const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus +DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, - uint64_t Address, const void* Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, - uint64_t Address, const void* Decoder); -static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, - uint64_t Address, const void* Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn, - uint64_t Address, const void* Decoder); -static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeT2Imm7S4(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder); -static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst,unsigned Val, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -template<int shift> -static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + const MCDisassembler *Decoder); +static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst, unsigned Val, + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); +template <int shift> +static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -template<int shift> + uint64_t Address, + const MCDisassembler *Decoder); +template <int shift> static DecodeStatus DecodeTAddrModeImm7(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -template<int shift, int WriteBack> + uint64_t Address, + const MCDisassembler *Decoder); +template <int shift, int WriteBack> static DecodeStatus DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbTableBranch(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeThumbBCCTargetOperand(MCInst &Inst,unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val, + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeIT(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst,unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst,unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeT2Adr(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeIT(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeT2Adr(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); -static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); +static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); template <bool isSigned, bool isNeg, bool zeroPermitted, int size> static DecodeStatus DecodeBFLabelOperand(MCInst &Inst, unsigned val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeBFAfterTargetOperand(MCInst &Inst, unsigned val, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodePredNoALOperand(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeLongShiftOperand(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeVPTMaskOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeVpredROperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, - uint64_t Address, - const void *Decoder); -static DecodeStatus DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, - uint64_t Address, - const void *Decoder); -static DecodeStatus DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, - uint64_t Address, - const void *Decoder); -static DecodeStatus DecodeRestrictedFPPredicateOperand(MCInst &Inst, - unsigned Val, - uint64_t Address, - const void *Decoder); -template<bool Writeback> + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus +DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus +DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus +DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus +DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); +template <bool Writeback> static DecodeStatus DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); -template<int shift> + const MCDisassembler *Decoder); +template <int shift> static DecodeStatus DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -template<int shift> + uint64_t Address, + const MCDisassembler *Decoder); +template <int shift> static DecodeStatus DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -template<int shift> + uint64_t Address, + const MCDisassembler *Decoder); +template <int shift> static DecodeStatus DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -template<unsigned MinLog, unsigned MaxLog> + uint64_t Address, + const MCDisassembler *Decoder); +template <unsigned MinLog, unsigned MaxLog> static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder); -template<unsigned start> -static DecodeStatus DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, - uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); +template <unsigned start> +static DecodeStatus +DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder); + const MCDisassembler *Decoder); static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); typedef DecodeStatus OperandDecoder(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder); -template<bool scalar, OperandDecoder predicate_decoder> -static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +template <bool scalar, OperandDecoder predicate_decoder> +static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); -static DecodeStatus DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, - uint64_t Address, - const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); +static DecodeStatus +DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder); static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder); + uint64_t Address, + const MCDisassembler *Decoder); #include "ARMGenDisassemblerTables.inc" @@ -710,11 +831,12 @@ extern const MCInstrDesc ARMInsts[]; /// operand to the MCInst and false otherwise. static bool tryAddingSymbolicOperand(uint64_t Address, int32_t Value, bool isBranch, uint64_t InstSize, - MCInst &MI, const void *Decoder) { - const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder); + MCInst &MI, + const MCDisassembler *Decoder) { // FIXME: Does it make sense for value to be negative? - return Dis->tryAddingSymbolicOperand(MI, (uint32_t)Value, Address, isBranch, - /* Offset */ 0, InstSize); + return Decoder->tryAddingSymbolicOperand(MI, (uint32_t)Value, Address, + isBranch, /*Offset=*/0, /*OpSize=*/0, + InstSize); } /// tryAddingPcLoadReferenceComment - trys to add a comment as to what is being @@ -727,7 +849,7 @@ static bool tryAddingSymbolicOperand(uint64_t Address, int32_t Value, /// a literal 'C' string if the referenced address of the literal pool's entry /// is an address into a section with 'C' string literals. static void tryAddingPcLoadReferenceComment(uint64_t Address, int Value, - const void *Decoder) { + const MCDisassembler *Decoder) { const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder); Dis->tryAddingPcLoadReferenceComment(Value, Address); } @@ -1142,7 +1264,8 @@ static const uint16_t CLRMGPRDecoderTable[] = { }; static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 15) return MCDisassembler::Fail; @@ -1153,7 +1276,7 @@ static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 15) return MCDisassembler::Fail; @@ -1165,9 +1288,9 @@ static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo, return MCDisassembler::Success; } -static DecodeStatus -DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (RegNo == 15) @@ -1180,7 +1303,7 @@ DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, static DecodeStatus DecodeGPRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (RegNo == 13) @@ -1192,8 +1315,8 @@ static DecodeStatus DecodeGPRnospRegisterClass(MCInst &Inst, unsigned RegNo, } static DecodeStatus -DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { +DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (RegNo == 15) @@ -1207,8 +1330,8 @@ DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, } static DecodeStatus -DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { +DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (RegNo == 15) @@ -1225,8 +1348,8 @@ DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, } static DecodeStatus -DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { +DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (RegNo == 13) return MCDisassembler::Fail; @@ -1235,7 +1358,8 @@ DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, } static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 7) return MCDisassembler::Fail; return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder); @@ -1247,7 +1371,8 @@ static const uint16_t GPRPairDecoderTable[] = { }; static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; // According to the Arm ARM RegNo = 14 is undefined, but we return fail @@ -1263,8 +1388,9 @@ static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, return S; } -static DecodeStatus DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { +static DecodeStatus +DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 13) return MCDisassembler::Fail; @@ -1278,7 +1404,7 @@ static DecodeStatus DecodeGPRPairnospRegisterClass(MCInst &Inst, unsigned RegNo, static DecodeStatus DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo != 13) return MCDisassembler::Fail; @@ -1288,7 +1414,8 @@ static DecodeStatus DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo, } static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned Register = 0; switch (RegNo) { case 0: @@ -1318,7 +1445,8 @@ static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, } static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; const FeatureBitset &featureBits = @@ -1343,7 +1471,8 @@ static const uint16_t SPRDecoderTable[] = { }; static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 31) return MCDisassembler::Fail; @@ -1353,7 +1482,8 @@ static DecodeStatus DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, } static DecodeStatus DecodeHPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { return DecodeSPRRegisterClass(Inst, RegNo, Address, Decoder); } @@ -1369,7 +1499,8 @@ static const uint16_t DPRDecoderTable[] = { }; static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { const FeatureBitset &featureBits = ((const MCDisassembler*)Decoder)->getSubtargetInfo().getFeatureBits(); @@ -1384,22 +1515,24 @@ static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, } static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 7) return MCDisassembler::Fail; return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder); } static DecodeStatus DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 15) return MCDisassembler::Fail; return DecodeSPRRegisterClass(Inst, RegNo, Address, Decoder); } -static DecodeStatus -DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 15) return MCDisassembler::Fail; return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder); @@ -1413,7 +1546,8 @@ static const uint16_t QPRDecoderTable[] = { }; static DecodeStatus DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 31 || (RegNo & 1) != 0) return MCDisassembler::Fail; RegNo >>= 1; @@ -1433,7 +1567,8 @@ static const uint16_t DPairDecoderTable[] = { }; static DecodeStatus DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 30) return MCDisassembler::Fail; @@ -1453,10 +1588,9 @@ static const uint16_t DPairSpacedDecoderTable[] = { ARM::D28_D30, ARM::D29_D31 }; -static DecodeStatus DecodeDPairSpacedRegisterClass(MCInst &Inst, - unsigned RegNo, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 29) return MCDisassembler::Fail; @@ -1466,7 +1600,8 @@ static DecodeStatus DecodeDPairSpacedRegisterClass(MCInst &Inst, } static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (Val == 0xF) return MCDisassembler::Fail; // AL predicate is not allowed on Thumb1 branches. @@ -1483,7 +1618,8 @@ static DecodeStatus DecodePredicateOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (Val) Inst.addOperand(MCOperand::createReg(ARM::CPSR)); else @@ -1492,7 +1628,8 @@ static DecodeStatus DecodeCCOutOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rm = fieldFromInstruction(Val, 0, 4); @@ -1529,7 +1666,8 @@ static DecodeStatus DecodeSORegImmOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rm = fieldFromInstruction(Val, 0, 4); @@ -1564,7 +1702,8 @@ static DecodeStatus DecodeSORegRegOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; bool NeedDisjointWriteback = false; @@ -1611,7 +1750,8 @@ static DecodeStatus DecodeRegListOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Vd = fieldFromInstruction(Val, 8, 5); @@ -1635,7 +1775,8 @@ static DecodeStatus DecodeSPRRegListOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Vd = fieldFromInstruction(Val, 8, 5); @@ -1660,7 +1801,8 @@ static DecodeStatus DecodeDPRRegListOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { // This operand encodes a mask of contiguous zeros between a specified MSB // and LSB. To decode it, we create the mask of all bits MSB-and-lower, // the mask of all bits LSB-and-lower, and then xor them to create @@ -1687,7 +1829,8 @@ static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned pred = fieldFromInstruction(Insn, 28, 4); @@ -1865,8 +2008,8 @@ static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus -DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -1971,7 +2114,8 @@ DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 13, 4); @@ -2013,9 +2157,22 @@ static DecodeStatus DecodeSORegMemOperand(MCInst &Inst, unsigned Val, return S; } -static DecodeStatus -DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeTSBInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { + if (Inst.getOpcode() != ARM::TSB && Inst.getOpcode() != ARM::t2TSB) + return MCDisassembler::Fail; + + // The "csync" operand is not encoded into the "tsb" instruction (as this is + // the only available operand), but LLVM expects the instruction to have one + // operand, so we need to add the csync when decoding. + Inst.addOperand(MCOperand::createImm(ARM_TSB::CSYNC)); + return MCDisassembler::Success; +} + +static DecodeStatus DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 12, 4); @@ -2206,7 +2363,8 @@ DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -2235,7 +2393,8 @@ static DecodeStatus DecodeRFEInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -2257,9 +2416,10 @@ static DecodeStatus DecodeQADDInstruction(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeMemMultipleWritebackInstruction(MCInst &Inst, - unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus +DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -2350,7 +2510,8 @@ static DecodeStatus DecodeMemMultipleWritebackInstruction(MCInst &Inst, // Check for UNPREDICTABLE predicated ESB instruction static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned pred = fieldFromInstruction(Insn, 28, 4); unsigned imm8 = fieldFromInstruction(Insn, 0, 8); const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder); @@ -2372,7 +2533,8 @@ static DecodeStatus DecodeHINTInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned imod = fieldFromInstruction(Insn, 18, 2); unsigned M = fieldFromInstruction(Insn, 17, 1); unsigned iflags = fieldFromInstruction(Insn, 6, 3); @@ -2419,7 +2581,8 @@ static DecodeStatus DecodeCPSInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned imod = fieldFromInstruction(Insn, 9, 2); unsigned M = fieldFromInstruction(Insn, 8, 1); unsigned iflags = fieldFromInstruction(Insn, 5, 3); @@ -2460,9 +2623,9 @@ static DecodeStatus DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { unsigned imm = fieldFromInstruction(Insn, 0, 8); unsigned Opcode = ARM::t2HINT; @@ -2486,7 +2649,8 @@ static DecodeStatus DecodeT2HintSpaceInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 8, 4); @@ -2510,7 +2674,8 @@ static DecodeStatus DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -2537,7 +2702,8 @@ static DecodeStatus DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 16, 4); @@ -2565,7 +2731,8 @@ static DecodeStatus DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Pred = fieldFromInstruction(Insn, 28, 4); @@ -2586,7 +2753,8 @@ static DecodeStatus DecodeTSTInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Imm = fieldFromInstruction(Insn, 9, 1); @@ -2614,7 +2782,8 @@ static DecodeStatus DecodeSETPANInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned add = fieldFromInstruction(Val, 12, 1); @@ -2634,7 +2803,8 @@ static DecodeStatus DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 9, 4); @@ -2654,7 +2824,8 @@ static DecodeStatus DecodeAddrMode5Operand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 9, 4); @@ -2674,13 +2845,14 @@ static DecodeStatus DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeAddrMode7Operand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { return DecodeGPRRegisterClass(Inst, Val, Address, Decoder); } -static DecodeStatus -DecodeT2BInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeT2BInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus Status = MCDisassembler::Success; // Note the J1 and J2 values are from the encoded instruction. So here @@ -2705,9 +2877,9 @@ DecodeT2BInstruction(MCInst &Inst, unsigned Insn, return Status; } -static DecodeStatus -DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned pred = fieldFromInstruction(Insn, 28, 4); @@ -2736,7 +2908,8 @@ DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rm = fieldFromInstruction(Val, 0, 4); @@ -2753,7 +2926,8 @@ static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -3029,7 +3203,8 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned type = fieldFromInstruction(Insn, 8, 4); unsigned align = fieldFromInstruction(Insn, 4, 2); if (type == 6 && (align & 2)) return MCDisassembler::Fail; @@ -3042,7 +3217,8 @@ static DecodeStatus DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned size = fieldFromInstruction(Insn, 6, 2); if (size == 3) return MCDisassembler::Fail; @@ -3057,7 +3233,8 @@ static DecodeStatus DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned size = fieldFromInstruction(Insn, 6, 2); if (size == 3) return MCDisassembler::Fail; @@ -3070,7 +3247,8 @@ static DecodeStatus DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned size = fieldFromInstruction(Insn, 6, 2); if (size == 3) return MCDisassembler::Fail; @@ -3080,7 +3258,8 @@ static DecodeStatus DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -3350,7 +3529,8 @@ static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -3397,7 +3577,8 @@ static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -3445,7 +3626,8 @@ static DecodeStatus DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -3480,7 +3662,8 @@ static DecodeStatus DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -3531,9 +3714,9 @@ static DecodeStatus DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus -DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -3577,9 +3760,9 @@ DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus -DecodeMVEModImmInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeMVEModImmInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) | @@ -3607,7 +3790,8 @@ DecodeMVEModImmInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Qd = fieldFromInstruction(Insn, 13, 3); @@ -3632,7 +3816,8 @@ static DecodeStatus DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -3651,31 +3836,36 @@ static DecodeStatus DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeShiftRight8Imm(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createImm(8 - Val)); return MCDisassembler::Success; } static DecodeStatus DecodeShiftRight16Imm(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createImm(16 - Val)); return MCDisassembler::Success; } static DecodeStatus DecodeShiftRight32Imm(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createImm(32 - Val)); return MCDisassembler::Success; } static DecodeStatus DecodeShiftRight64Imm(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createImm(64 - Val)); return MCDisassembler::Success; } static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -3711,7 +3901,8 @@ static DecodeStatus DecodeTBLInstruction(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned dst = fieldFromInstruction(Insn, 8, 3); @@ -3735,7 +3926,8 @@ static DecodeStatus DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, } static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<12>(Val<<1) + 4, true, 2, Inst, Decoder)) Inst.addOperand(MCOperand::createImm(SignExtend32<12>(Val << 1))); @@ -3743,7 +3935,8 @@ static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<21>(Val) + 4, true, 4, Inst, Decoder)) Inst.addOperand(MCOperand::createImm(SignExtend32<21>(Val))); @@ -3751,7 +3944,8 @@ static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (!tryAddingSymbolicOperand(Address, Address + (Val<<1) + 4, true, 2, Inst, Decoder)) Inst.addOperand(MCOperand::createImm(Val << 1)); @@ -3759,7 +3953,8 @@ static DecodeStatus DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 0, 3); @@ -3774,7 +3969,8 @@ static DecodeStatus DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 0, 3); @@ -3788,7 +3984,8 @@ static DecodeStatus DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned imm = Val << 2; Inst.addOperand(MCOperand::createImm(imm)); @@ -3798,7 +3995,8 @@ static DecodeStatus DecodeThumbAddrModePC(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createReg(ARM::SP)); Inst.addOperand(MCOperand::createImm(Val)); @@ -3806,7 +4004,8 @@ static DecodeStatus DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 6, 4); @@ -3835,7 +4034,8 @@ static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 12, 4); @@ -3918,7 +4118,8 @@ static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, - uint64_t Address, const void* Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -4002,7 +4203,8 @@ static DecodeStatus DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, - uint64_t Address, const void* Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -4081,8 +4283,8 @@ static DecodeStatus DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, - uint64_t Address, const void* Decoder) { +static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -4121,7 +4323,8 @@ static DecodeStatus DecodeT2LoadT(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn, - uint64_t Address, const void* Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 12, 4); @@ -4173,8 +4376,8 @@ static DecodeStatus DecodeT2LoadLabel(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { if (Val == 0) Inst.addOperand(MCOperand::createImm(INT32_MIN)); else { @@ -4188,7 +4391,7 @@ static DecodeStatus DecodeT2Imm8S4(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (Val == 0) Inst.addOperand(MCOperand::createImm(INT32_MIN)); else { @@ -4203,7 +4406,8 @@ static DecodeStatus DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address, } static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 9, 4); @@ -4219,7 +4423,7 @@ static DecodeStatus DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val, static DecodeStatus DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 8, 4); @@ -4233,8 +4437,9 @@ static DecodeStatus DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val, return S; } -static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst,unsigned Val, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst, unsigned Val, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 8, 4); @@ -4248,8 +4453,8 @@ static DecodeStatus DecodeT2AddrModeImm0_1020s4(MCInst &Inst,unsigned Val, return S; } -static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { int imm = Val & 0xFF; if (Val == 0) imm = INT32_MIN; @@ -4260,9 +4465,9 @@ static DecodeStatus DecodeT2Imm8(MCInst &Inst, unsigned Val, return MCDisassembler::Success; } -template<int shift> -static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { +template <int shift> +static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { int imm = Val & 0x7F; if (Val == 0) imm = INT32_MIN; @@ -4276,7 +4481,8 @@ static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 9, 4); @@ -4321,10 +4527,10 @@ static DecodeStatus DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val, return S; } -template<int shift> +template <int shift> static DecodeStatus DecodeTAddrModeImm7(MCInst &Inst, unsigned Val, - uint64_t Address, - const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 8, 3); @@ -4338,10 +4544,10 @@ static DecodeStatus DecodeTAddrModeImm7(MCInst &Inst, unsigned Val, return S; } -template<int shift, int WriteBack> +template <int shift, int WriteBack> static DecodeStatus DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 8, 4); @@ -4358,7 +4564,8 @@ static DecodeStatus DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 12, 4); @@ -4419,7 +4626,8 @@ static DecodeStatus DecodeT2LdStPre(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 13, 4); @@ -4445,7 +4653,8 @@ static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned imm = fieldFromInstruction(Insn, 0, 7); Inst.addOperand(MCOperand::createReg(ARM::SP)); @@ -4456,7 +4665,8 @@ static DecodeStatus DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, } static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (Inst.getOpcode() == ARM::tADDrSP) { @@ -4481,7 +4691,8 @@ static DecodeStatus DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, } static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned imod = fieldFromInstruction(Insn, 4, 1) | 0x2; unsigned flags = fieldFromInstruction(Insn, 0, 3); @@ -4492,7 +4703,8 @@ static DecodeStatus DecodeThumbCPS(MCInst &Inst, uint16_t Insn, } static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rm = fieldFromInstruction(Insn, 0, 4); unsigned add = fieldFromInstruction(Insn, 4, 1); @@ -4505,7 +4717,8 @@ static DecodeStatus DecodePostIdxReg(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 3, 4); unsigned Qm = fieldFromInstruction(Insn, 0, 3); @@ -4518,9 +4731,10 @@ static DecodeStatus DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn, return S; } -template<int shift> +template <int shift> static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Qm = fieldFromInstruction(Insn, 8, 3); int imm = fieldFromInstruction(Insn, 0, 7); @@ -4542,7 +4756,8 @@ static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { // Val is passed in as S:J1:J2:imm10H:imm10L:'0' // Note only one trailing zero not two. Also the J1 and J2 values are from // the encoded instruction. So here change to I1 and I2 values via: @@ -4566,7 +4781,8 @@ static DecodeStatus DecodeThumbBLXOffset(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (Val == 0xA || Val == 0xB) return MCDisassembler::Fail; @@ -4580,9 +4796,9 @@ static DecodeStatus DecodeCoprocessor(MCInst &Inst, unsigned Val, return MCDisassembler::Success; } -static DecodeStatus -DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { const FeatureBitset &FeatureBits = ((const MCDisassembler*)Decoder)->getSubtargetInfo().getFeatureBits(); DecodeStatus S = MCDisassembler::Success; @@ -4598,9 +4814,9 @@ DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus -DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned pred = fieldFromInstruction(Insn, 22, 4); @@ -4641,8 +4857,8 @@ DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, // Decode a shifted immediate operand. These basically consist // of an 8-bit value, and a 4-bit directive that specifies either // a splat operation or a rotation. -static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { unsigned ctrl = fieldFromInstruction(Val, 10, 2); if (ctrl == 0) { unsigned byte = fieldFromInstruction(Val, 8, 2); @@ -4672,9 +4888,9 @@ static DecodeStatus DecodeT2SOImm(MCInst &Inst, unsigned Val, return MCDisassembler::Success; } -static DecodeStatus -DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val, + uint64_t Address, + const MCDisassembler *Decoder) { if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<9>(Val<<1) + 4, true, 2, Inst, Decoder)) Inst.addOperand(MCOperand::createImm(SignExtend32<9>(Val << 1))); @@ -4683,7 +4899,7 @@ DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val, static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { // Val is passed in as S:J1:J2:imm10:imm11 // Note no trailing zero after imm11. Also the J1 and J2 values are from // the encoded instruction. So here change to I1 and I2 values via: @@ -4706,7 +4922,8 @@ static DecodeStatus DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (Val & ~0xf) return MCDisassembler::Fail; @@ -4715,7 +4932,8 @@ static DecodeStatus DecodeMemBarrierOption(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (Val & ~0xf) return MCDisassembler::Fail; @@ -4723,8 +4941,8 @@ static DecodeStatus DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Val, return MCDisassembler::Success; } -static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; const FeatureBitset &FeatureBits = ((const MCDisassembler*)Decoder)->getSubtargetInfo().getFeatureBits(); @@ -4825,7 +5043,8 @@ static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { unsigned R = fieldFromInstruction(Val, 5, 1); unsigned SysM = fieldFromInstruction(Val, 0, 5); @@ -4840,7 +5059,8 @@ static DecodeStatus DecodeBankedReg(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 12, 4); @@ -4862,7 +5082,7 @@ static DecodeStatus DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rd = fieldFromInstruction(Insn, 12, 4); @@ -4887,7 +5107,8 @@ static DecodeStatus DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -4912,7 +5133,8 @@ static DecodeStatus DecodeLDRPreImm(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -4939,7 +5161,8 @@ static DecodeStatus DecodeLDRPreReg(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -4964,7 +5187,8 @@ static DecodeStatus DecodeSTRPreImm(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -4988,8 +5212,8 @@ static DecodeStatus DecodeSTRPreReg(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -5055,8 +5279,8 @@ static DecodeStatus DecodeVLD1LN(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -5120,8 +5344,8 @@ static DecodeStatus DecodeVST1LN(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -5187,8 +5411,8 @@ static DecodeStatus DecodeVLD2LN(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -5250,8 +5474,8 @@ static DecodeStatus DecodeVST2LN(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -5320,8 +5544,8 @@ static DecodeStatus DecodeVLD3LN(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -5383,8 +5607,8 @@ static DecodeStatus DecodeVST3LN(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -5464,8 +5688,8 @@ static DecodeStatus DecodeVLD4LN(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -5536,8 +5760,8 @@ static DecodeStatus DecodeVST4LN(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 12, 4); unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); @@ -5562,8 +5786,8 @@ static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 12, 4); unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); @@ -5588,8 +5812,8 @@ static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned pred = fieldFromInstruction(Insn, 4, 4); unsigned mask = fieldFromInstruction(Insn, 0, 4); @@ -5617,9 +5841,9 @@ static DecodeStatus DecodeIT(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus -DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 12, 4); @@ -5654,9 +5878,9 @@ DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus -DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 12, 4); @@ -5689,8 +5913,8 @@ DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, + const MCDisassembler *Decoder) { unsigned sign1 = fieldFromInstruction(Insn, 21, 1); unsigned sign2 = fieldFromInstruction(Insn, 23, 1); if (sign1 != sign2) return MCDisassembler::Fail; @@ -5717,7 +5941,7 @@ static DecodeStatus DecodeT2Adr(MCInst &Inst, uint32_t Insn, static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; // Shift of "asr #32" is not allowed in Thumb2 mode. @@ -5726,8 +5950,8 @@ static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val, return S; } -static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { unsigned Rt = fieldFromInstruction(Insn, 12, 4); unsigned Rt2 = fieldFromInstruction(Insn, 0, 4); unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -5753,8 +5977,8 @@ static DecodeStatus DecodeSwap(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { const FeatureBitset &featureBits = ((const MCDisassembler *)Decoder)->getSubtargetInfo().getFeatureBits(); bool hasFullFP16 = featureBits[ARM::FeatureFullFP16]; @@ -5812,8 +6036,8 @@ static DecodeStatus DecodeVCVTD(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { const FeatureBitset &featureBits = ((const MCDisassembler *)Decoder)->getSubtargetInfo().getFeatureBits(); bool hasFullFP16 = featureBits[ARM::FeatureFullFP16]; @@ -5871,10 +6095,10 @@ static DecodeStatus DecodeVCVTQ(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeNEONComplexLane64Instruction(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0); Vd |= (fieldFromInstruction(Insn, 22, 1) << 4); unsigned Vn = (fieldFromInstruction(Insn, 16, 4) << 0); @@ -5904,8 +6128,8 @@ static DecodeStatus DecodeNEONComplexLane64Instruction(MCInst &Inst, return S; } -static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { +static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rn = fieldFromInstruction(Val, 16, 4); @@ -5932,7 +6156,8 @@ static DecodeStatus DecodeLDR(MCInst &Inst, unsigned Val, } static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned CRm = fieldFromInstruction(Val, 0, 4); @@ -5978,7 +6203,7 @@ static DecodeStatus DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val, static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { const FeatureBitset &featureBits = ((const MCDisassembler *)Decoder)->getSubtargetInfo().getFeatureBits(); DecodeStatus S = MCDisassembler::Success; @@ -6030,7 +6255,7 @@ static DecodeStatus DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val, template <bool isSigned, bool isNeg, bool zeroPermitted, int size> static DecodeStatus DecodeBFLabelOperand(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (Val == 0 && !zeroPermitted) S = MCDisassembler::Fail; @@ -6049,7 +6274,7 @@ static DecodeStatus DecodeBFLabelOperand(MCInst &Inst, unsigned Val, static DecodeStatus DecodeBFAfterTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { uint64_t LocImm = Inst.getOperand(0).getImm(); Val = LocImm + (2 << Val); @@ -6061,7 +6286,7 @@ static DecodeStatus DecodeBFAfterTargetOperand(MCInst &Inst, unsigned Val, static DecodeStatus DecodePredNoALOperand(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (Val >= ARMCC::AL) // also exclude the non-condition NV return MCDisassembler::Fail; Inst.addOperand(MCOperand::createImm(Val)); @@ -6069,7 +6294,7 @@ static DecodeStatus DecodePredNoALOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (Inst.getOpcode() == ARM::MVE_LCTP) @@ -6132,7 +6357,7 @@ static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address, static DecodeStatus DecodeLongShiftOperand(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (Val == 0) @@ -6144,7 +6369,8 @@ static DecodeStatus DecodeLongShiftOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if ((RegNo) + 1 > 11) return MCDisassembler::Fail; @@ -6154,7 +6380,8 @@ static DecodeStatus DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo, } static DecodeStatus DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if ((RegNo) > 14) return MCDisassembler::Fail; @@ -6165,7 +6392,8 @@ static DecodeStatus DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo, static DecodeStatus DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo == 15) { Inst.addOperand(MCOperand::createReg(ARM::APSR_NZCV)); return MCDisassembler::Success; @@ -6181,7 +6409,7 @@ DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst &Inst, unsigned RegNo, } static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; Inst.addOperand(MCOperand::createImm(ARMCC::AL)); @@ -6207,8 +6435,8 @@ static DecodeStatus DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address, } static DecodeStatus DecodeMQPRRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t Address, - const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { if (RegNo > 7) return MCDisassembler::Fail; @@ -6224,7 +6452,7 @@ static const uint16_t QQPRDecoderTable[] = { static DecodeStatus DecodeMQQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 6) return MCDisassembler::Fail; @@ -6240,7 +6468,7 @@ static const uint16_t QQQQPRDecoderTable[] = { static DecodeStatus DecodeMQQQQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { if (RegNo > 4) return MCDisassembler::Fail; @@ -6251,7 +6479,7 @@ static DecodeStatus DecodeMQQQQPRRegisterClass(MCInst &Inst, unsigned RegNo, static DecodeStatus DecodeVPTMaskOperand(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; // Parse VPT mask and encode it in the MCInst as an immediate with the same @@ -6281,7 +6509,8 @@ static DecodeStatus DecodeVPTMaskOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeVpredROperand(MCInst &Inst, unsigned RegNo, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { // The vpred_r operand type includes an MQPR register field derived // from the encoding. But we don't actually want to add an operand // to the MCInst at this stage, because AddThumbPredicate will do it @@ -6292,18 +6521,16 @@ static DecodeStatus DecodeVpredROperand(MCInst &Inst, unsigned RegNo, return MCDisassembler::Success; } -static DecodeStatus DecodeRestrictedIPredicateOperand(MCInst &Inst, - unsigned Val, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createImm((Val & 0x1) == 0 ? ARMCC::EQ : ARMCC::NE)); return MCDisassembler::Success; } -static DecodeStatus DecodeRestrictedSPredicateOperand(MCInst &Inst, - unsigned Val, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { unsigned Code; switch (Val & 0x3) { case 0: @@ -6323,17 +6550,16 @@ static DecodeStatus DecodeRestrictedSPredicateOperand(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeRestrictedUPredicateOperand(MCInst &Inst, - unsigned Val, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { Inst.addOperand(MCOperand::createImm((Val & 0x1) == 0 ? ARMCC::HS : ARMCC::HI)); return MCDisassembler::Success; } -static DecodeStatus DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, - uint64_t Address, - const void *Decoder) { +static DecodeStatus +DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { unsigned Code; switch (Val) { default: @@ -6363,7 +6589,8 @@ static DecodeStatus DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Va } static DecodeStatus DecodeVCVTImmOperand(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned DecodedVal = 64 - Val; @@ -6404,10 +6631,10 @@ static unsigned FixedRegForVSTRVLDR_SYSREG(unsigned Opcode) { } } -template<bool Writeback> +template <bool Writeback> static DecodeStatus DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { switch (Inst.getOpcode()) { case ARM::VSTR_FPSCR_pre: case ARM::VSTR_FPSCR_NZCVQC_pre: @@ -6448,9 +6675,10 @@ static DecodeStatus DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Val, return S; } -static inline DecodeStatus DecodeMVE_MEM_pre( - MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder, - unsigned Rn, OperandDecoder RnDecoder, OperandDecoder AddrDecoder) { +static inline DecodeStatus +DecodeMVE_MEM_pre(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder, unsigned Rn, + OperandDecoder RnDecoder, OperandDecoder AddrDecoder) { DecodeStatus S = MCDisassembler::Success; unsigned Qd = fieldFromInstruction(Val, 13, 3); @@ -6469,7 +6697,8 @@ static inline DecodeStatus DecodeMVE_MEM_pre( template <int shift> static DecodeStatus DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder, fieldFromInstruction(Val, 16, 3), DecodetGPRRegisterClass, @@ -6478,7 +6707,8 @@ static DecodeStatus DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val, template <int shift> static DecodeStatus DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder, fieldFromInstruction(Val, 16, 4), DecoderGPRRegisterClass, @@ -6487,17 +6717,18 @@ static DecodeStatus DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val, template <int shift> static DecodeStatus DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder, fieldFromInstruction(Val, 17, 3), DecodeMQPRRegisterClass, DecodeMveAddrModeQ<shift>); } -template<unsigned MinLog, unsigned MaxLog> +template <unsigned MinLog, unsigned MaxLog> static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; if (Val < MinLog || Val > MaxLog) @@ -6507,10 +6738,10 @@ static DecodeStatus DecodePowerTwoOperand(MCInst &Inst, unsigned Val, return S; } -template<unsigned start> -static DecodeStatus DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, - uint64_t Address, - const void *Decoder) { +template <unsigned start> +static DecodeStatus +DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; Inst.addOperand(MCOperand::createImm(start + Val)); @@ -6519,7 +6750,8 @@ static DecodeStatus DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, } static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 0, 4); unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); @@ -6542,7 +6774,8 @@ static DecodeStatus DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn, } static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Rt = fieldFromInstruction(Insn, 0, 4); unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); @@ -6566,8 +6799,9 @@ static DecodeStatus DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn, return S; } -static DecodeStatus DecodeMVEOverlappingLongShift( - MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) { +static DecodeStatus +DecodeMVEOverlappingLongShift(MCInst &Inst, unsigned Insn, uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned RdaLo = fieldFromInstruction(Insn, 17, 3) << 1; @@ -6645,8 +6879,9 @@ static DecodeStatus DecodeMVEOverlappingLongShift( return S; } -static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) | fieldFromInstruction(Insn, 13, 3)); @@ -6664,9 +6899,9 @@ static DecodeStatus DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn, uint64_t Addr return S; } -template<bool scalar, OperandDecoder predicate_decoder> +template <bool scalar, OperandDecoder predicate_decoder> static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; Inst.addOperand(MCOperand::createReg(ARM::VPR)); unsigned Qn = fieldFromInstruction(Insn, 17, 3); @@ -6703,7 +6938,7 @@ static DecodeStatus DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address, } static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; Inst.addOperand(MCOperand::createReg(ARM::VPR)); unsigned Rn = fieldFromInstruction(Insn, 16, 4); @@ -6712,8 +6947,9 @@ static DecodeStatus DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address, return S; } -static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn, uint64_t Address, - const void *Decoder) { +static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn, + uint64_t Address, + const MCDisassembler *Decoder) { DecodeStatus S = MCDisassembler::Success; Inst.addOperand(MCOperand::createReg(ARM::VPR)); Inst.addOperand(MCOperand::createReg(ARM::VPR)); @@ -6721,7 +6957,8 @@ static DecodeStatus DecodeMVEVPNOT(MCInst &Inst, unsigned Insn, uint64_t Address } static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { + uint64_t Address, + const MCDisassembler *Decoder) { const unsigned Rd = fieldFromInstruction(Insn, 8, 4); const unsigned Rn = fieldFromInstruction(Insn, 16, 4); const unsigned Imm12 = fieldFromInstruction(Insn, 26, 1) << 11 | |