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Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/RISCV/RISCVCallingConv.td')
-rw-r--r--contrib/llvm-project/llvm/lib/Target/RISCV/RISCVCallingConv.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVCallingConv.td b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVCallingConv.td
index 130a6ecc143d..3dd0b3723828 100644
--- a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVCallingConv.td
+++ b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVCallingConv.td
@@ -14,7 +14,7 @@
// RISCVISelLowering.cpp (CC_RISCV).
def CSR_ILP32_LP64
- : CalleeSavedRegs<(add X1, X3, X4, X8, X9, (sequence "X%u", 18, 27))>;
+ : CalleeSavedRegs<(add X1, X8, X9, (sequence "X%u", 18, 27))>;
def CSR_ILP32F_LP64F
: CalleeSavedRegs<(add CSR_ILP32_LP64,
@@ -29,7 +29,7 @@ def CSR_NoRegs : CalleeSavedRegs<(add)>;
// Interrupt handler needs to save/restore all registers that are used,
// both Caller and Callee saved registers.
-def CSR_Interrupt : CalleeSavedRegs<(add X1, (sequence "X%u", 3, 31))>;
+def CSR_Interrupt : CalleeSavedRegs<(add X1, (sequence "X%u", 5, 31))>;
// Same as CSR_Interrupt, but including all 32-bit FP registers.
def CSR_XLEN_F32_Interrupt: CalleeSavedRegs<(add CSR_Interrupt,