diff options
Diffstat (limited to 'include/llvm/BinaryFormat/ELF.h')
| -rw-r--r-- | include/llvm/BinaryFormat/ELF.h | 88 |
1 files changed, 78 insertions, 10 deletions
diff --git a/include/llvm/BinaryFormat/ELF.h b/include/llvm/BinaryFormat/ELF.h index ce35d127d433..2bd711137845 100644 --- a/include/llvm/BinaryFormat/ELF.h +++ b/include/llvm/BinaryFormat/ELF.h @@ -1,9 +1,8 @@ //===- llvm/BinaryFormat/ELF.h - ELF constants and structures ---*- C++ -*-===// // -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // @@ -703,15 +702,20 @@ enum : unsigned { EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d, EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e, EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f, + EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030, EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031, + // AMDGCN GFX10. + EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033, + EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034, + EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035, // Reserved for AMDGCN-based processors. EF_AMDGPU_MACH_AMDGCN_RESERVED0 = 0x027, - EF_AMDGPU_MACH_AMDGCN_RESERVED1 = 0x030, + EF_AMDGPU_MACH_AMDGCN_RESERVED1 = 0x032, // First/last AMDGCN-based processors. EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600, - EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX909, + EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1012, // Indicates if the "xnack" target feature is enabled for all code contained // in the object. @@ -839,6 +843,10 @@ enum : unsigned { SHT_LLVM_CALL_GRAPH_PROFILE = 0x6fff4c02, // LLVM Call Graph Profile. SHT_LLVM_ADDRSIG = 0x6fff4c03, // List of address-significant symbols // for safe ICF. + SHT_LLVM_DEPENDENT_LIBRARIES = 0x6fff4c04, // LLVM Dependent Library Specifiers. + SHT_LLVM_SYMPART = 0x6fff4c05, // Symbol partition specification. + SHT_LLVM_PART_EHDR = 0x6fff4c06, // ELF header for loadable partition. + SHT_LLVM_PART_PHDR = 0x6fff4c07, // Phdrs for loadable partition. // Android's experimental support for SHT_RELR sections. // https://android.googlesource.com/platform/bionic/+/b7feec74547f84559a1467aca02708ff61346d2a/libc/include/elf.h#512 SHT_ANDROID_RELR = 0x6fffff00, // Relocation entries; only offsets. @@ -1340,6 +1348,14 @@ enum { NT_FREEBSD_PROCSTAT_AUXV = 16, }; +// Generic note types +enum : unsigned { + NT_VERSION = 1, + NT_ARCH = 2, + NT_GNU_BUILD_ATTRIBUTE_OPEN = 0x100, + NT_GNU_BUILD_ATTRIBUTE_FUNC = 0x101, +}; + enum { NT_GNU_ABI_TAG = 1, NT_GNU_HWCAP = 2, @@ -1352,13 +1368,65 @@ enum { enum : unsigned { GNU_PROPERTY_STACK_SIZE = 1, GNU_PROPERTY_NO_COPY_ON_PROTECTED = 2, - GNU_PROPERTY_X86_FEATURE_1_AND = 0xc0000002 + GNU_PROPERTY_AARCH64_FEATURE_1_AND = 0xc0000000, + GNU_PROPERTY_X86_FEATURE_1_AND = 0xc0000002, + GNU_PROPERTY_X86_ISA_1_NEEDED = 0xc0008000, + GNU_PROPERTY_X86_FEATURE_2_NEEDED = 0xc0008001, + GNU_PROPERTY_X86_ISA_1_USED = 0xc0010000, + GNU_PROPERTY_X86_FEATURE_2_USED = 0xc0010001, }; -// CET properties -enum { +// aarch64 processor feature bits. +enum : unsigned { + GNU_PROPERTY_AARCH64_FEATURE_1_BTI = 1 << 0, + GNU_PROPERTY_AARCH64_FEATURE_1_PAC = 1 << 1, +}; + +// x86 processor feature bits. +enum : unsigned { GNU_PROPERTY_X86_FEATURE_1_IBT = 1 << 0, - GNU_PROPERTY_X86_FEATURE_1_SHSTK = 1 << 1 + GNU_PROPERTY_X86_FEATURE_1_SHSTK = 1 << 1, + + GNU_PROPERTY_X86_ISA_1_CMOV = 1 << 0, + GNU_PROPERTY_X86_ISA_1_SSE = 1 << 1, + GNU_PROPERTY_X86_ISA_1_SSE2 = 1 << 2, + GNU_PROPERTY_X86_ISA_1_SSE3 = 1 << 3, + GNU_PROPERTY_X86_ISA_1_SSSE3 = 1 << 4, + GNU_PROPERTY_X86_ISA_1_SSE4_1 = 1 << 5, + GNU_PROPERTY_X86_ISA_1_SSE4_2 = 1 << 6, + GNU_PROPERTY_X86_ISA_1_AVX = 1 << 7, + GNU_PROPERTY_X86_ISA_1_AVX2 = 1 << 8, + GNU_PROPERTY_X86_ISA_1_FMA = 1 << 9, + GNU_PROPERTY_X86_ISA_1_AVX512F = 1 << 10, + GNU_PROPERTY_X86_ISA_1_AVX512CD = 1 << 11, + GNU_PROPERTY_X86_ISA_1_AVX512ER = 1 << 12, + GNU_PROPERTY_X86_ISA_1_AVX512PF = 1 << 13, + GNU_PROPERTY_X86_ISA_1_AVX512VL = 1 << 14, + GNU_PROPERTY_X86_ISA_1_AVX512DQ = 1 << 15, + GNU_PROPERTY_X86_ISA_1_AVX512BW = 1 << 16, + GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS = 1 << 17, + GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW = 1 << 18, + GNU_PROPERTY_X86_ISA_1_AVX512_BITALG = 1 << 19, + GNU_PROPERTY_X86_ISA_1_AVX512_IFMA = 1 << 20, + GNU_PROPERTY_X86_ISA_1_AVX512_VBMI = 1 << 21, + GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2 = 1 << 22, + GNU_PROPERTY_X86_ISA_1_AVX512_VNNI = 1 << 23, + + GNU_PROPERTY_X86_FEATURE_2_X86 = 1 << 0, + GNU_PROPERTY_X86_FEATURE_2_X87 = 1 << 1, + GNU_PROPERTY_X86_FEATURE_2_MMX = 1 << 2, + GNU_PROPERTY_X86_FEATURE_2_XMM = 1 << 3, + GNU_PROPERTY_X86_FEATURE_2_YMM = 1 << 4, + GNU_PROPERTY_X86_FEATURE_2_ZMM = 1 << 5, + GNU_PROPERTY_X86_FEATURE_2_FXSR = 1 << 6, + GNU_PROPERTY_X86_FEATURE_2_XSAVE = 1 << 7, + GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT = 1 << 8, + GNU_PROPERTY_X86_FEATURE_2_XSAVEC = 1 << 9, +}; + +// AMDGPU-specific section indices. +enum { + SHN_AMDGPU_LDS = 0xff00, // Variable in LDS; symbol encoded like SHN_COMMON }; // AMD specific notes. (Code Object V2) |